1
2
3
4
8
7
6
5
V+
Out B
–In B
+In B
Out A
–In A
+In A
V–
A
B
D PACKAGE
(TOP VIEW)
OPA2227-EP
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SBOS594 MARCH 2012
HIGH PRECISION, LOW NOISE OPERATIONAL AMPLIFIER
Check for Samples: OPA2227-EP
1FEATURES
Low Noise: 3 nV/Hz SUPPORTS DEFENSE, AEROSPACE,
AND MEDICAL APPLICATIONS
Wide Bandwidth: 8 MHz, 2.3 V/μs Controlled Baseline
Settling Time: 5 μs One Assembly/Test Site
High CMRR: 138 dB (Typical) One Fabrication Site
High Open-Loop Gain: 160 dB (Typical) Available in Military (–55°C/125°C)
Low Input Bias Current: 10 nA Maximum at Temperature Range(1)
25°C Extended Product Life Cycle
Low Offset Voltage: 100 μV Maximum at 25°C Extended Product-Change Notification
Wide Supply Range: ±2.5 V to ±18 V Product Traceability
APPLICATIONS
Data Acquisition
Telecom Equipment
Geophysical Analysis
Vibration Analysis
Spectral Analysis
Professional Audio Equipment
Active Filters
Power Supply Control (1) Additional temperature ranges available - contact factory
DESCRIPTION
The OPA2227 operational amplifier combines low noise and wide bandwidth with high precision to make it the
ideal choice for applications requiring both ac and precision dc performance.
The OPA2227 is unity-gain stable and features high slew rate (2.3 V/μs) and wide bandwidth (8 MHz).
The OPA2227 operational amplifier is ideal for professional audio equipment. In addition, low quiescent current
and low cost make them ideal for portable applications requiring high precision.
The OPA2227 operational amplifier is a pin-for-pin replacement for the industry standard OP-27 with substantial
improvements across the board. The dual and quad versions are available for space savings and perchannel
cost reduction.
The OPA2227 is available in an SOIC-8 package. Operation is specified from –55°C to 125°C.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 2012, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
OPA2227-EP
SBOS594 MARCH 2012
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
ORDERABLE PART
TAPACKAGE TOP-SIDE MARKING VID NUMBER TRANSPORT MEDIA
NUMBER
OPA2227MDREP V62/12610-01XE Tape and Reel, large
–55°C to SOIC-8 D 2227EP
125°C OPA2227MDEP V62/12610-02XE Tube
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted) VALUE UNIT
Supply voltage ±18 V
Signal input terminals Voltage (V–) 0.7 to (V+) + 0.7 V
Current 20 mA
Output short-circuit (to ground)(2) Continuous
Operating temperature -55 to 125 °C
Storage temperature -65 to 150 °C
Junction temperature 150 °C
Lead temperature (soldering, 10 s) 300 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) One channel per package.
THERMAL INFORMATION OPA2227
THERMAL METRIC(1) D UNITS
8 PINS
θJA Junction-to-ambient thermal resistance(2) 91.9
θJCtop Junction-to-case (top) thermal resistance(3) 39.9
θJB Junction-to-board thermal resistance(4) 40.6 °C/W
ψJT Junction-to-top characterization parameter(5) 3.9
ψJB Junction-to-board characterization parameter(6) 39.6
θJCbot Junction-to-case (bottom) thermal resistance(7) N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
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ELECTRICAL CHARACTERISTICS
At TA= 25°C, VS= ±5 V to ±15 V, RL= 10 kΩ(unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
Input offset voltage (VOS) ±5 ±100 µV
vs Temperature, TA= -55°C to 125°C ±10 ±250 µV
vs Temperature (dVOS/dT), TA= -55°C to 125°C ±0.1 µV/°C
vs Power supply (PSRR) TA= -55°C to 125°C VS= ±2.5 V to ±18 V ±0.5 ±2.1 µV/V
vs Time 0.2 µV/mo
dc 0.2 µV/V
Channel separation (dual) f = 1 kHz, RL= 5 kΩ110 dB
INPUT BIAS CURRENT
Input bias current (IB) ±2.5 ±10 nA
TA= -55°C to 125°C See Typical Characteristics
Input offset current (IOS) ±2.5 ±10 nA
TA= -55°C to 125°C See Typical Characteristics
NOISE
Input voltage noise, f = 0.1 Hz to 10 Hz 90 nVp-p
15 nVrms
Input voltage noise density (en) f = 10 Hz 3.5 nV/Hz
f = 100 Hz 3 nV/Hz
f = 1 kHz 3 nV/Hz
Current noise density (in), f = 1 kHz 0.4 pA/Hz
INPUT VOLTAGE RANGE
Common-mode voltage range (VCM)(V-) + 2 (V+) 2 V
TA= -55°C to 125°C
Common-mode rejection (CMRR) VCM = (V–) + 2 V to (V+) 2 V 120 138 dB
TA= -55°C to 125°C 108 138 dB
INPUT IMPEDANCE
Differential Open-loop voltage gain (AOL)Ω|| pF
107|| 12
Common-mode VCM = (V–) + 2 V to (V+) 2 V Ω|| pF
109|| 3
OPEN-LOOP GAIN
Open-loop voltage gain (AOL) VO= (V–) + 2 V to (V+) 2 V, RL= 10 kΩ132 160
TA= -55°C to 125°C 112 160 dB
VO= (V–) + 3.5 V to (V+) 3.5 V, RL= 600 Ω132 160
TA= -55°C to 125°C 112 160
FREQUENCY RESPONSE
Gain bandwidth product (GBW) 8 MHz
Slew rate (SR) 2.3 V/µs
Settling time: 0.1% G = 1, 10-V Step, CL= 100 pF 5 µs
0.01% G = 1, 10-V Step, CL= 100 pF 5.6 µs
Overload recovery time VIN x G = VS1.3 µs
Total harmonic distortion + noise (THD+N) f = 1 kHz, G = 1, VO= 3.5 Vrms 0.00005 %
OUTPUT
Voltage output
TA= -55°C to 125°C RL= 10 kΩ(V-) + 2 (V+) 2 V
TA= -55°C to 125°C RL= 600 Ω(V-) + 3.5 (V+) 3.5
Short-circuit current (ISC) ±45 mA
Capacitive load drive (CLOAD) See Typical Characteristics
POWER SUPPLY
Specified voltage range (VS) ±5 ±15 V
Operating voltage range ±2.5 ±18 V
Quiescent current (per amplifier) (IQ) IO= 0 A ±3.7 ±3.95
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1000
10000
100000
1000000
125 130 135 140 145 150
Estimated Life (Hours)
Continuous TJ(°C)
OPA2227-EP
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ELECTRICAL CHARACTERISTICS (continued)
At TA= 25°C, VS= ±5 V to ±15 V, RL= 10 kΩ(unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TA= -55°C to 125°C IO= 0 A ±4.30 mA
TEMPERATURE RANGE
Specified temperature range –55 125 °C
Operating temperature range –55 125 °C
Storage temperature range –65 150 °C
xxx
A. See datasheet for absolute maximum and minimum recommended operating conditions.
B. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect
life).
Figure 1. OPA2227-EP Wirebond Life Derating Chart
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20 100 1k 10k 20k
0.01
0.001
0.0001
0.00001
THD+Noise (%)
Frequency (Hz)
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
G = 1, RL= 10kΩ
VOUT = 3.5Vrms
0.01 0.10 1 10 100 1k 10k 100k 1M 10M 100M
180
160
140
120
100
80
60
40
20
0
–20
A
OL
(dB)
0
–20
–40
–60
–80
–100
–120
–140
–160
–180
–200
Phase (°)
Frequency (Hz)
OPEN-LOOP GAIN/PHASE vs FREQUENCY
G
φ
10.1 10 100 1k 10k 100k 1M
140
120
100
80
60
40
-20
–0
PSRR, CMRR (dB)
Frequency (Hz)
POWER SUPPLY AND COMMON-MODE
REJECTION RATIO vs FREQUENCY
+CMRR
+PSRR
–PSRR
0.1 101 100 1k 10k
100k
10k
1k
100
10
1
Voltage Noise (nV/Hz)
Current Noise (fA/Hz)
Frequency (Hz)
INPUT VOLTAGE AND CURRENT NOISE
SPECTRAL DENSITY vs FREQUENCY
Current Noise
Voltage Noise
10 100 1k 10k 100k 1M
140
120
100
80
60
40
Channel Separation (dB)
Frequency (Hz)
CHANNEL SEPARATION vs FREQUENCY
Dual and quad devices. G = 1, all channels.
Quad measured Channel A to D, or B to C;
other combinations yield similiar or improved
rejection.
INPUT NOISE VOLTAGE vs TIME
1s/div
50nV/div
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TYPICAL CHARACTERISTICS
At TA= 25°C, RL= 10 kΩ, VS= ±15 V (unless otherwise noted).
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10
8
6
4
2
0
–2
–4
–6
–8
–10
Offset Voltage Change (µV)
0 100 150 300
Time from Power Supply Turn-On (s)
WARM-UP OFFSET VOLTAGE DRIFT
50 200 250
VOLTAGE NOISE DISTRIBUTION (10Hz)
Percent of Units (%)
Noise (nV/Hz)
3.160 3.25 3.34 3.43 3.51 3.60 3.69 3.78
24
16
8
0
INPUT BIAS CURRENT vs TEMPERATURE
–75 –50 –25 0 25 50 75 100 125
160
150
140
130
120
110
100
90
80
70
60
AOL, CMRR, PSRR (dB)
Temperature (°C)
AOL, CMRR, PSRR vs TEMPERATURE
CMRR
PSRR
AOL
–75 –50 –25 0 25 50 75 100 125
60
50
40
30
20
10
0
Short-Circuit Current (mA)
Temperature (°C)
SHORT-CIRCUIT CURRENT vs TEMPERATURE
+ISC
–ISC
−50
−40
−30
−20
−10
0
10
20
30
40
−60 −40 −20 0 20 40 60 80 100 120 140
Temperature (°C)
Input Bias Current (nA)
−2
−1
0
1
2
3
4
5
6
−60 −40 −20 0 20 40 60 80 100 120 140
Temperature (°C)
Input Offset Current (nA)
INPUT OFFSET CURRENT vs TEMPERATURE
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TYPICAL CHARACTERISTICS (continued)
At TA= 25°C, RL= 10 kΩ, VS= ±15 V (unless otherwise noted).
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QUIESCENT CURRENT vs SUPPLY VOLTAGE
20
Supply Voltage (±V)
0 2 4 6 8 10 12 14 16 18
3.8
3.6
3.4
3.2
3.0
2.8
Quiescent Current (mA)
SLEW RATE vs TEMPERATURE
125
Temperature (°C)
–75 –50 –25 0 25 50 75 100
3.0
2.5
2.0
1.5
1.0
0.5
0
Slew Rate (µV/V)
Negative Slew Rate
RLOAD = 2kΩ
CLOAD = 100pF
Positive Slew Rate
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
∆IB(nA)
0 5 10 15 20 25 30 35 40
Supply Voltage (V)
CHANGE IN INPUT BIAS CURRENT
vs POWER SUPPLY VOLTAGE
Curve shows normalized change in bias current
with respect to VS= ±10V. Typical I Bmay range
from –2nA to +2nA at VS= ±10V.
CHANGE IN INPUT BIAS CURRENT
vs COMMON-MODE VOLTAGE
15
Common-Mode Voltage (V)
–15 –10 –5 0 5 10
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
∆IB(nA)
VS= ±15V
VS= ±5V
Curve shows normalized change in bias current
with respect to VCM = 0V. Typical I Bmay range
from –2nA to +2nA at VCM = 0V.
100
10
1
Settling Time (µs)
±1 ±10 ±100
Gain (V/V)
SETTLING TIME vs CLOSED-LOOP GAIN
0.01% 0.1%
VS= ±15V, 10V Step
CL= 1500pF
RL= 2kΩ
QUIESCENT CURRENT vs TEMPERATURE
100 120 140
Temperature (°C)
–60 –40 –20 0 20 40 60 80
5.0
4.5
4.0
3.5
3.0
2.5
Quiescent Current (mA)
±10V
±5V
±2.5V
±18V
±15V
±12V
OPA2227-EP
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TYPICAL CHARACTERISTICS (continued)
At TA= 25°C, RL= 10 kΩ, VS= ±15 V (unless otherwise noted).
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SMALL-SIGNAL OVERSHOOT
vs LOAD CAPACITANCE
1k100101 10k 100k
Load Capacitance (pF)
70
60
50
40
30
20
10
0
Overshoot (%)
Gain = –10
Gain = +10
Gain = +1
Gain = –1
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
10M
Frequency (Hz)
1k 10k 100k 1M
30
25
20
15
10
5
0
Output Voltage (Vp-p)
VS= ±15V
VS= ±5V
LARGE-SIGNAL STEP RESPONSE
G = –1, CL= 1500pF
5µs/div
2V/div
SMALL-SIGNAL STEP RESPONSE
G = +1, CL= 1000pF
400ns/div
25mV/div
SMALL-SIGNAL STEP RESPONSE
G = +1, CL= 5pF
400ns/div
25mV/div
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
15
14
13
12
11
10
–10
–11
–12
–13
–14
–15
V+
(V+) –1V
(V+) –2V
(V+) –3V
(V–) +3V
(V–) +2V
(V–) +1V
V–
0 10 20 30 40 50 60
Output Current (mA)
Output Voltage Swing (V)
–55°C
–40°C
–55°C
85°C
25°C
85°C
25°C
–40°C
125°C
125°C
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TYPICAL CHARACTERISTICS (continued)
At TA= 25°C, RL= 10 kΩ, VS= ±15 V (unless otherwise noted).
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OPA2227 Output
RF
500Ω
Input
+
OPA2227-EP
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APPLICATION INFORMATION
Basic Connection
The OPA2227 is a precision operational amplifier with very low noise. It is unity-gain stable with a slew rate of
2.3 V/μs and 8-MHz bandwidth. Applications with noisy or high impedance power supplies may require
decoupling capacitors close to the device pins. In most cases, 0.1-μF capacitors are adequate.
Offset Voltage and Drift
The OPA2227 has very low offset voltage and drift. To achieve highest dc precision, circuit layout and
mechanical conditions should be optimized. Connections of dissimilar metals can generate thermal potentials at
the op amp inputs which can degrade the offset voltage and drift. These thermocouple effects can exceed the
inherent drift of the amplifier and ultimately degrade its performance. The thermal potentials can be made to
cancel by assuring that they are equal at both input terminals. In addition:
Keep thermal mass of the connections made to the two input terminals similar.
Locate heat sources as far as possible from the critical input circuitry.
Shield operational amplifier and input circuitry from air currents such as those created by cooling fans.
Operating Voltage
OPA2227 operational amplifier operates from ±2.5-V to ±18-V supplies with excellent performance. Unlike most
operational amplifiers which are specified at only one supply voltage, the OPA2227 is specified for real-world
applications; a single set of specifications applies over the ±5-V to ±15-V supply range. Specifications are
assured for applications between ±5-V and ±15-V power supplies. Some applications do not require equal
positive and negative output voltage swing. Power supply voltages do not need to be equal. The OPA2227 can
operate with as little as 5 V between the supplies and with up to 36 V between the supplies. For example, the
positive supply could be set to 25 V with the negative supply at –5 V or vice-versa. In addition, key parameters
are assured over the specified temperature range, –55°C to 125°C. Parameters which vary significantly with
operating voltage or temperature are shown in the Typical Performance Curves.
Offset Voltage Adjustment
The OPA2227 is laser-trimmed for very low offset and drift so most applications will not require external
adjustment.
Input Protection
Back-to-back diodes (see Figure 2) are used for input protection on the OPA2227. Exceeding the turn-on
threshold of these diodes, as in a pulse condition, can cause current to flow through the input protection diodes
due to the amplifier’s finite slew rate. Without external current-limiting resistors, the input devices can be
destroyed. Sources of high input current can cause subtle damage to the amplifier. Although the unit may still be
functional, important parameters such as input offset voltage, drift, and noise may shift.
Figure 2. Pulsed Operation
When using the OPA2227 as a unity-gain buffer (follower), the input current should be limited to 20 mA. This can
be accomplished by inserting a feedback resistor or a resistor in series with the source. Sufficient resistor size
can be calculated:
RX= VS/20 mA - RSOURCE (1)
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Op Amp
R1
R2
RB= R2|| R1External Cancellation Resistor
Conventional Op Amp Configuration
VOLTAGE NOISE SPECTRAL DENSITY
vs SOURCE RESISTANCE
100k 1M
Source Resistance, R
S
(Ω)
100 1k 10k
1.00+03
1.00E+02
1.00E+01
1.00E+00
Votlage Noise Spectral Density, E
0
Typical at 1k (V/ Hz)
OPA2227
Resistor Noise
Resistor Noise
OPA2227
RS
EO
E
O
2
= e
n
2
+ (i
n
R
S
)
2
+ 4kTR
S
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where RXis either in series with the source or inserted in the feedback path. For example, for a 10-V pulse
(VS= 10 V), total loop resistance must be 500 Ω. If the source impedance is large enough to sufficiently limit the
current on its own, no additional resistors are needed. The size of any external resistors must be carefully
chosen since they will increase noise. See the Noise Performance section of this data sheet for further
information on noise calculation. Figure 2 shows an example implementing a current limiting feedback resistor.
Input Bias Current Cancellation
The input bias current of the OPA2227 is internally compensated with an equal and opposite cancellation current.
The resulting input bias current is the difference between with input bias current and the cancellation current. The
residual input bias current can be positive or negative.
When the bias current is cancelled in this manner, the input bias current and input offset current are
approximately equal. A resistor added to cancel the effect of the input bias current (as shown in Figure 3) may
actually increase offset and noise and is therefore not recommended.
Figure 3. Input Bias Current Cancellation
Noise Performance
Figure 4 shows total circuit noise for varying source impedances with the operational amplifier in a unity-gain
configuration (no feedback resistor network, therefore no additional noise contributions). Two different operational
amplifiers are shown with total circuit noise calculated. The OPA2227 has very low voltage noise, making it ideal
for low source impedances (less than 20 kΩ). A similar precision operational amplifier, the OPA277, has
somewhat higher voltage noise but lower current noise. It provides excellent noise performance at moderate
source impedance (10 kΩto 100 kΩ). Above 100 kΩ, a FET-input op amp such as the OPA132 (very low current
noise) may provide improved performance. The equation is shown for the calculation of the total circuit noise.
Note that en= voltage noise, in= current noise, RS= source impedance, k = Boltzmann’s constant =
1.38 x 10–23 J/K and T is temperature in K. For more details on calculating noise, see “Basic Noise Calculations.”
Figure 4. Noise Performance of the OPA2227 in Unity-Gain Buffer Configuration
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Basic Noise Calculations
Design of low noise operational amplifier circuits requires careful consideration of a variety of possible noise
contributors: noise from the signal source, noise generated in the operational amplifier, and noise from the
feedback network resistors. The total noise of the circuit is the root-sum-square combination of all noise
components.
The resistive portion of the source impedance produces thermal noise proportional to the square root of the
resistance. This function is shown plotted in Figure 4. Since the source impedance is usually fixed, select the
operational amplifier and the feedback resistors to minimize their contribution to the total noise.
Figure 4 shows total noise for varying source impedances with the operational amplifier in a unity-gain
configuration (no feedback resistor network and therefore no additional noise contributions). The operational
amplifier itself contributes both a voltage noise component and a current noise component. The voltage noise is
commonly modeled as a time-varying component of the offset voltage. The current noise is modeled as the time-
varying component of the input bias current and reacts with the source resistance to create a voltage component
of noise. Consequently, the lowest noise operational amplifier for a given application depends on the source
impedance. For low source impedance, current noise is negligible and voltage noise generally dominates. For
high source impedance, current noise may dominate.
Figure 5 shows both inverting and noninverting operational amplifier circuit configurations with gain. In circuit
configurations with gain, the feedback network resistors also contribute noise. The current noise of the
operational amplifier reacts with the feedback resistors to create additional noise components. The feedback
resistor values can generally be chosen to make these noise sources negligible. The equations for total noise are
shown for both configurations.
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Figure 5. Noise Calculation in Gain Configurations
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R4
9.09kΩ
R3
1kΩ
R7
97.6kΩ
R6
40.2kΩ
C2
1µF
C1
1µF C3
0.47µF
C4
22nF
R2
2MΩ
R8
402kΩ
R5
634kΩ
Input from
Device
Under
Test
R1
2MΩ
(OPA2227)
U1
(OPA2227)
U2 1
2
3
R10
226kΩ
R9
178kΩ
C5
0.47µF
C6
10nF
R11
178kΩ
(OPA2227)
U2 7VOUT
6
5
100kΩ
VOUT
1
2
3
OPA2227
22pF
10Ω
Device
Under
Test
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Figure 6 shows the 0.1-Hz to 10-Hz bandpass filter used to test the noise of the OPA2227. The filter circuit was
designed using Texas Instruments’ FilterPro software (available at www.ti.com). Figure 7 shows the configuration
of the OPA2227 for noise testing.
Figure 6. 0.1-Hz to 10-Hz Bandpass Filter Used to Test Wideband Noise of the OPA2227
Figure 7. Noise Test Circuit
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VOUT
VIN
OPA2227
68nF
10nF
33nF
330pF
2.2nF
OPA2227
1.43kΩ 1.91kΩ
2.21kΩ
1.43kΩ
1.1kΩ
1.65kΩ1.1kΩ
fN= 13.86kHz
Q = 1.186
fN= 20.33kHz f = 7.2kHz
Q = 4.519
dc Gain = 1
2
16
37
5
Output
NOTE: Use metal film resistors
and plastic film capacitor. Circuit
must be well shielded to achieve
low noise.
Responsivity 2.5 x 104V/W
Output Noise 30µVrms, 0.1Hz to 10Hz
Dexter 1M
Thermopile
Detector
100Ω 100kΩ
OPA2227
2
3
1
0.1µF
OPA2227-EP
SBOS594 MARCH 2012
www.ti.com
Figure 8. Three-Pole, 20-kHz Low Pass, 0.5-dB Chebyshev Filter
Figure 9. Long-Wavelength Infrared Detector Amplifier
14 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): OPA2227-EP
200Ω
200Ω
1kΩ
1kΩ
1/2
OPA2227
1/2
OPA2227
–15V
0.1µF
0.1µF
+15V
Audio
In
This application uses two op amps
in parallel for higher output current drive.
To
Headphone
OPA2227-EP
www.ti.com
SBOS594 MARCH 2012
Figure 10. Headphone Amplifier
Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): OPA2227-EP
R5
50kΩ
R4
2.7kΩ
VIN
VOUT
R6
2.7kΩ
C1
940pF
C2
0.0047µF
C3
680pF
CW
CW
R2
50kΩ
R1
7.5kΩ
R3
7.5kΩ
R10
100kΩ
R8
50kΩ
R7
7.5kΩ
R9
7.5kΩ R11
100kΩ
CW
Bass Tone Control
Midrange Tone Control
Treble Tone Control
13
1
2
3
2
13
2
13
2
OPA2227
OPA2227-EP
SBOS594 MARCH 2012
www.ti.com
Figure 11. Three-Band ActiveTone Control (Bass, Midrange and Treble)
16 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): OPA2227-EP
PACKAGE OPTION ADDENDUM
www.ti.com 29-Mar-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
OPA2227MDREP PREVIEW SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF OPA2227-EP :
Catalog: OPA2227
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
OPA2227MDREP SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Mar-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
OPA2227MDREP SOIC D 8 2500 533.4 186.0 36.0
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Mar-2012
Pack Materials-Page 2
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