SN74LS02N - ON SEMICONDUCTOR

1. General description

74AHC1G04 and 74AHCT1G04 are high-speed Si-gate CMOS devices. They provide an

inverting buffer.

The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.

The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.

2. Features

nSymmetrical output impedance

nHigh noise immunity

nLow power dissipation

nBalanced propagation delays

nSOT353-1 and SOT753 package options

nESD protection:

uHBM JESD22-A114E: exceeds 2000 V

uMM JESD22-A115-A: exceeds 200 V

uCDM JESD22-C101C: exceeds 1000 V

nSpeciﬁed from −40 °C to +125 °C

3. Ordering information

74AHC1G04; 74AHCT1G04

Inverter

Rev. 07 — 31 May 2007 Product data sheet

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74AHC1G04GW −40 °C to +125 °C TSSOP5 plastic thin shrink small outline package;

5 leads; body width 1.25 mm SOT353-1

74AHCT1G04GW

74AHC1G04GV −40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753

74AHCT1G04GV

Product data sheet Rev. 07 — 31 May 2007 2 of 11

NXP Semiconductors 74AHC1G04; 74AHCT1G04

Inverter

4. Marking

5. Functional diagram

6. Pinning information

6.1 Pinning

6.2 Pin description

Table 2. Marking codes

Type number Marking

74AHC1G04GW AC

74AHC1G04GV A04

74AHCT1G04GW CC

74AHCT1G04GV C04

Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram

mna108

mna109

mna110

Fig 4. Pin conﬁguration

74AHC1G04

74AHCT1G04

n.c. VCC

GND Y

001aaf093

Table 3. Pin description

Symbol Pin Description

n.c. 1 not connected

A 2 data input

GND 3 ground (0 V)

Y 4 data output

VCC 5 supply voltage

Product data sheet Rev. 07 — 31 May 2007 3 of 11

NXP Semiconductors 74AHC1G04; 74AHCT1G04

Inverter

7. Functional description

8. Limiting values

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2] For both TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.

9. Recommended operating conditions

Table 4. Function table

H = HIGH voltage level; L = LOW voltage level

Input Output

A Y

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage −0.5 +7.0 V

VIinput voltage −0.5 +7.0 V

IIK input clamping current VI < −0.5 V −20 - mA

IOK output clamping current VO < −0.5 V or VO>V

CC + 0.5 V [1] -±20 mA

IOoutput current −0.5 V < VO <V

CC + 0.5 V - ±25 mA

ICC supply current - 75 mA

IGND ground current −75 - mA

Tstg storage temperature −65 +150 °C

Ptot total power dissipation Tamb = −40 °C to +125 °C[2] - 250 mW

Table 6. Recommended operating conditions

Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 74AHC1G04 74AHCT1G04 Unit

Min Typ Max Min Typ Max

VCC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V

VIinput voltage 0 - 5.5 0 - 5.5 V

VOoutput voltage 0 - VCC 0-V

CC V

Tamb ambient temperature −40 +25 +125 −40 +25 +125 °C

∆t/∆V input transition rise

and fall rate VCC = 3.3 V ± 0.3 V - - 100 - - - ns/V

VCC = 5.0 V ± 0.5 V - - 20 - - 20 ns/V

Product data sheet Rev. 07 — 31 May 2007 4 of 11

NXP Semiconductors 74AHC1G04; 74AHCT1G04

Inverter

10. Static characteristics

Table 7. Static characteristics

Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 25 °C−40 °C to +85 °C−40 °C to +125 °C Unit

Min Typ Max Min Max Min Max

For type 74AHC1G04

VIH HIGH-level

input voltage VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V

VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V

VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V

VIL LOW-level

input voltage VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V

VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V

VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V

VOH HIGH-level

output voltage VI= VIH or VIL

IO=−50 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V

IO=−50 µA; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V

IO=−50 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V

IO=−4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V

IO=−8.0 mA; VCC = 4.5 V 3.94 - - 3.8 - 3.70 - V

VOL LOW-level

output voltage VI= VIH or VIL

IO= 50 µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V

IO= 50 µA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V

IO= 50 µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V

IO= 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V

IO= 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V

IIinput leakage

current VI= 5.5 Vor GND;

VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 µA

ICC supply current VI=V

CC or GND; IO = 0 A;

VCC = 5.5 V - - 1.0 - 10 - 40 µA

CIinput

capacitance - 1.5 10 - 10 - 10 pF

For type 74AHCT1G04

VIH HIGH-level

input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V

VIL LOW-level

input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V

VOH HIGH-level

output voltage VI= VIH or VIL; VCC = 4.5 V

IO=−50 µA 4.4 4.5 - 4.4 - 4.4 - V

IO=−8.0 mA 3.94 - - 3.8 - 3.70 - V

VOL LOW-level

output voltage VI= VIH or VIL; VCC = 4.5 V

IO= 50 µA - 0 0.1 - 0.1 - 0.1 V

IO= 8.0 mA - - 0.36 - 0.44 - 0.55 V

IIinput leakage

current VI= 5.5 Vor GND;

VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 µA

Product data sheet Rev. 07 — 31 May 2007 5 of 11

NXP Semiconductors 74AHC1G04; 74AHCT1G04

Inverter

11. Dynamic characteristics

[1] tpd is the same as tPLH and tPHL.

[2] Typical values are measured at VCC = 3.3 V.

[3] Typical values are measured at VCC = 5.0 V.

[4] CPD is used to determine the dynamic power dissipation PD(µW).

PD=C

PD ×VCC2×fi+∑(CL×VCC2×fo) where:

fi= input frequency in MHz; fo= output frequency in MHz;

CL= output load capacitance in pF;

VCC = supply voltage in Volts;

N = total load switching outputs;

Σ(CL× VCC2× fo) = sum of outputs.

ICC supply current VI=V

CC or GND; IO = 0 A;

VCC = 5.5 V - - 1.0 - 10 - 40 µA

∆ICC additional

supply current per input pin; VI= 3.4 V;

other inputs at VCC or GND;

IO= 0 A; VCC = 5.5 V

- - 1.35 - 1.5 - 1.5 mA

CIinput

capacitance - 1.5 10 - 10 - 10 pF

Table 7. Static characteristics

…continued

Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 25 °C−40 °C to +85 °C−40 °C to +125 °C Unit

Min Typ Max Min Max Min Max

Table 8. Dynamic characteristics

GND = 0 V; t

= t

≤

3.0 ns. For test circuit see Figure 6.

Symbol Parameter Conditions 25 °C−40 °C to +85 °C−40 °C to +125 °C Unit

Min Typ Max Min Max Min Max

For type 74AHC1G04

tpd propagation

delay A to Y; see Figure 5 [1]

VCC = 3.0 V to 3.6 V [2]

CL= 15 pF - 4.3 7.1 1.0 8.5 1.0 11.0 ns

CL= 50 pF - 6.1 10.6 1.0 12 1.0 14.5 ns

VCC = 4.5 V to 5.5 V [3]

CL= 15 pF - 3.1 5.5 1.0 6.5 1.0 7.0 ns

CL= 50 pF - 4.5 7.5 1.0 8.5 1.0 9.5 ns

CPD power

dissipation

capacitance

per buffer;

CL= 50 pF; f = 1 MHz;

VI= GND to VCC

[4] -15- - - - - pF

For type 74AHCT1G04

tpd propagation

delay A to Y; see Figure 5 [1]

VCC = 4.5 V to 5.5 V [3]

CL= 15 pF - 3.4 6.7 1.0 7.5 1.0 8.5 ns

CL= 50 pF - 4.9 7.7 1.0 8.5 1.0 10.0 ns

CPD power

dissipation

capacitance

per buffer;

CL= 50 pF; f = 1 MHz;

VI= GND to VCC

[4] -16- - - - - pF

Product data sheet Rev. 07 — 31 May 2007 6 of 11

NXP Semiconductors 74AHC1G04; 74AHCT1G04

Inverter

12. Waveforms

Measurement points are given in Table 9.

Fig 5. Input (A) to output (Y) propagation delays

mna111

A input

Y output

tPHL tPLH

Table 9. Measurement point

Type Input Input Output

VIVMVM

74AHC1G04 GND to VCC 0.5 × VCC 0.5 × VCC

74AHCT1G04 GND to 3.0 V 1.5 V 0.5 × VCC

Test data is given in Table 8. Deﬁnitions for test circuit:

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

Fig 6. Load circuitry for switching times

mna101

VCC

VIVO

RTCL

PULSE

GENERATOR DUT

Product data sheet Rev. 07 — 31 May 2007 7 of 11

NXP Semiconductors 74AHC1G04; 74AHCT1G04

Inverter

13. Package outline

Fig 7. Package outline SOT353-1 (TSSOP5)

UNIT A1

max. A2A3bpLHELpwyv

ceD(1) E(1) Z(1) θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.1

01.0

0.8 0.30

0.15 0.25

0.08 2.25

1.85 1.35

1.15 0.65

1.3 2.25

2.0 0.60

0.15 7°

0°

0.1 0.10.30.425

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

0.46

0.21

SOT353-1 MO-203 SC-88A 00-09-01

03-02-19

0.15

(A3)

detail X

vMA

1.5 3 mm0

scale

TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1

1.1

Product data sheet Rev. 07 — 31 May 2007 8 of 11

NXP Semiconductors 74AHC1G04; 74AHCT1G04

Inverter

Fig 8. Package outline SOT753 (SC-74A)

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT753 SC-74A

wBM

detail X

vMA

0 1 2 mm

scale

132

Plastic surface-mounted package; 5 leads SOT753

UNIT A1bpcDEHELpQywv

mm 0.100

0.013 0.40

0.25 3.1

2.7

0.26

0.10 1.7

1.3

0.95 3.0

2.5 0.2 0.10.2

DIMENSIONS (mm are the original dimensions)

0.6

0.2 0.33

0.23

1.1

0.9

02-04-16

06-03-16

Product data sheet Rev. 07 — 31 May 2007 9 of 11

NXP Semiconductors 74AHC1G04; 74AHCT1G04

Inverter

14. Abbreviations

15. Revision history

Table 10. Abbreviations

Acronym Description

CDM Charged Device Model

DUT Device Under Test

ESD ElectroStatic Discharge

HBM Human Body Model

MM Machine Model

TTL Transistor-Transistor Logic

Table 11. Revision history

Document ID Release date Data sheet status Change notice Supersedes

74AHC_AHCT1G04_7 20070531 Product data sheet - 74AHC_AHCT1G04_6

Modiﬁcations: •The format of this data sheet has been redesigned to comply with the new identity

guidelines of NXP Semiconductors.

•Legal texts have been adapted to the new company name where appropriate.

•Package SOT353 changed to SOT353-1 in Section 3 and Section 13.

•Quick reference data and Soldering sections removed.

74AHC_AHCT1G04_6 20030904 Product speciﬁcation - 74AHC_AHCT1G04_5

74AHC_AHCT1G04_5 20020527 Product speciﬁcation - 74AHC_AHCT1G04_4

74AHC_AHCT1G04_4 20020215 Product speciﬁcation - 74AHC_AHCT1G04_3

74AHC_AHCT1G04_3 20010131 Product speciﬁcation - 74AHC_AHCT1G04_2

74AHC_AHCT1G04_2 19990127 Product speciﬁcation - 74AHC_AHCT1G04_1

74AHC_AHCT1G04_N_1 19981125 Preliminary speciﬁcation - -

Product data sheet Rev. 07 — 31 May 2007 10 of 11

NXP Semiconductors 74AHC1G04; 74AHCT1G04

Inverter

16. Legal information

16.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Deﬁnitions”.

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

16.2 Deﬁnitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modiﬁcations or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the

full data sheet shall prevail.

16.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconductors does not give any representations or

warranties, expressed or implied, as to the accuracy or completeness of such

information and shall have no liability for the consequences of use of such

information.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation speciﬁcations and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

malfunction of a NXP Semiconductors product can reasonably be expected to

result in personal injury, death or severe property or environmental damage.

NXP Semiconductors accepts no liability for inclusion and/or use of NXP

Semiconductors products in such equipment or applications and therefore

such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

speciﬁed use without further testing or modiﬁcation.

Limiting values — Stress above one or more limiting values (as deﬁned in

the Absolute Maximum Ratings System of IEC 60134) may cause permanent

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other conditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may affect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold

subject to the general terms and conditions of commercial sale, as published

at http://www.nxp.com/proﬁle/terms, including those pertaining to warranty,

intellectual property rights infringement and limitation of liability, unless

explicitly otherwise agreed to in writing by NXP Semiconductors. In case of

any inconsistency or conﬂict between information in this document and such

terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights, patents

or other industrial or intellectual property rights.

16.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

17. Contact information

For additional information, please visit: http://www.nxp.com

For sales ofﬁce addresses, send an email to: salesaddresses@nxp.com

Document status[1][2] Product status[3] Deﬁnition

Objective [short] data sheet Development This document contains data from the objective speciﬁcation for product development.

Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation.

Product [short] data sheet Production This document contains the product speciﬁcation.

NXP Semiconductors 74AHC1G04; 74AHCT1G04

Inverter

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 31 May 2007

Document identifier: 74AHC_AHCT1G04_7

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

18. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1

4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2

7 Functional description . . . . . . . . . . . . . . . . . . . 3

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

9 Recommended operating conditions. . . . . . . . 3

10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4

11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5

12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7

14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 9

15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9

16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10

16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10

16.2 Deﬁnitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10

16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10

17 Contact information. . . . . . . . . . . . . . . . . . . . . 10

18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11