General Description
The DS75 digital thermometer and thermostat provides 9,
10, 11, or 12-bit digital temperature readings over a -55°C to
+125°C range with ±2°C accuracy over a -25°C to +100°C
range. At power-up, the DS75 defaults to 9-bit resolution
for software compatibility with the LM75. Communication
with the DS75 is achieved via a simple 2–wire serial inter-
face. Three address pins allow up to eight DS75 devices
to operate on the same 2-wire bus, which greatly simplifies
distributed temperature sensing applications.
The DS75 thermostat has a dedicated open–drain output
(O.S.) and programmable fault tolerance, which allows the
user to define the number of consecutive error conditions
that must occur before O.S is activated. There are two
thermostatic operating modes that control thermostat oper-
ation based on userdefined trip-points (TOS and THYST).
A block diagram of the DS75 is shown in Figure 1 and
detailed pin descriptions are given in Table 2.
Features
●Temperature Measurements Require No External
Components
●Measures Temperatures from -55°C to +125°C
(-67°F to +257°F)
●±2°C Accuracy Over a -25°C to +100°C Range
●Thermometer Resolution is User-Configurable
from Nine (Default) to 12 Bits (0.5°C to 0.0625°C
Resolution)
●9-Bit Conversion Time is 150ms (Max)
●Thermostatic Settings are User-Definable
●Data is Read/Written Via 2-Wire Serial
(Interface (SDA and SCL Pins)
●Multidrop Capability Simplifies Distributed
Temperature-Sensing Applications
●Wide Power-Supply Range (+2.7V to +5.5V).
●Pin/software Compatible with the LM75
●Available in 8-Pin µ MAX and SO Packages and as a
1.5mm x 1.3mm Flip Chip. See Table 1 for Ordering
Information
●Applications Include Personal Computers, Cellular
Base Stations, Office Equipment, or Any Thermally
Sensitive System
19-7848; Rev 1; 2/08
SDA Open-Drain Data I/O
SCL Clock Input
GND Ground
O.S. Open-Drain Thermostat Output
A0Address Input
A1Address Input
A2Address Input
VDD Power Supply
VDD
A0
A1
A2
8
7
6
5
1
2
3
4
SDA
SCL
O.S.
GND
DS75
DS75S+ (8-Pin SO — 150mil)
TOP VIEW
+
VDD
A0
A1
A2
8
7
6
5
1
2
3
4
SDA
SCL
O.S.
GND
DS75
DS75U+ (µMAX)
+
DS75 Digital Thermometer and Thermostat
Pin Description
Pin Conguration
Table 1. Ordering Information
Table 2. Detailed Pin Description
Note: A “+” symbol will also be marked on the package near the Pin 1 indicator
ORDERING
NUMBER
PACKAGE
MARKING DESCRIPTION
DS75S+ DS75 (see note) DS75 in Lead-Free 150mil 8-Pin SO
DS75S+T&R DS75 (see note) DS75 in Lead-Free 150mil 8-Pin SO, 2500-Piece Tape-and-Reel
DS75U+ DS75 (see note) DS75 in Lead-Free 8-Pin µMAX
DS75U+T&R DS75 (see note) DS75 in Lead-Free 8-Pin µMAX, 3000-Piece Tape-and-Reel
DS75S DS75 DS75 in 150mil 8-Pin SO
DS75S/T&R DS75 DS75 in 150mil 8-Pin SO, 2500-Piece Tape-and-Reel
DS75U DS75 DS75 in 8-Pin µMAX
DS75U/T&R DS75 DS75 in 8-Pin µMAX, 3000-Piece Tape-and-Reel
DS75X/T&R DS75 DS75 Flip Chip, 10,000-Piece Tape-and-Reel
PIN SYMBOL DESCRIPTION
1 SDA Data input/output pin for 2-wire serial communication port. Open drain.
2 SCL Clock input pin for 2-wire serial communication port.
3 O.S. Thermostat output. Open drain.
4 GND Ground pin.
5 A2Address input pin.
6 A1Address input pin.
7 A0Address input pin.
8 VDD Supply Voltage. +2.7V to +5.5V supply pin.
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Figure 1. DS75 Functional Block Diagram
TOS AND THYST
REGISTERS
CONFIGURATION
REGISTER
TEMPERATURE
REGISTER
OVERSAMPLING
MODULATOR
PRECISION
REFERENCE
DIGITAL
DECIMATOR
ADDRESS
AND
I/O CONTROL
GND
THERMOSTAT
COMPARATOR
A2
A1
A0
SDA
SCL
VDD
O.S.
RP
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Voltage on VDD, Relative to Ground ....................-0.3V to +7.0V
Voltage on any other pin,
Relative to Ground................................ -0.3V to (VDD + 0.3V)
Operating Temperature .................................... -55°C to +125°C
Storage Temperature ........................................ -55°C to +125°C
Soldering Temperature ........................................+260°C for 10s
(-55°C to +125°C; 2.7V ≤ VDD ≤ 5.5V)
PARAMETER SYMBOL CONDITION MIN MAX UNITS
Supply Voltage VDD 2.7 5.5 V
Thermometer Error TERR
-25 to +100 (Note 2) ± 2.0 °C
-55 to +125 (Note 2) ± 3.0
Input Logic High VIH (Note 1) 0.7 x VDD VDD + 0.5 V
Input Logic Low VIL (Note 1) -0.5 0.3 x VDD V
SDA Output Logic Low Voltage VOL1 3mA sink current (Note 1) 0 0.4 V
VOL2 6mA sink current (Note 1) 0 0.6
O.S. Saturation Voltage VOL 4mA sink current (Notes 1, 2) 0.8 V
Input current each I/O pin 0.4 < VI/O< 0.9 VDD -10 +10 µA
I/O Capacitance CI/O 10 pF
Standby Current IDD1 (Notes 3, 4) 1 µA
Active Current IDD
Active temp conversions (Notes 3, 4) 1000 µA
Communication only (Notes 3, 4) 100
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Absolute Maximum Ratings
*Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
DC Electrical Characteristics
(-55°C to +125°C; 2.7V ≤ VDD ≤ 5.5V)
Note 1: All voltages are referenced to ground.
Note 2: Internal heating caused by O.S. loading will cause the DS75 to read approximately 0.5°C higher if O.S. is sinking the max
rated current.
Note 3: IDD specified with O.S. pin open.
Note 4: IDD specified with VDD at 5.0V and SDA, VSCL = 5.0V, 0°C to 70°C.
Note 5: See Timing Diagram in Figure 2. All timing is referenced to 0.9 x VDD and 0.1 x VDD.
Note 6: After this period, the first clock pulse is generated.
Note 7: For example, if CB = 300pF, then tR[min] = tF[min] = 50ns.
PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS
Resolution 9 12 bits
Temperature Conversion Time tCONVT
9-bit conversions 150
ms
10-bit conversions 300
11-bit conversions 600
12-bit conversions 1200
SCL Frequency fSCL 400 kHz
Bus Free Time Between a STOP
and START Condition tBUF (Note 5) 1.3 µs
START and Repeated START
Hold Time from Falling SCL tHD:STA (Notes 5, 6) 0.6 µs
Low Period of SCL tLOW (Note 5) 1.3 µs
High Period of SCL tHIGH (Note 5) 0.6 µs
Repeated START Condition
Setup Time to Rising SCL tSU:STA (Note 5) 0.6 µs
Data-Out Hold Time
from Falling SCL tHD:DAT (Note 5) 0 0.9 µs
Data-In Setup Time to
Rising SCL tSU:DAT (Note 5) 100 ns
Rise Time of SDA and SCL tR(Notes 5, 7) 20 + 0.1CB1000 ns
Fall Time of SDA and SCL tF(Notes 5, 7) 20 + 0.1CB300 ns
STOP Setup Time to Rising SCL tSU:STO (Note 5) 0.6 µs
Capacitive Load for
Each Bus Line CB400 pF
Input Capacitance CI5 pF
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AC Electrical Characteristics
Operation—Measuring Temperature
The DS75 measures temperature using a bandgap tem-
perature sensing architecture. An on-board delta-sigma
analog-to-digital converter (ADC) converts the measured
temperature to a digital value that is calibrated in degrees
centigrade; for Fahrenheit applications a lookup table or
conversion routine must be used. The DS75 is factory-
calibrated and requires no external components to mea-
sure temperature.
At power-up the DS75 immediately begins measuring
the temperature and converting the temperature to a
digital value. The resolution of the digital output data is
user-configurable to 9, 10, 11, or 12 bits, corresponding
to temperature increments of 0.5°C, 0.25°C, 0.125°C,
and 0.0625°C, respectively, with 9-bit default resolution
at power-up. The resolution is controlled via the R0 and
R1 bits in the configuration register as explained in the
CONFIGURATION REGISTER section of this data sheet.
Note that the conversion time doubles for each additional
bit of resolution.
After each temperature measurement and analog-to-
digital conversion, the DS75 stores the temperature as a
16-bit two’s complement number in the 2-byte tempera-
ture register (Figure 3). The sign bit (S) indicates if the
temperature is positive or negative: for positive numbers
S = 0 and for negative numbers S = 1. The most recently
converted digital measurement can be read from the tem-
perature register at any time. Since temperature conver-
sions are performed in the background, reading the tem-
perature register does not affect the operation in progress.
Bits 3 through 0 of the temperature register are hardwired
to 0. When the DS75 is configured for 12-bit resolution,
the 12 MSbs (bits 15 through 4) of the temperature regis-
ter will contain temperature data. For 11-bit resolution, the
11 MSbs (bits 15 through 5) of the temperature register
will contain data, and bit 4 will read out as 0. Likewise,
for 10-bit resolution, the 10 MSbs (bits 15 through 6) will
contain data, and for 9-bit the 9 MSbs (bits 15 through 7)
will contain data, and all unused LSbs will contain 0s.
Table 3 gives examples of 12-bit resolution digital output
data and the corresponding temperatures.
Figure 2. Timing Diagram
NOTE: THE DS75 DOES NOT DELAY THE SDA LINE INTERNALLY WITH RESPECT TO SCL FOR ANY LENGTH OF TIME.
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Shutdown Mode
For power-sensitive applications, the DS75 offers a low-
power shutdown mode. The SD bit in the configuration
register controls shutdown mode. When SD is changed
to 1, the conversion in progress will be completed and
the result stored in the temperature register after which
the DS75 will go into a low-power standby state. The
O.S. output will be cleared if the thermostat is operating
in interrupt mode and O.S will remain unchanged in com-
parator mode. The 2-wire interface remains operational in
shutdown mode, and writing a 0 to the SD bit returns the
DS75 to normal operation.
Operation–Thermostat
The DS75 thermostat has two operating modes, com-
parator mode and interrupt mode, which activate and
deactivate the open-drain thermostat output (O.S.) based
on user-programmable trip-points (TOS and THYST).
The DS75 powers up with the thermostat in comparator
mode with active-low O.S. polarity and with the over-
temperature trip-point (TOS) register set to 80°C and the
hysteresis trip-point (THYST) register set to 75°C. If these
power-up settings are compatible with the application, the
DS75 can be used as a standalone thermostat (i.e., no
2–wire communication required). If interrupt mode opera-
tion, activehigh O.S. polarity or different TOS and THYST
values are desired, they must be programmed after pow-
erup, so standalone operation is not possible.
In both operating modes, the user can program the ther-
mostat fault tolerance, which sets how many consecutive
temperature readings (1, 2, 4, or 6) must fall outside of
the thermostat limits before the thermostat output is trig-
gered. The fault tolerance is set by the F1 and F0 bits in
the configuration and at power-up the fault tolerance is 1.
The data format of the TOS and THYST registers is
identical to that of the temperature register (Figure 3),
i.e., a two-byte two’s complement representation of the
trip-point temperature in degrees centigrade with bits 3
through 0 hardwired to 0. After every temperature con-
version, the measured temperature is compared to the
values in the TOS and THYST registers, and then O.S.
is updated based on the result of the comparison and
the operating mode. The number of TOS and THYST bits
used during the thermostat comparison is equal to the
conversion resolution set by the R1 and R0 bits in the
configuration register. For example, it the resolution is 9
bits, only the 9 MSbs of TOS and THYST will be used by
the thermostat comparator.
The active state of the O.S. output can be changed via the
POL bit in the configuration register. The power-up default
is active low.
If the user does not wish to use the thermostat capabilities
of the DS75, the O.S. output should be left floating. Note
that if the thermostat is not used, the TOS and THYST
registers can be used for general storage of system data.
Figure 3. Temperature, TH, and TL Register Format
Table 3. 12-Bit Resolution Temperature/Data Relationship
TEMPERATURE (°C) DIGITAL OUTPUT (BINARY) DIGITAL OUTPUT (HEX)
+125 0111 1101 0000 0000 7D00h
+25.0625 0001 1001 0001 0000 1910h
+10.125 0000 1010 0010 0000 0A20h
+0.5 0000 0000 1000 0000 0080h
0 0000 0000 0000 0000 0000h
-0.5 1111 1111 1000 0000 FF80h
-10.125 1111 0101 1110 0000 F5E0h
-25.0625 1110 0110 1111 0000 E6F0h
-55 1100 1001 0000 0000 C900h
bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
MS Byte S 26252423222120
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
LS Byte 2-1 2-2 2-3 2-4 0000
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Comparator Mode
When the thermostat is in comparator mode, O.S. can be
programmed to operate with any amount of hysteresis.
The O.S. output becomes active when the measured tem-
perature exceeds the TOS value a consecutive number of
times as defined by the F1 and F0 fault tolerance (FT) bits
in the configuration register. O.S. then stays active until
the first time the temperature falls below the value stored
in THYST. Putting the device into shutdown mode does
not clear O.S. in comparator mode. Thermostat compara-
tor mode operation with FT = 2 is illustrated in Figure 4.
Interrupt Mode
In interrupt mode, the O.S. output first becomes active
when the measured temperature exceeds the TOS value
a consecutive number of times equal to the FT value in
the configuration register. Once activated, O.S. can only
be cleared by either putting the DS75 into shutdown mode
or by reading from any register (temperature, configura-
tion, TOS, or THYST ) on the device. Once O.S. has been
deactivated, it will only be reactivated when the measured
temperature falls below the THYST value a consecu-
tive number of times equal to the FT value. Again, O.S
can only be cleared by putting the device into shutdown
mode or reading any register. Thus, this interrupt/clear
process is cyclical between TOS and THYST events (i.e,
TOS, clear, THYST, clear, TOS, clear, THYST, clear, etc.).
Thermostat interrupt mode operation with FT = 2 is illus-
trated in Figure 4.
Figure 4. O.S. Output Operation Example
TEMPERATURE
O.S. OUTPUT - COMPARATOR MODE
O.S. OUTPUT - INTERRUPT MODE
TOS
THYST
INACTIVE
INACTIVE
ACTIVE
ACTIVE
IN THIS EXAMPLE THE DS75
IS CONFIGURED TO HAVE A
FAULT TOLERANCE OF 2.
ASSUMES A READ
HAS OCCURRED
CONVERSIONS
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Conguration Register
The configuration register allows the user to program various DS75 options such as conversion resolution, thermo-
stat fault tolerance, thermostat polarity, thermostat operating mode, and shutdown mode. The configuration register is
arranged as shown in Figure 5 and detailed descriptions of each bit are provided in Table 4. The user has read/write
access to all bits in the configuration register except the MSb, which is a reserved read-only bit. The entire register is
volatile, and thus powers up in its default state.
Figure 5. Configuration Register
Table 4. Configuration Register Bit Descriptions
Table 5. Resolution Configuration Table 6. Fault Tolerance Configuration
BIT NAME FUNCTIONAL DESCRIPTION
0
Reserved
Power-up state = 0
The master can write to this bit, but it will always read out as a 0.
R1
Conversion Resolution Bit 1
Power-up state = 0
Sets conversion resolution (see Table 5)
R0
Conversion Resolution Bit 0
Power-up state = 0
Sets conversion resolution (see Table 5)
F1
Thermostat Fault Tolerance Bit 1
Power-up state = 0
Sets the thermostat fault tolerance (see Table 6).
F0
Thermostat Fault Tolerance Bit 0
Power-up state = 0
Sets the thermostat fault tolerance (see Table 6).
POL
Thermostat Output (O.S.) Polarity
Power-up state = 0
POL = 0 — O.S. is active low.
POL = 1 — O.S. is active high.
TM
Thermostat Operating Mode
Power-up state = 0
TM = 0 — Comparator mode.
TM = 1 — Interrupt mode.
See the OPERATION–Thermostat section for a detailed description of these modes.
SD
Shutdown
Power-up state = 0
SD = 0 — Active conversion and thermostat operation.
SD = 1 — Shutdown mode.
See the SHUTDOWN MODE section for a detailed description of this mode.
R1 R0 THERMOMETER
RESOLUTION
MAX CONVERSION
TIME
0 0 9–bit 150 ms
0 1 10–bit 300 ms
1 0 11–bit 600 ms
1 1 12–bit 1200 ms
F1 F0 CONSECUTIVE OUT-OF-LIMITS
CONVERSIONS TO TRIGGER O.S.
0 0 1
0 1 2
1 0 4
1 1 6
MSb bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 LSb
0 R1 R0 F1 F0 POL TM SD
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Register Pointer
The four DS75 registers each have a unique two-bit
pointer designation, which is defined in Table 7. When
reading from or writing to the DS75, the user must “point”
the DS75 to the register that is to be accessed. When
reading from the DS75, once the pointer is set, it will
remain pointed at the same register until it is changed.
For example, if the user desires to perform consecutive
reads from the temperature register, then the pointer only
has to be set to the temperature register one time, after
which all reads will automatically be from the temperature
register until the pointer value is changed. On the other
hand, when writing to the DS75, the pointer value must be
refreshed each time a write is performed even if the same
register is being written to twice in a row.
At power-up, the default pointer value is the temperature
register so the temperature register can be read immedi-
ately without resetting the pointer.
Changes to the pointer setting are accomplished as
described in the 2-WIRE SERIAL DATA BUS section of
this datasheet.
2-Wire Serial Data Bus
The DS75 communicates over a standard bi-directional
2-wire serial data bus that consists of a serial clock (SCL)
signal and serial data (SDA) signal. The DS75 interfaces
to the bus via the SCL input pin and open-drain SDA I/O
pin. All communication is MSb first.
The following terminology is used to describe 2-wire
communication:
Master Device: Microprocessor/microcontroller that con-
trols the slave devices on the bus. The master device gen-
erates the SCL signal and START and STOP conditions.
Slave: All devices on the bus other than the master. The
DS75 always functions as a slave.
Bus Idle or Not Busy: Both SDA and SCL remain high.
SDA is held high by a pullup resistor when the bus is idle,
and SCL must either be forced high by the master (if the
SCL output is push-pull) or pulled high by a pullup resistor
(if the SCL output is open-drain).
Transmitter: A device (master or slave) that is sending
data on the bus.
Receiver: A device (master or slave) that is receiving data
from the bus.
START Condition: Signal generated by the master to
indicate the beginning of a data transfer on the bus. The
master generates a START condition by pulling SDA from
high to low while SCL is high (see Figure 6). A “repeated”
START is sometimes used at the end of a data transfer
(instead of a STOP) to indicate that the master will per-
form another operation.
STOP Condition: Signal generated by the master to indi-
cate the end of a data transfer on the bus. The master
generates a STOP condition by transitioning SDA from low
to high while SCL is high (see Figure 6). After the STOP is
issued, the master releases the bus to its idle state.
Acknowledge (ACK): When a device (either master
or slave) is acting as a receiver, it must generate an
acknowledge (ACK) on the SDA line after receiving every
byte of data. The receiving device performs an ACK by
pulling the SDA line low for an entire SCL period (see
Figure 6). During the ACK clock cycle, the transmitting
device must release SDA. A variation on the ACK signal is
the “not acknowledge” (NACK). When the master device
is acting as a receiver, it uses a NACK instead of an ACK
after the last data byte to indicate that it is finished receiv-
ing data. The master indicates a NACK by leaving the
SDA line high during the ACK clock cycle.
Table 7. Pointer Definition
REGISTER P1 P0
Temperature 0 0
Conguration 0 1
THYST 1 0
TOS 1 1
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Slave Address: Every slave device on the bus has a
unique 7-bit address that allows the master to access that
device. The DS75’s 7-bit bus address is 1 0 0 1 A2 A1
A0, where A2, A1 and A0 are user-selectable via the cor-
responding input pins. The three address pins allow up to
eight DS75s to be multi-dropped on the same bus.
Address Byte: The control byte is transmitted by the
master and consists of the 7-bit slave address plus a
read/write (R/W) bit (see Figure 7). If the master is going
to read data from the slave device then R/W = 1, and if
the master is going to write data to the slave device then
R/W = 0.
Pointer Byte: The pointer byte is used by the master to
tell the DS75 which register is going to be accessed dur-
ing communication. The six LSbs of the pointer byte (see
Figure 8) are always 0 and the two LSbs correspond to
the desired register as shown in Table 7.
Figure 7. Address Byte
Figure 8. Pointer Byte
Figure 6. START, STOP, and ACK SIGNALS
SCL
SDA
START
CONDITION
ACK (OR NACK)
FROM RECEIVER
STOP
CONDITION
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
1001A2A1A0R/W
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
0 0 0 0 0 0 P1 P0
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General 2-Wire Information
● All data is transmitted MSb first over the 2-wire bus.
● One bit of data is transmitted on the 2-wire bus each
SCL period.
● A pullup resistor is required on the SDA line and, when
the bus is idle, both SDA and SCL must remain in a
logic-high state.
● All bus communication must be initiated with a START
condition and terminated with a STOP condition.
During a START or STOP is the only time SDA is
allowed to change states while SCL is high. At all other
times, changes on the SDA line can only occur when
SCL is low: SDA must remain stable when SCL is high.
● After every 8-bit (1-byte) transfer, the receiving device
must answer with an ACK (or NACK), which takes one
SCL period. Therefore, nine clocks are required for
every one-byte data transfer.
Writing to the DS75
To write to the DS75, the master must generate a START
followed by an address byte containing the DS75 bus
address. The value of the R/W bit must be a 0, which
indicates that a write is about to take place. The DS75
will respond with an ACK after receiving the address byte.
This must be followed by a pointer byte from the master,
which tells the DS75 which register is being written to. The
DS75 will again respond with an ACK after receiving the
pointer byte. Following this ACK the master device must
immediately begin transmitting data to the DS75. When
writing to the configuration register, the master must send
one byte of data (see Figure 9a), and when writing to the
TOS or THYST registers the master must send two bytes
of data (see Figure 9b). After receiving each data byte,
the DS75 will respond with an ACK, and the transaction is
finished with a STOP from the master.
Reading from the DS75
When reading from the DS75, if the pointer was already
pointed to the desired register during a previous trans-
action, the read can be performed immediately without
changing the pointer setting. In this case the master
sends a START followed by an address byte containing
the DS75 bus address. The R/W bit must be a 1, which
tells the DS75 that a read is being performed. After the
DS75 sends an ACK in response to the address byte,
the DS75 will begin transmitting the requested data on
the next clock cycle. When reading from the configura-
tion register, the DS75 will transmit one byte of data, after
which the master must respond with a NACK followed by
a STOP (see Figure 9c). For two-byte reads (i.e., from the
Temperature, TOS or THYST register), the DS75 will trans-
mit two bytes of data, and the master must respond to the
first data byte with an ACK and to the second byte with
a NACK followed by a STOP (see Figure 9d). If only the
most significant byte of data is needed, the master can
issue a NACK followed by a STOP after reading the first
data byte in which case the transaction will be the same
as for a read from the configuration register.
If the pointer is not already pointing to the desired register,
the pointer must first be updated as shown in Figure 9e,
which shows a pointer update followed by a single-byte
read. The value of the R/W bit in the initial address byte
is a 0 (“write”) since the master is going to write a pointer
byte to the DS75. After the DS75 to the address byte with
an ACK, the master sends a pointer byte that corresponds
to the desired register. The master must then perform a
repeated start followed by a standard one or two byte
read sequence (with R/W =1) as described in the previ-
ous paragraph.
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Figure 9. 2-Wire Interface Timing
(DS75) (DS75)
AD2D6 D5 D4 D3 D1 D0A0 WAA1 0 0 0 0 00 0 1 A D7A2
a) Write to the Configuration Register
S 1 10 0
Address ByteSTART
SCL
SDA
ACK Pointer Byte
P
Data Byte
(from Master)
STOP
ACK ACK
(DS75)
b) Write to the T
OS
or T
HYST
Register
A2 A1 A0
SCL
SDA S11
00 W A
Address Byte
START ACK
(DS75)
A
00 0 0 0 0P1 P0
Pointer Byte ACK
(DS75)
D4
D6 D5 D3 D2 D0D7D6 D5 D4 D3 D2 D1 D0
D7 A
D1 P
LS Data Byte
(from Master)
A
MS Data Byte
(from Master)
STOP
ACK
(DS75)
ACK
(DS75)
S
c) Read From the Configuration Register (current pointer location)
SCL
SDA
START
N
D6 D5 D4 D3 D2 D1 D0 P
D7
11
0 0 A2 A1 A0 R A
Data Byte
(from DS75)
STOP
NACK
(Master)
Address Byte ACK
(DS75)
S
d) Read 2-Bytes From the Temperature, TOS or THYST Register (current pointer location)
SCL
SDA
START
A
D6 D5 D4 D3 D2 D1 D0
D7
11
0 0 A2 A1 A0 R A
MS Data Byte
(from DS75)
ACK
(Master)
Address Byte ACK
(DS75)
N
D6 D5 D4 D3 D2 D1 D0 PD7
LS Data Byte
(from DS75)
STOP
NACK
(Master)
N
A 0S 1 1
0 0 A2 A1 A0 W0 0 0 A
00 D6 D5 D4 D3 D2 D1 D0 P
D7
S 1 1
0 0 A2 A1 A0 R A
e) Read Single Byte (new pointer location)
ACK
(DS75)
Repeat
START
SCL
SDA
Address Byte
START Pointer Byte Data Byte
(from DS75)
STOP
NACK
(Master)
Address Byte
ACK
(DS75)
ACK
(DS75)
P1 P0
DS75 Digital Thermometer and Thermostat
www.maximintegrated.com Maxim Integrated
│
13
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 10/07 Initial release —
1 2/08 Deleted all references to ip-chip package and added registered trademark
symbol to µMAX 1, 2
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
DS75 Digital Thermometer and Thermostat
© 2008 Maxim Integrated Products, Inc.
│
14
Revision History
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
