MB3775PFV - Fujitsu - Pdf.Support

DS04-27204-3E

FUJITSU SEMICONDUCTOR

DATA SHEET

ASSP

SWITCHING REG ULATOR

CONTROLLER

MB3775

LOW VOLTAGE DUAL PWM SWIT CHING

REGULATOR CONTROLLER

The MB3775 is a dual puls e-wi dth-modul ation cont rol circui t. It contains t he basic

circuits required for two PWM control circuits. Complete synchronization is

obtained by u sing the same osc il lator output wa ve fo rm.

This IC can provide following types of output voltage: step down, step up, and

inverter. Power consumption is low, thus the MB3775 is ideal for use in high-

effi ciency port able equipment.

•Wide supply voltage range: 3.6 V to 18 V

•Low cu rrent consumption: 1.3 mA typical

•Wide oscil lation f requency range: 1 kHz to 500 kHz

•On-chip timer latch short prot ection ci rcuit

•On-chip under vol tage lockout protect ion

•On-chip r eference v oltage: 1. 28 V

•Variab le dead time provides control over total oper ating range.

*: The package s are mounted on the epoxy boar d (4 cm x 4 cm x 1.5 mm)

NOTE : P ermanent device damage ma y oc cur i f the abo v e Absolut e Maxim um

Ratings ar e ex ceede d. Functi onal ope r ation s hould be r estricted t o th e

conditions as detailed in t he operational sections data sheet . Exposure

to absolute maximum rating conditions for extended periods may affect

dev ic e reliabi lit y.

ABSOLUTE MAXIMUM RATINGS (see NO T E) (Ta = 25°C)

Rating Symbol Condition Value Unit

Power Suppl y Voltage VCC 20 V

Error Amp. Input Voltage VI-0.3 to +10 V

Colle c tor Ou tput V o ltage VO20 V

Colle ctor Output Current IO75 mA

Power Dissipation PD

Ta ≤ 25 °C(SOP) *620 mW

Ta ≤ 25 °C(DIP) 1000 mW

Ta ≤ 25°C(VSOP) *430 mW

Operating Temperature TOP -30 to +85 °C

Storage temperat ure Tstg -55 to+125 °C

116

PIN ASSI GNMENT

(TOP VIEW)

(DIP-16P-M04)

(FPT-16P-M06)

(FPT-16P-M05)

+IN1

-IN1

FB1

D.T.C.1

OUT1

E/GND

VREF

SCP

+IN2

-IN2

FB2

D.T.C.2

OUT2

VCC

This device contains circuitry to protect the inputs against

damage due to high static v oltages or elec tri c fi elds . Howe ver ,

it is advised that normal precautions be taken to avoid

application of any voltage higher than maximum rated voltages

to this high impedance circuit.

MB3775

■BLOCK DIAGRAM

■RECOMMENDED OPERATING CONDITIONS

Parameter Symbol Value Unit

Min Typ Max

Power Supply Voltage VCC 3.6 6.0 18 V

Error Amp. Input Volt age VI-0.2 – 1.45 V

Collector Output Volt age VO––18 V

Collector Output Current IO0.3 – 50 mA

Phase Comp ensat ion Capacitor CP–0.1– µF

Timing Capacitor CT150 – 15000 pF

Timing Resistor RT5.1 – 100 kΩ

Oscillato r Frequency fOSC 1–500kHz

Refer ence Vo l tag e Output Cur rent I REF -3 -1 – mA

Operating Temp erature TOP -30 25 85 °C

912

116

OUT 1

OUT 2

PWM Comp 1

PWM Comp 2

Error Amp 1

Error Amp 2

2.5V

1.1V

S.C.P. Comp

1.9V -

1.3V -

1µA

2.5V

Latch

U.V.L.O.

1.8V

D.T.C. Comp

1.28V 0.9V 0.9V

GND

VREF=1.28V

VCC

Triangular

Waveform

Reference

Voltage

MB3775

■OPERATION DESCRIPTION

1. Reference voltage

The reference v oltage circuit generates a stable, temperatur e-compens ated 2.5 V reference from Vcc (pin 9) for use by internal

circuits.

A reference voltage of temperatu re compensated 1/2 Vref can be obtained to external circuit by Vre f termin al ( pin 16).

2. Oscillator

A triangular waveform of any frequency is obtained by connecting an external capacitor and resistor to the CT (pin 1) and RT

terminal s (pi n 2).

The amplitude of this waveform is from 1.3 V to 1.9 V. The oscillator is inter nally connected to the non-inver ting inputs of the

PWM comparators . The oscillator waveform is availab le at the CT terminal .

3. Error amplifiers

The error amplifier detects the output volta ge of t he swi tching regulator.

The common-mode input voltage range is -0.2 V to 1.45 V, so the input reference voltage can be set the VREF and GND levels.

Error amp li fiers can be use d as eit her inverting and non- inverting amplifi ers.

The voltage ga in is fixed. Phas e com pensation is possible by connecting a capacit or to the FB terminals (pins 5 and 12) of the

error am pli fiers.

The error amplifier output are internally connected to the inverting inputs of the PWM comparators and also to the short protection

circuit.

4. Timer latch short protection circuit

The timer latch short p rotecti on circui t detects the output levels of the error amplifiers. If one or both error ampli fier out put s are

1.1 V or lower, the timer circuit begins charging the exter nally connected protection enable capacitor.

If th e output level of the error amplifier does not drop bel ow the normal voltage range before the capa citor voltag e reaches the

transistor base-emitter voltage VBE ( 0.65 V), the latch circuit turns the output drive transistor off and sets the dead time to 100 %.

5. Under voltage lockout protection circuit

An ambiguous transition state at power-on or a momentary fluctuation in the supply line may result in loss of control and may

adv ersely af fect or e ven des troy the system. The under v oltage lock out p rot ection c ir cuit compar es the internal reference vo ltage

level with the supply voltage level. If the supply voltage level falls below the reference level the latch circuit is reset the o ut pu t

drive tr ansistor is turned of f and t he dead ti m e is set to 100 %. The prote cti on enab le t erminal (pin 15) is pul led “Low”.

6. PWM comparator

Each PWM co mpar ator has two i n verting inputs and one non- inverting i nput. This v olt age- to-pulse- wi dth con v ert er cont rols the

output pulse width according t o the i nput voltage.

The PWM comparator turns the output drive transistor on when the oscillator triangular wa veform is higher than the error amplifier

output and the dead tim e control terminal v oltage.

7. Output drive transistor

The open-collector output-drive transistors provide common-emitter output of 18 V dielectric capability. The output drive tran-

sistors can source up to 50 mA of drive current to the switching power transistor.

MB3775

■ELECTRICAL CHARACTERISTICS

Reference Secti on

Under Voltage Lockout Prot ection Section

Pr ot ec tion C ir c uit S e ctio n

Triangular W aveform Oscillat or Section

Dead-Time Control Secti on

(Ta=25°C, VCC=6V)

Parameter condition

Symbol

Value Unit

Min Typ Max

Out put Voltage IOR =-1 mA VREF 1.26 1.28 1.30 V

Out put Tem p. Stability Ta = -30 °C to +85 °CVRTC -2±0.2 2 %

Input Stabi lity VCC = 3.6 V to 18 V Line –210mV

Load Stabi lity IOR = -0.1 mA to -1 mA Load –17.5mV

Sho rt Circuit Output Current VREF = 0 V IOS ––

30 –10 mA

Threshold Voltage IOR = -0.1 mA VtH –2.72 –V

IOR = -0.1 mA VtL –2.60 –V

Hysteresis Width IOR = -0.1 mA VHYS 80 120 –mV

Reset Voltage (VCC)VR1.5 1.9 –V

Input Threshold Voltage VtPC 0.60 0.65 0.7 V

Input Stand by Voltage No pull up VSTB –50 100 mV

Input Latch Volt age No pull up VI–50 100 mV

Input Source Current Ibpc -1.4 -1.0 -0.6 µA

Comparator Threshold Vol tage Pin 5, Pin 12 VtC –1.1 –V

Ocillator Frequency CT = 330 pF, RT = 1 5 k ΩfOSC –200 –kHz

Fr equen cy Deviation CT = 330 pF, RT = 1 5 kΩfdev –10 –%

Fr equen cy Stability (VCC)V

CC = 3.6 V to 18 V fdV –1–%

Fr equen cy Stability (Ta)T

a = -30 °C to +85 °C fdT -4–4%

Input Threshold Volt age

(fOSC = 10 kHz) Duty Cycle = 0 % Vt0 –1.0 VREF

-0.15 V

Duty Cycle = 100 % Vt100 0.2 0.4 –V

Input Bias Current Ibdt –-0.2 –1µA

Latch Mode Source Current Vdt = 0.7 V Idt –-150 -80 µA

Latch Input Volt age Idt=-40 µAVdt VREF

-0.1 ––V

MB3775

■ELECT R ICAL CHARACTERISTICS (Continued)

Error Amp. Section

PWM Comparator Section

Output Sect ion

(Ta=25°C, VCC=6V)

Parameter Condition

Symbol

Value Unit

Mi n Typ Max

Input Offset Voltage VO = 1.6 V VIO -10 – +10 mV

Input Offset Current VO = 1.6 V IIO -100 – +100 nA

Input Bi as Current VO = 1.6 V IB-500 -100 – nA

Common Mode Input Volt age Range VCC=3.6V to 18V VICR -0.2 – +1.45 V

Voltage Gai n AV84 120 – V/V

Fr equ enc y Band Width AV = -3 dB BW – 3 – MHz

Common Mode Rejecti on Ratio CMRR 60 80 – dB

Max. Output Vol tage Widt h VOM+ 2.2 2.4 – V

VOM- –0.70.9V

Output Sink Current VO = 1.6 V IOM+ 24 50 – µA

Output Sou rce Current VO = 1.6 V IOM- – -1.2 -0.7 mA

Input Threshold Voltage

(fOSC=10 kH z) Duty Cycle = 0 % Vt0 –1.92.1V

Duty Cycle = 100 % V t100 1.05 1.3 – V

Input Si nk Current Pin 5, Pin 12 = 1.6 V IIN+ 24 50 – µA

Input Source Current Pin 5, Pin 12 = 1.6 V IIN- – -1.2 -0.7 mA

Output Leak Curre nt VO=18V Leak – – 10 µA

Output Saturation Vo ltage IO=50 m A V SAT –1.11.4V

Stand by Current Output “OFF” ICCS –1.31.8mA

Average Supply Current RT=15kΩICCa –1.72.4mA

MB3775

■TEST CIRCUIT

■TIMING CHART (Internal Wave form)

SW TEST INPUT

OUTPUT 1

OUTPUT 2

TEST INPUT

330pF

0.1µF

12345678

16 15 14 13 12 11 10 9

MB3775

CPE

VCC=6V

15kΩ

4.7kΩ

1.9V

1.5V

1.3V

1.1V

“High”

“Low”

“High”

“Low”

0.6V

“High”

“Low”

3.6V

0 V

2.8 V (Typ. Value)

tPE

DEAD TIME 100%

LOCK-OUT CANCEL

Protection Enable Time tPE 0. 6 x 106 x CPE (sec)

LOCK-OUT

Error Amp. outpu t

Tr iang ul ar wavefor m os il lator ou tp ut

Dead Time PWM

input voltage

Short circuit protection

comparator Referenc e

PWM comparator

Output Transistor

collector waveform

S. C . P. Termina l

Short circuit protection

comparator output

Power supply voltage

(VCC : Min. Value )

input

output

waveform

MB3775

■APPLICATION CIRCUIT

MB3775

116

215

314

413

820pF

10kΩ

2.3kΩ

33kΩ

0.1µF

33kΩ

1µF

33kΩ

1µF

330Ω

9.1kΩ

330Ω

33kΩ

120µH

220µF220µF

470Ω

120µH

5.6kΩ

1.9kΩ

0.1µF

220µF

56µH

VIN (10V)

V0- (-5V) GND V0+ (+5V)

470Ω

820pF

10kΩ

2.3kΩ

33kΩ

0.1µF

33kΩ

1µF

33kΩ

1µF

330Ω

9.1kΩ

330Ω

33kΩ

120µH

220µF220µF

100Ω

120µH

16kΩ

1.9kΩ

0.1µF

220µF

56µH

VIN (5V)

V0- (-5V) GND V0+ (+12V)

3.9kΩ

MB3775

116

215

314

413

Fig. 1 - Chopper Type Step Down/Inverting

Fig. 2 - Chopper Type Step Up/Inverting

MB3775

■APPLICATION CIRCUIT (Continued)

MB3775

116

215

314

413

820pF

10kΩ

2.3kΩ

33kΩ

0.1µF

33kΩ

1µF

33kΩ

1µF

9.1kΩ

33kΩ

120µH

220µF220µF

1.9kΩ

0.1µF

220µF

56µH

VIN (5V)

V0- (-5V) GND V0+ (+12V)

16kΩ

150Ω

120µH

470Ω

330pF

33kΩ

220Ω

470Ω

1µF

33kΩ

1.9kΩ

0.1µF

56µH

VIN (1 0V)

V02-

(-12V)

220µF

V01-

(-5V) GND V02+

(+5V) V01+

(+12V)

220µF

820pF

10kΩ

33kΩ

220Ω

1nF

1.8kΩ

0.1µF

5.6KΩ

MB3775

116

215

314

413

Fig. 3 - Chopper Type Step Up/Inverting (For High Speed)

Fig. 4 - M ulti Output Type (Apply Transformer)

MB3775

■HOW TO SET OUTPUT VOLTAGE

The output vol tage is set using the connection shown in Fig. 5 and 6.

The error amplifiers are supplied to the internal reference voltage circuit as are the other internal circuits. The

common -mode in put voltage rang e is from -0.2 V to +1. 45 V.

When the a mplifiers are operated non-inverting, tie the inverting terminal to VREF ( 1.28 V). When the amplifiers

are operated inverting, tie the non-in verting terminal to ground.

VREF

PIN 5 or PIN 12

V0+ [V0+ = V REF X (1 + R2/R1)]

Fig. 5 -Connection of Error Amp.

Output Voltage V0 is plus

VREF

-PIN 5 or PIN 12

V0- [V0- = -VREF X (R2/R1)]

Fig. 6 -Connection of Error Amp.

Ou t put Voltag e V 0 is minus

MB3775

■HOW TO SET TIME CONSTANT FOR TIMER LATCH SHORT PROTECTION CIRCUIT

TIMING CHART shows the configurati on of the protec ti on latch circui t.

Error amplifier outputs, are internally connected to the non-inver ting inputs of the short-circuit protection comparator and are

compared with the reference voltage (1.1 V) connected to the inver ting input.

When the load condition of the switching regulator is stable, the error amplifier has no output fluctuation. Thus, shor t-circuit

protection control is also kept in balance, and the protect ion enab le terminal (pin 15) voltage is kept at about 50 mV.

If th e load condition dras ti cally changes due to a load sho rt -circuit and if lo w-l evel signals (1.1 V or lower) are input to th e non-

inverting inputs of the short-circuit protection comparator from the error amplifiers, the short-circuit protection comparator outputs

a “ Lo w” l e v e l to turn tr an si sto r Q1 off. The protect ion enab l e terminal v ol tage is disc harg ed, and the n the short-circ uit pr otecti on

comparator charges the externally connected protection enable capacitor CPE according to the following formula:

VPE = 50 mV + tPE x 10-6/CPE

0.65 = 50 mV + tPE x 10-6/CPE

CPE = tPE/0.6 (µF)

When the protection enable capacitor charges to about 0.65 V, the protection latch is set to enable the under voltage lockout

protection cir cuit and to turn the output drive transis tor off. The dead time is set to 100 %.

Once the under voltage lockout protection circuit is enabled, the protection enable is released; however, the protection latch is

not reset if the power is not turned off.

The non- inv erting inputs of the D .T.C . comparator a re connected to the D .T.C. termi nals (pins 6 and 11 ) through the pow er supply

(about 0.9 V) and are compared with a reference voltage (about 1.8 V) connected to the inverting input.

To prevent malfunction of the shor t protection circuit in soft-start mode (using D.T.C. term inals), the D.T.C. comparator outputs

a “High” level to turn Q2 on until the D.T.C. terminal voltage drops to about 0.9 V.

Error Amp .1

Error Amp.2

1.1V

S.C.P.Comp. R1

Q1Q2Q3

CPE

Latch U.V.L.O.

1µA

2.5V

D.T.C.1

D.T.C.2

D.T.C.Comp.

1.8V 0.9V 0.9V

Fig. 7 - Protection Latch Circuit

MB3775

■SYNCHRONIZATION OF ICs

To synchronize MB3775 ICs, first, the specified capacitor and resistor are connected to the CT and RT terminals of the master

IC to star t self oscillation. Next, 2 V is applied to the RT term inals of the slave ICs to disable the charge/discharge circuit for

trian gular wave oscillation. Final ly, the CT terminal s of the master and slave ICs are connected.

Instead of applying VRT to the RT t erminals, th ese terminals can be pulled u p by a resis tor (see re sistance indicate d by the da shed

lin e in Fig. 8). Select the pull-up resistan ce R pull from the formula given below.

VCC

0.5 x N ≤ Rpull Rpull: Pull up Resistor (kΩ)

VCC: Power Supply Voltage (V)

N: Number of Sl ave ICs

MB3775

VRT

Rpull CTRT

VCC

Fig. 8 - Connection of Master, Slave

(MASTER)

(SLAVE)

MB3775

■TYP ICAL PERFORMANCE CHARACTERISTICS

2.0

1.5

1.0

0.5

05101520 05101520

2.0

1.5

1.0

0.5

2.0

1.5

1.0

0.5

05101520

1.29

1.28

1.26

-30 0306090

1.25

3.0

2.0

1.0

0100 1K 10K 100K 1M

3.5

3.0

2.5

2.0

1.5

1.0

0.5

050 100 150 350200 250 300

Fig. 9 - Power supply voltage vs. Reference voltage Fig. 10 - Pow er supply voltag e vs. Average suppl y curr ent

Fig. 12 - Reference voltage vs. Temp.

Fig. 13 - Collector saturation voltage vs. Sink current Fig. 14 - Er ror Amp. Max. ou tput voltage vs. Fr equency

Power supply voltage VCC (V) Power supply voltage VCC (V)

Power supply voltage VCC (V) Temp. Ta (5C)

Sink current lO (mA) Frequency f(Hz)

1.27

Fig. 11 - Power su pply voltage vs. Stand by curren t

Reference voltage V REF(V)

Average supply current I (mA)

Stand by current ICCS (mA)

Collector saturation vo ltage VSAT (V)

Error Amp Max output voltage VOM (V) Reference voltage VREF (V) CCa

MB3775

■TYP ICAL PERFORMANCE CHARACTERISTICS (Continued)

100k

10k

1001K 10K 100K 1M 10M 101102103104105

103

102

101

100

10-1

1011021031041051K 10K 100K 1M 10M

2.2

2.0

1.8

1.4

1.0

1.6

1.2

-20

-60

-40

180

-90

-180

-20

-60

-40

-20

-60

-40

100102103107

105

101104106

100102103107

105

101104106

180

-90

-180

180

-90

-180

CFB=1µF CFB=0.1µF

Fig. 15 - Timing resistor vs. Oscillation Frequency Fig. 16 - Triangular waveform cycle vs. Timing capacitor

Fig. 17 - Timing capacitor vs. Triangular waveform Max. Amplitude volt age Fig. 18 - Frequency vs. Gain/Phase

Fig. 19 - Frequency vs. Gain/Phase (Actual Data) Fig. 20 - Fr equency vs. Gain/Phase (Actual Data)

CT=150pF

CT=1500pF

CT=15000pF

Timing resistance=15kΩ

VCC=6V

Timing resistance=15kΩ

VCC=6V

Gain

Timing resistor RT (Ω)Timi ng capacitor CT (pF)

Timing capacitor CT (pF) Frequency f(Hz)

Frequency f(Hz) Frequency f(Hz)

Phase

Gain

Phase

Gain

Phase

Timing resistor fOSC (Hz)Triangular waveform Max. Amplitude voltage (V)

Gain AV(dB)

Tr iang ular wav ef orm cy cle (µsec)

Phase ϕ (de g) Phase ϕ (deg)

Gain AV(dB)

Phase ϕ (de g)

Gain AV(dB)

MB3775

■TYP ICAL PERFORMANCE CHARACTERISTICS (Continued)

-20

-60

-40

100102103107

105

101104106

180

-90

-180

Fig. 21 - Frequency vs. Gain/Phase (Actual Data)

Frequency f(Hz)

Gain

Phase

Gain A (dB)

Phase ϕ (deg)

CFB=0.01µF

MB3775

■APPLICATION

1. How to set the error amplifier frequency characteristic

Figure 22 shows the equivalent circuit of the error am plifier.

The fr equency charac teristic of the err or amplif ie r is set by R1, R2, and CP . The high-frequency gain is set by the ratio of resistors

R1 and R2 in the IC (set value 0 dB).

When CP = 0.1 µF, the gain at 20 kHz ≤ f ≤ 5 MH z is about 0 dB. The roll -off f requency is adjusted by changing ex ternal phase

comp ensating capacitor CP (see Fig. 24).

When high fr eque ncy gain i s n eeded or the phase mus t be adv anced at a lo w f requenc y, conne ct a re sisto r RP b etw een the FB

terminal and CP as shown in Figure 23 (see Fig. 25).

NOTE: As s hown abo ve, the f requency chara cte rist ic of the e rr or amplifier is set b y the external phase compensating c apacitor

CP.

When a ceram ic c hip capa ci tor mus t be used t o meet the r equi rements of a sm all system, be c areful of i ts te mper ature

characteristic. (-30 °C 1/5 and 80 °C 1/3 f or the frequency characteristic, so a sufficient phase margin must be allowed

for at room temperature.) Ceramic chip capacitors with a low temperature characteristic (B characteristic) or film

capacitors ar e recommended (see Fig. 26 to 28).

R1 38 kΩPWM COMP

[- IN]

[+ IN]

[FB]

R2 470 Ω

x 12 0

Error Amp.

Fig. 22 - Error Amp. Equivalent Circuit

PWM COMP

[- IN]

[+ IN]

[FB]

x 120

Error Amp .

Fig. 23 - Error Amp. Equivalent Circuit (Insert RP)

R1 38 kΩ

R2 470 Ω

..=

MB3775

Gain AV(dB) Gain AV(dB)

-20

-40

-60

-20

-40

-60

10 100 1k 10k 100k 1M 10M 100M

100 1k 10k 100k 1M 10M 100M10

180

-90

-180

180

-90

-180

RP=0Ω

CP=0.1µF

AVCP=0.1µF

(Large)

(Small)

Frequency f(Hz)

Fig. 24 - Error Amp. Frequency characteristics

Freq uency f(Hz)

Fig. 25 - Error Amp. Frequency characteristics

Phase ϕ (deg)

MB3775

Gain AV(dB) Gain AV(dB) Gain AV(dB)

-10

-20

-10

-20

-10

-20

1K 10K 100K 1M

1K 10K 100K

1K 10K 100K 1M

-90

-30°C

80°C

25°C

80°C

25°C

80°C

-30°C, 25°C, 80°C

-30°C,

25°C

80°C

Frequency f(Hz)

-90

-30°C

25°C

80°C

-30°C

25°C

Fig. 26 - Ceramic Chip Capacitor (0.1 µF)

Temp. characteristic

Temp. : Ratio

Temp. characteristic

Temp. : Ratio

Temp. characteristic

Fig. 27 - Tantal Capacitor (0.33 µF)

Fig. 28 - Fi lm Capacitor (0.1 µF)

-30°C:0.19

25°C:1.0

80°C:0.32

-30°C :0.95 to 1.05

25°C:1.0

80°C :0.95 to 1.05

-30°C :0 . 9 to 1.1

25°C:1.0

80°C :0 .9 to 1.1

-30°C

Phase ϕ (deg)

Phase ϕ (deg)Phase ϕ (de g)

MB3775

2. Effect of equivalent series resistance of smoothing capacitor

The equivalent series resistance (ESR) of the smoothing capacitor in the DC/DC conv erter g reatly aff ects the loop phase characteristic.

A smoothing ca pacitor with a lo w ESR reduces system stability by increasin g the phase sh if t i n the hi gh-f requency regi on (see Fi g. 30) .

Therefore, a smoothing capacitor with a high ESR will improve system stability. Be careful when using low ESR semiconductor electrolytic

capacit ors (OS-CON) and tant alum capac it ors.

VIN DR

Fig. 29 - Step Down DC/DC Converter Basic Circui t

-20

-40

-60

10 100 1K 10K 100K 10 100 1K 10K 100K

-90

-180

: RC=0Ω

: RC=31mΩ

Frequency f(Hz) Frequency f(Hz)

Fig. 30 - Gain vs. Frequency Fig. 31 - Phase vs. Frequency

(1)

(2)

(1)

(2)

: RC=0Ω

: RC=31mΩ

(1)

(2)

Gain AV (dB)

Phase ϕ (deg)

MB3775

Reference data

If an aluminum electrolytic smoothing capacitor (RC 1.0Ω) is replaced with a low ESR semiconductor electrolytic

capaci tor (OS-CON: RC 0.2 Ω), th e phase shift is reduced by half (see Fig. 33 and 34).

- IN

+ IN

VOUT V0+

VREF

VIN

0.1µF

Error Amp.

Fig. 32 - DC/DC Converter AV vs. ϕ characteri stic Test Circuit

AV vs. ϕ characteristic

Bet w ee n thi s po int.

-20

-40

-20

-40

10 100 1K 10K 100K

10 100 1K 10K

OS-CON

220µF(16V)

RC 1.0Ω : fosc=1KHz

AI Capacitor

22µF(16V)

RC 0.2Ω : fosc=1kHz

GND

V0+

62°

27°

100K

180

-90

-180

180

-90

-180

Frequency f(Hz)

Fig. 33 - DC/DC Converter +5 V output

Fig. 34 - DC/DC Converter +5 V output

Gain A (dB)

Phase ϕ (deg)

Gain AV (dB)

Phase ϕ (deg)

VCC=10V

RL=25Ω

CP=0.1µF

VCC=10V

RL=25Ω

CP=0.1µF

MB3775

3. Mea su res for en su r in g sy st em st ab il ity w he n a low ES R sm o o thi ng ca p ac it or i s us ed

When a lo w ESR smoothing capacitor is used in the DC/DC con verter, only the L and C are apparent ev en in the high-frequen cy region,

and the phase is delayed by almost 1805. Consequently, the system phase margin and stability are reduced. On the other hand, a

low ESR capaci tor is needed to reduce the amount of output ripple. This is contrary to the s ystem stabil ity e xplai ned abov e .

To s olv e thi s prob lem, phase com pensati on can be used. This method i ncre ases the phase mar gin by adv anc ing the phas e when the

phase m argin i s reduced by a low ESR capacitor.

The three sugges tions list ed below are rec ommended f or DC/DC conv e rters usi ng the MB3775.

(1) As shown in Fig. 35, a capacitor is connected in parallel with the output feedback resistor to advance the phase. Use the

formula below as a guidel ine for the capaci tance .

C11

2πfR2

Unstab le F requency (See Fig. 32)

+ IN +

V0+

VREF

- IN

Fig. 35 - External cir cuit example1 to advance the phase

-20

-4010 100 1K 10K 100K

180

-90

-180

66°

VCC=10V

RL=25Ω

CP=0.1µF

Smoothing Capacitor

22µF OS-CON

C1=4700pF

R1=1.8kΩ

R2=5.6Ω

Fr eq uenc y f(H z )

Fig. 36 - DC/DC Converter +5 V output

Gain AV (dB)

Phase ϕ (deg)

MB3775

3. Measures for ensuring system stability when a low ESR smoothing capacitor is used

(Continued)

(2) As shown in Figure 37, a r esistor (R P) is connected bet ween the FB terminal and CP of the error amplifier to advanc e the phase .

The more RP is incr eased, the more the phase is adv ance d. Ho we v er, the gain in the high-frequency range is also i ncreased,

which causes instability. Therefore, select the optimum resistanc e (see Fig. 38).

+ IN +

V0+

VREF

- I N

Fig. 37 - External cir cu it example 2 to advance the phase

VCC=10V

RL=25Ω

CP=0.1µF

Smoothing Capacitor

22µF OS-CON

RP=470Ω

R1=1.8kΩ

R2=5.6Ω

45°

-20

-4010 100 1K 10K 100K

180

-90

-180

Frequency f(Hz)

Fig. 38 - DC/DC Converter +5 V output

Gain AV (dB)

Phase ϕ (deg)

MB3775

(3) As shown i n Fi g. 39, the phase is adv anced b y using both e xample 1 and 2 (Fig. 35 and 37).

4. Error amplifier input ripple voltage

The boost circuit for charging the phase com pensating capacitor CP is connected to the error ampl if ier as shown in Figure 40

to prot ect against output volt age ov erl oad at pow er-on.

A 15 mV offset voltage i s provided for the negati ve input side so that the boost circui t onl y operates at power-on. When a

capaci to r is connect ed in par alle l wit h the out put f eedb ac k resist or, beca use the out put rippl e is too larg e or f or advanced phase

compensation, the boost circuit starts operating, which may degrade regulation if the differential input voltage of the error am-

pli fier exceeds 15 mV. Be careful with th e dif ferential input vol tage of the error amplifier.

+ IN +

V0+

VREF

- IN

Fig. 39 - External cir cuit example 3 to advance the phase

[+ IN]

VREF

[FB]

[- IN]

x 120

15mV

VCC

V0 +

Fig. 40 - Error Amp. /Boost Equivalent circuit

Advanced phase

compensation

capacitor

Boost circuit

Error Amp .

R1 38 kΩ

R2 470 Ω

MB3775

■PACKAGE DIMENSIONS

+.012

–0

+.008

–.012

–0

+.012

+0.30

–0 –0

+0.30

+0.20

–0.30

0.99

3.00(.118)MIN

4.36(.172)MAX

(.244±.010)

6.20±0.25

TYP

7.62(.300)

.060

.770

.039

INDEX-1

MAX

1.27(.050)

1.52

0.25±0.05

(.010±.002)

0.51(.020)MIN

15°MAX

19.55

TYP

2.54(.100)

INDEX-2

(.018±.003)

0.46±0.08

1994 FUJITSU LIMITED D16033S

16 pins, Plastic DIP

(DIP-16P-M04)

Dimensions in mm (inches ).

+0.40

–0.20

+.016

–.008

+0.05

–0.02

+.002

–.001

+0.25

–0.20 +.010

–.008

0.68(.027)MAX

0.18(.007)MAX

0.15(.006)

0.20(.008)

Details of "B" part

"B"

8.89(.350)REF

1.27(.050)

TYP

INDEX 6.80

.268

0.15

.006

10.15 .400

(.307±.016)(.209±.012)

(.018±.004)

(STAND OFF)

(.020±.008)

0.50±0.20

5.30±0.30 7.80±0.40

0.05(.002)MIN

2.25(.089)MAX

0.45±0.10

Details of "A" part

0.20(.008)

0.40(.016)

0.18(.007)MAX

0.68(.027)MAX

"A"

Ø0.13(.005)

0.10(.004)

1994 FUJITSU LIMITED F16015S-2C-4

16 pins, Plastic SOP

(FPT-16P-M06)

Dimensions in mm (inches).

MB3775

+0.20

–0.10

+.008

–.004

+0.10

–0.05

+.004

–.002

+0.05

–0.02

+.002

–.001

INDEX

"A"

0.10(.004)

1.25

.049

0.22

.009 0.15

.006

(.0256±.0047)

(.173±.004) (.252±.008) NOM

6.40±0.20

4.40±0.10 5.40(.213)

0.65±0.12

5.00±0.10(.197±.004)

4.55(.179)REF

Details of "A" part

0 10°

(STAND OFF)

0.10±0.10(.004±.004)

(.020±.008)

0.50±0.20

1994 FUJITSU LIMITED F16013S-2C-4

16 pins, Plastic SOP

(FPT-16P-M05)

Dimensions in mm (i nches ).

MB3775

FUJITSU LIMITED

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Ne w Tech P ark

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F9803

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no tice. Custom ers are advise d to consult with FU JITSU sa les

repres e ntat iv e s before or de rin g.

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as examples of semicon ducto r devic e applications, and are not

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