IIRFR9220TRLPBF - Vishay Presicion Group

Document Number: 91283 www.vishay.com

S-81411-Rev. A, 07-Jul-08 1

Power MOSFET

IRFR9220, IRFU9220, SiHFR9220, SiHFU9220

Vishay Siliconix

FEATURES

• Dynamic dV/dt Rating

• Repetitive Avalanche Rated

• Surface Mount (IRFR9220/SiHFR9220)

• Straight Lead (IRFUFU9220/SiHFU9220)

• Available in Tape and Reel

• P-Channel

• Fast Switching

• Lead (Pb)-free Available

DESCRIPTION

Third Power MOSFETs technology is the key to Vishay

advanced line of Power MOSFET transistors. The efficient

geometry and unique processing of the Power MOSFETs

design achieve very low on-state resistance combined with

high transconductance and extreme device ruggedness.

The DPAK is designed for surface mounting using vapor

phase, infrared, or wave soldering techniques. The straight

lead version (IRFU/SiHFU series) is for through-hole

mounting applications. Power dissipation levels up to 1.5 W

are possible in typical surface mount applications.

Note

a. See device orientation.

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).

b. VDD = - 50 V, Starting TJ = 25 °C, L = 35 mH, RG = 25 Ω, IAS = - 3.6 A (see fig. 12).

c. ISD ≤ - 3.9 A, dI/dt ≤ 95 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.

d. 1.6 mm from case.

e. When mounted on 1" square PCB (FR-4 or G-10 material).

PRODUCT SUMMARY

VDS (V) - 200

RDS(on) (Ω)V

GS = - 10 V 1.5

Qg (Max.) (nC) 20

Qgs (nC) 3.3

Qgd (nC) 11

Configuration Single

P-Channel MOSFET

DPAK

(TO-252)

IPAK

(TO-251)

Available

RoHS*

COMPLIANT

ORDERING INFORMATION

Package DPAK (TO-252) DPAK (TO-252) DPAK (TO-252) DPAK (TO-252) IPAK (TO-251)

Lead (Pb)-free IRFR9220PbF IIRFR9220TRLPbFaIRFR9220TRRPbFaIRFR9220TRPbFaIRFU9220PbF

SiHFR9220-E3 SiHFR9220TL-E3aSiHFR9220TR-E3aSiHFR9220T-E3aSiHFU9220-E3

SnPb IRFR9220 IRFR9220TRLaIRFR9220TRRaIRFR9220TRaIRFU9220

SiHFR9220 SiHFR9220TLaSiHFR9220TRaSiHFR9220TaSiHFU9220

ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage VDS - 200 V

Gate-Source Voltage VGS ± 20

Continuous Drain Current VGS at - 10 V TC = 25 °C ID

- 3.6

ATC = 100 °C - 2.3

Pulsed Drain CurrentaIDM - 14

Linear Derating Factor 0.33 W/°C

Linear Derating Factor (PCB Mount)e0.020

Single Pulse Avalanche EnergybEAS 310 mJ

Repetitive Avalanche CurrentaIAR - 3.6 A

Repetitive Avalanche EnergyaEAR 4.2 mJ

Maximum Power Dissipation TC = 25 °C PD

42 W

Maximum Power Dissipation (PCB Mount)eTA = 25 °C 2.5

Peak Diode Recovery dV/dtcdV/dt - 5.0 V/ns

Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 150 °C

Soldering Recommendations (Peak Temperature) for 10 s 260d

* Pb containing terminations are not RoHS compliant, exemptions may apply

www.vishay.com Document Number: 91283

2S-81411-Rev. A, 07-Jul-08

IRFR9220, IRFU9220, SiHFR9220, SiHFU9220

Vishay Siliconix

Note

a. When mounted on 1" square PCB (FR-4 or G-10 material).

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).

b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL MIN. TYP. MAX. UNIT

Maximum Junction-to-Ambient RthJA - - 110

°C/W

Maximum Junction-to-Ambient

(PCB Mount)aRthJA --50

Maximum Junction-to-Case (Drain) RthJC --3.0

SPECIFICATIONS TJ = 25 °C, unless otherwise noted

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = - 250 µA - 200 - - V

VDS Temperature Coefficient ΔVDS/TJ Reference to 25 °C, ID = - 1 mA - - 0.22 - V/°C

Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = - 250 µA - 2.0 - - 4.0 V

Gate-Source Leakage IGSS V

GS = ± 20 V - - ± 100 nA

Zero Gate Voltage Drain Current IDSS

VDS = - 200 V, VGS = 0 V - - - 100 µA

VDS = - 160 V, VGS = 0 V, TJ = 125 °C - - - 500

Drain-Source On-State Resistance RDS(on) V

GS = - 10 V ID = - 2.2 Ab--1.5Ω

Forward Transconductance gfs VDS = - 50 V, ID = - 2.2 A 1.1 - - S

Dynamic

Input Capacitance Ciss VGS = 0 V,

VDS = - 25 V,

f = 1.0 MHz, see fig. 5

- 340 -

pFOutput Capacitance Coss - 110 -

Reverse Transfer Capacitance Crss -33-

Total Gate Charge Qg

VGS = - 10 V ID = - 3.9 A, VDS = - 160 V,

see fig. 6 and 13b

--20

nC Gate-Source Charge Qgs --3.3

Gate-Drain Charge Qgd --11

Turn-On Delay Time td(on)

VDD = - 100 V, ID = - 3.9 A,

RG = 18 Ω, RD = 24 Ω, see fig. 10b

-8.8-

Rise Time tr -27-

Turn-Off Delay Time td(off) -7.3-

Fall Time tf -19-

Internal Drain Inductance LD Between lead,

6 mm (0.25") from

package and center of

die contact

-4.5-

Internal Source Inductance LS-7.5-

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current ISMOSFET symbol

showing the

integral reverse

p - n junction diode

--- 3.6

Pulsed Diode Forward CurrentaISM --- 14

Body Diode Voltage VSD TJ = 25 °C, IS = - 3.6 A, VGS = 0 Vb--- 6.3V

Body Diode Reverse Recovery Time trr TJ = 25 °C, IF = - 3.9 A, dI/dt = 100 A/µsb- 150 300 ns

Body Diode Reverse Recovery Charge Qrr - 0.97 2.0 µC

Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Document Number: 91283 www.vishay.com

S-81411-Rev. A, 07-Jul-08 3

IRFR9220, IRFU9220, SiHFR9220, SiHFU9220

Vishay Siliconix

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

Fig. 1 - Typical Output Characteristics, TC = 25 °C

Fig. 2 - Typical Output Characteristics, TC = 150 °C

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

www.vishay.com Document Number: 91283

4S-81411-Rev. A, 07-Jul-08

IRFR9220, IRFU9220, SiHFR9220, SiHFU9220

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

Document Number: 91283 www.vishay.com

S-81411-Rev. A, 07-Jul-08 5

IRFR9220, IRFU9220, SiHFR9220, SiHFU9220

Vishay Siliconix

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10a - Switching Time Test Circuit

Fig. 10b - Switching Time Waveforms

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

Pulse width ≤ 1 µs

Duty factor ≤ 0.1 %

D.U.T.

- 10 V

VGS

10 %

90 %

VDS

td(on) trtd(off) tf

www.vishay.com Document Number: 91283

6S-81411-Rev. A, 07-Jul-08

IRFR9220, IRFU9220, SiHFR9220, SiHFU9220

Vishay Siliconix

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit

IAS

0.01 Ω

D.U.T.

VDS

VDD

- 20 V

Driver

15 V

IAS

VDS

QGS QGD

Charge

- 10 V

D.U.T.

- 3 mA

VGS

VDS

IGID

0.3 µF

0.2 µF

50 kΩ

12 V

Current regulator

Current sampling resistors

Same type as D.U.T.

Document Number: 91283 www.vishay.com

S-81411-Rev. A, 07-Jul-08 7

IRFR9220, IRFU9220, SiHFR9220, SiHFU9220

Vishay Siliconix

Fig. 14 - For P-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon

Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and

reliability data, see http://www.vishay.com/ppg?91283.

P.W.Period

dI/dt

Diode recovery

dV/dt

Ripple ≤5 %

Body diode forward drop

Re-applied

voltage

Reverse

recovery

current

Body diode forward

current

= - 10 V*

Driver gate drive

D.U.T. I

waveform

D.U.T. V

waveform

Inductor current

D = P.W.

Period

* VGS = - 5 V for logic level and - 3 V drive devices

Peak Diode Recovery dV/dt Test Circuit

VDD

• dV/dt controlled by RG

• ISD controlled by duty factor "D"

• D.U.T. - device under test

D.U.T.

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

Compliment N-Channel of D.U.T. for driver

Document Number: 91000 www.vishay.com

Revision: 18-Jul-08 1

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