MAX9775EBX+ - Maxim Integrated Products, Inc.

General Description

The MAX9775/MAX9776 combine a high-efficiency

Class D, stereo/mono audio power amplifier with a

mono DirectDrive®receiver amplifier and a stereo

DirectDrive headphone amplifier.

Maxim’s 3rd-generation, ultra-low-EMI, Class D audio

power amplifiers provide Class AB performance with

Class D efficiency. The MAX9775/MAX9776 deliver

1.5W per channel into a 4Ωload from a 5V supply and

offer efficiencies up to 79%. Active emissions limiting

circuitry and spread-spectrum modulation greatly

reduce EMI, eliminating the need for output filtering

found in traditional Class D devices.

The MAX9775/MAX9776 utilize a fully differential archi-

tecture, a full-bridged output, and comprehensive click-

and-pop suppression. A 3D stereo enhancement

function allows the MAX9775 to widen the stereo sound

field immersing the listener in a cleaner, richer sound

experience than typically found in portable applications.

The devices utilize a flexible, user-defined mixer archi-

tecture that includes an input mixer, volume control, and

output mixer. All control is done through I2C.

The mono receiver amplifier and stereo headphone

amplifier use Maxim’s patented†DirectDrive architecture

that produces a ground-referenced output from a single

supply, eliminating the need for large DC-blocking

capacitors, saving cost, space, and component height.

The MAX9775 is available in a 36-bump WLP (3mm x

3mm) package. The MAX9776 is available in a 32-pin

TQFN (5mm x 5mm) or a 36-bump WLP (3mm x 3mm)

package. Both devices are specified over the extended

-40°C to +85°C temperature range.

Applications

Cell Phones

Portable Multimedia Players

Handheld Gaming Consoles

Features

♦Unique Spread-Spectrum Modulation and Active

Emissions Limiting Significantly Reduces EMI

♦3D Stereo Enhancement (MAX9775 Only)

♦Up to 3 Stereo Inputs

♦1.5W Stereo Speaker Output (4Ω, VDD = 5V)

♦50mW Mono Receiver/Stereo Headphone Outputs

(32Ω, VDD = 3.3V)

♦High PSRR (68dB at 217Hz)

♦79% Efficiency (VDD = 3.3V, RL= 8Ω, POUT =

470mW)

♦I2C Control—Input Configuration, Volume Control,

Output Mode

♦Click-and-Pop Suppression

♦Low Total Harmonic Distortion (0.03% at 1kHz)

♦Current-Limit and Thermal Protection

♦Available in Space-Saving, 36-Bump WLP (3mm x

3mm) and 32-Pin TQFN (5mm x 5mm) Packages

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

________________________________________________________________

Maxim Integrated Products

Ordering Information

MAX9775

MIXER/

MUX

GAIN

CONTROL

SOUND

CONTROL

I2C

INTERFACE

SINGLE SUPPLY 2.7V TO 5.5V

MAX9776

MIXER/

MUX

GAIN

CONTROL

I2C

INTERFACE

SINGLE SUPPLY 2.7V TO 5.5V

Simplified Block Diagrams

19-0746; Rev 4; 8/08

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

Pin Configurations appear at end of data sheet.

PART PIN-PACKAGE CLASS D

AMPLIFIER

MAX9775EBX+T 36 WLP* Stereo

MAX9776ETJ+ 32 TQFN-EP** Mono

MAX9776EBX+T 36 WLP* Mono

Note: All devices are specified over the -40°C to +85°C oper-

ating temperature range.

Denotes a lead-free/RoHS-compliant package.

Four center bumps depopulated.

EP = Exposed pad.

†

U.S. Patent #7,061,327.

DirectDrive is a registered trademark of Maxim Integrated

Products, Inc.

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD = PVDD = CPVDD = 3.3V, VGND = VPGND = VCPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =

0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between

OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. TA= TMIN to

TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

VDD to GND..............................................................................6V

PVDD to PGND .........................................................................6V

CPVDD to CPGND ....................................................................6V

CPVSS to CPGND .....................................................-6V to +0.3V

VSS to CPGND..........................................................-6V to +0.3V

C1N .......................................(CPVSS - 0.3V) to (CPGND + 0.3V)

C1P.......................................(CPGND - 0.3V) to (CPVDD + 0.3V)

HPL, HPR to GND...................(CPVSS - 0.3V) to (CPVDD + 0.3V)

GND to PGND and CPGND................................................±0.3V

VDD to PVDD and CPVDD....................................................±0.3V

SDA, SCL to GND.....................................................-0.3V to +6V

All other pins to GND..................................-0.3V to (VDD + 0.3V)

Continuous Current In/Out of PVDD, PGND, CPVDD, CPGND,

OUT__, HPR, and HPL..................................................±800mA

Continuous Input Current CPVSS ......................................260mA

Continuous Input Current (all other pins) .........................±20mA

Duration of Short Circuit Between

OUT_+ and OUT_- ..................................................Continuous

Duration of HP_, OUT_ Short Circuit to

GND or PVDD ..........................................................Continuous

Continuous Power Dissipation (TA= +70°C)

36-Bump (3mm x 3mm) UCSP Multilayer Board

(derate 17.0mW/°C above +70°C)...........................1360.5mW

32-Pin (5mm x 5mm) TQFN Single-Layer Board

(derate 21.3mW/°C above +70°C)...........................1702.1mW

32-Pin TQFN Multilayer Board (derate 34.5mW/°C

above +70°C)...........................................................2758.6mW

Junction Temperature......................................................+150°C

Operating Temperature Range ...........................-40°C to +85°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

GENERAL

Supply Voltage Range VDD, PVDD,

CPVDD Inferred from PSRR test 2.7 5.5 V

Output mode 1, 6, 11 (Rx mode) 6.3 10

Output mode 4, 9, 14 (HP mode) 8 12.6

Output mode 2, 7, 12 (SP mode) 9.5 15

Quiescent Current (Mono) IDD

Output mode 3, 8, 13 (SP and HP mode) 12.9 18

Output mode 1, 6, 11 (Rx mode) 7

Output mode 4, 9, 14 (HP mode) 9

Output mode 2, 7, 12 (SP mode) 16.5

Quiescent Current (Stereo) IDD

Output mode 3, 8, 13 (SP and HP mode) 20

Mute Current IMUTE Current in mute (low power) 4.7 10 mA

Hard shutdown SHDN = GND 0.1 10

Shutdown Current ISHDN Soft shutdown See the I2C Interface

section 8.5 15 µA

Turn-On Time tON Time from shutdown or power-on to full

operation 30 ms

B and C pair inputs, TA = +25°C,

VOL = max 17.5 28 41.0 kΩ

Input Resistance RIN

A pair inputs, TA = +25°C, +20dB 3.5 5.5 8.0 kΩ

Common-Mode Rejection Ratio CMRR TA = +25°C, fIN = 1kHz (Note 2) 45 50 60 dB

Input DC Bias Voltage VBIAS IN_ inputs 1.12 1.25 1.38 V

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

_______________________________________________________________________________________ 3

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SPEAKER AMPLIFIERS

TA = +25°C ±5.5 ±23.5

Output Offset Voltage VOS TMIN ≤ TA ≤ TMAX ±40 mV

Into shutdown -62

Out of shutdown -60

Into mute -63

Click-and-Pop Level KCP

P eak vol tag e,

TA = + 25°C ,

A- w ei g hted , 32

sam p l es p er second

( N otes 2, 3) Out of mute -62

VDD = 2.7V to 5.5V 48 70

f = 217Hz,

100mVP-P ripple 68

f = 1kHz,

100mVP-P ripple 60

Power-Supply Rejection Ratio

(Note 3) PSRR TA = +25°C

f = 20kHz,

100mVP-P ripple 50

RL = 4Ω, VDD = 5V 1500

RL = 8Ω, VDD = 3.3V 450Output Power (Note 4) POUT THD+N = 1%,

TA = +25°C RL = 8Ω, VDD = 5V 1115

Current Limit 1.6 A

RL = 8Ω,

POUT = 125mW 0.03

Total Harmonic Distortion Plus

Noise (Note 4) THD+N f = 1kHz RL = 4Ω,

POUT = 250mW 0.04

BW = 20Hz to 20kHz 81

Signal-to-Noise Ratio SNR

VOUT = 1.8VRMS,

RL = 8Ω, 3D not

active (Note 3) A-weighted 84

Fixed-frequency modulation 1100

Output Frequency fOSC Spread-spectrum modulation 1100 ± 30 kHz

Efficiency ηPOUT = 470mW, f = 1kHz both channels

driven, L = 68µH in series with 8Ω load 79 %

Gain AV12 dB

Channel-to-Channel Gain

Tracking (Note 5) TA = +25°C ±1 %

3D Sound Resistors (Note 5) R3D Used with 22nF and 2.2nF external

capacitors 579kΩ

Crosstalk (Notes 4, 5) L to R, R to L, f = 10kHz, RL = 8Ω,

VOUT = 300mVRMS 73 dB

ELECTRICAL CHARACTERISTICS (continued)

(VDD = PVDD = CPVDD = 3.3V, VGND = VPGND = VCPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =

0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between

OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. TA= TMIN to

TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD = PVDD = CPVDD = 3.3V, VGND = VPGND = VCPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =

0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between

OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. TA= TMIN to

TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

RECEIVER AMPLIFIER

Output Offset Voltage VOS TA = +25°C ±1.8 ±5.5 mV

Into shutdown -62

Into mute -67

Out of shutdown -63

Click-and-Pop Level KCP

Peak voltage, TA =

+25°C, A-weighted,

32 samples per

second (Notes 3, 6) Out of mute -66

VDD = 2.7V to 5.5V 58 80

f = 217Hz,

100mVP-P ripple 80

f = 1kHz,

100mVP-P ripple 70

Power-Supply Rejection Ratio

(Note 3) PSRR TA = +25°C

f = 20kHz,

100mVP-P ripple 62

RL = 16Ω60

Output Power POUT TA = +25°C,

THD+N = 1% RL = 32Ω50 mW

Gain AV3dB

RL = 16Ω (VOUT = 800mVRMS, f = 1kHz) 0.03

Total Harmonic Distortion Plus

Noise THD+N RL = 32Ω (VOUT = 800mVRMS, f = 1kHz) 0.024 %

BW = 20Hz to 20kHz 87

Signal-to-Noise Ratio SNR RL = 16Ω, VOUT =

800mVRMS (Note 3) A-weighted 89 dB

Slew Rate SR 0.3 V/µs

Capacitive Drive CL300 pF

HEADPHONE AMPLIFIERS

Output Offset Voltage VOS TA = +25°C ±1.8 ±5.5 mV

Into shutdown -61

Into mute -65

Out of shutdown -60

Click-and-Pop Level KCP

Peak voltage, TA =

+25°C, A-weighted,

32 samples per

second (Notes 2, 4) Out of mute -64

Contact ±4

ESD Protection HP_ Air ±8 kV

VDD = 2.7V to 5.5V 58 80

f = 217Hz,

100mVP-P ripple 80

f = 1kHz,

100mVP-P ripple 70

Power-Supply Rejection Ratio

(Note 3) PSRR TA = +25°C

f = 20kHz,

100mVP-P ripple 62

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS (continued)

(VDD = PVDD = CPVDD = 3.3V, VGND = VPGND = VCPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =

0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between

OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. TA= TMIN to

TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

RL = 16Ω60

Output Power POUT TA = +25°C,

THD+N = 1% RL = 32Ω50 mW

Current Limit 170 mA

Gain AV+3 dB

Channel-to-Channel Gain

Tracking TA = +25°C ±1 %

RL = 16Ω (VOUT = 800mVRMS, f = 1kHz) 0.03

Total Harmonic Distortion Plus

Noise THD+N RL = 32Ω (VOUT = 800mVRMS, f = 1kHz) 0.024 %

BW = 20Hz to

20kHz 92

Signal-to-Noise Ratio SNR RL = 16Ω,

VOUT = 800mVRMS A-weighted 93

Slew Rate SR 0.3 V/µs

Capacitive Drive CL300 pF

Crosstalk L to R, R to L, f = 10kHz, RL = 16Ω,

VOUT = 160mVRMS 75 dB

VOLUME CONTROL

HP gain (max) 3

SP gain (max) 12

HP gain (min) -72

IN+6dB = 0

(minimum gain

setting)

SP gain (min) -63

HP gain (max) 9

SP gain (max) 18

HP gain (min) -61

Volume Control

IN+6dB = 1

(maximum gain

setting)

SP gain (min) -57

Mono+6dB = 0 0

Mono Gain All outputs

Mono+6dB = 1 6

INA+20dB = 0 (minimum gain setting) Set by IN+6dB

Input Pair A Control INA+20dB = 1 (maximum gain setting) 20 dB

Mute Attenuation

(Minimum Volume) VIN = 1VRMS 80 dB

DIGITAL INPUTS (SHDN, SDA, SCL)

Input-Voltage High VIH 1.4 V

Input-Voltage Low VIL 0.4 V

Input Hysteresis (SDA, SCL) VHYS 200 mV

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

6 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD = PVDD = CPVDD = 3.3V, VGND = VPGND = VCPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =

0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between

OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. TA= TMIN to

TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SDA, SCL Input Capacitance CIN 10 pF

Input Leakage Current IIN 0.3 5.0 µA

Pulse Width of Spike Suppressed tSP 50 ns

DIGITAL OUTPUTS (SDA Open Drain)

Output Low Voltage SDA VOL ISINK = 6mA 0.4 V

Output Fall Time SDA tOF VH(MIN) to VL(MAX) bus capacitance =

10pF to 400pF, ISINK = 3mA 250 ns

I2C INTERFACE TIMING (Note 7)

Serial Clock Frequency fSCL DC 400 kHz

Bus Free Time Between STOP

and START Conditions tBUF 1.3 µs

START Condition Hold tHD:STA 0.6 µs

STOP Condition Setup Time tSU:STA 0.6 µs

Clock Low Period tLOW 1.3 µs

Clock High Period tHIGH 0.6 µs

Data Setup Time tSU:DAT 100 ns

Data Hold Time tHD:DAT 0 900 ns

Maximum Receive SCL/SDA Rise

Time tR300 ns

Maximum Receive SCL/SDA Fall

Time tF300 ns

Setup Time for STOP Condition tSU:STO 0.6 µs

Capacitive Load for Each Bus

Line Cb400 pF

Note 1: All devices are 100% production tested at room temperature. All temperature limits are guaranteed by design.

Note 2: Measured at headphone outputs.

Note 3: Amplifier inputs AC-coupled to GND.

Note 4: Testing performed with a resistive load in series with an inductor to simulate an actual speaker load. For RL= 8Ω, L = 68µH;

for RL= 4Ω, L = 47µH.

Note 5: MAX9775 only.

Note 6: Testing performed at room temperature with an 8Ωresistive load in series with a 68µH inductive load connected across BTL

outputs for speaker amplifier. Testing performed with a 32Ωresistive load connected between OUT_ and GND for head-

phone amplifier. Testing performed with 32Ωresistive load connected between OUTRx and GND for mono receiver amplifi-

er. Mode transitions are controlled by I2C.

Note 7: Guaranteed by design.

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

_______________________________________________________________________________________

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. FREQUENCY

MAX9775/76 toc01

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.1

0.001

0.01

10 100k

VDD = 5V

RL = 4Ω

POUT = 400mW

POUT = 1000mW

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. FREQUENCY

MAX9775/76 toc02

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.1

0.001

0.01

10 100k

VDD = 5V

RL = 8Ω

POUT = 150mW

POUT = 750mW

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. FREQUENCY

MAX9775/76 toc03

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.1

0.001

0.01

10 100k

VDD = 3.3V

RL = 4Ω

POUT = 400mW

POUT = 150mW

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. FREQUENCY

MAX9775/76 toc04

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.1

0.001

0.01

10 100k

VDD = 3.3V

RL = 8Ω

POUT = 300mW

POUT = 150mW

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. FREQUENCY

MAX9775/76 toc05

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.01

0.1

0.001

10 100k

SSM

FFM

VDD = 3.3V

RL = 8Ω

POUT = 500mW

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. OUTPUT POWER

MAX9775/76 toc06

OUTPUT POWER (W)

THD+N (%)

1.61.20.80.4

0.01

0.1

100

0.001

0 2.0

VDD = 5V

RL = 4Ω

f = 10kHz

f = 20Hz

f = 1kHz

Typical Operating Characteristics

(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =

INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated

between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA=

+25°C, unless otherwise noted.)

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

8 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =

INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated

between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA=

+25°C, unless otherwise noted.)

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. OUTPUT POWER

MAX9775/76 toc07

OUTPUT POWER (W)

THD+N (%)

1.20.90.60.3

0.01

0.1

100

0.001

0 1.5

VDD = 5V

RL = 8Ω

f = 10kHz

f = 20Hz

f = 1kHz

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. OUTPUT POWER

MAX9775/76 toc08

OUTPUT POWER (W)

THD+N (%)

0.60.40.2

0.01

0.1

100

0.001

0 0.8

VDD = 3.3V

RL = 4Ω

f = 10kHz

f = 20Hz

f = 1kHz

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. OUTPUT POWER

MAX9775/76 toc09

OUTPUT POWER (W)

THD+N (%)

0.40.2

0.01

0.1

100

0.001

0 0.6

VDD = 3.3V

RL = 8Ω

f = 10kHz

f = 20Hz

f = 1kHz

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. OUTPUT POWER

MAX9775/76 toc10

OUTPUT POWER (W)

THD+N (%)

1.20.90.60.3

0.01

0.1

100

0.001

0 1.5

VDD = 5V

RL = 8Ω

f = 1kHz

SSM

FFM

EFFICIENCY

vs. OUTPUT POWER

MAX9775/76 toc11

OUTPUT POWER (W)

EFFICIENCY (%)

3.22.41.60.8

100

0 4.0

VDD = 5V

fIN = 1kHz

POUT = POUTL + POUTR

RL = 8Ω

RL = 4Ω

EFFICIENCY

vs. OUTPUT POWER

MAX9775/76 toc12

OUTPUT POWER (W)

EFFICIENCY (%)

1.61.20.80.4

100

0 2.0

VDD = 3.3V

fIN = 1kHz

POUT = POUTL + POUTR

RL = 8Ω

RL = 4Ω

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

_______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =

INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated

between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA=

+25°C, unless otherwise noted.)

OUTPUT POWER

vs. SUPPLY VOLTAGE

MAX9775/76 toc13

SUPPLY VOLTAGE (V)

OUTPUT POWER (mW)

5.24.74.23.73.2

200

400

600

800

1000

1200

1400

1600

1800

2000

2200

2.7

RL = 4Ω

f = 1kHz

THD+N = 10%

THD+N = 1%

OUTPUT POWER

vs. SUPPLY VOLTAGE

MAX9775/76 toc14

SUPPLY VOLTAGE (V)

OUTPUT POWER (mW)

5.24.73.2 3.7 4.2

200

400

600

800

1000

1200

1400

1600

2.7

RL = 8Ω

f = 1kHz

THD+N = 10%

THD+N = 1%

OUTPUT POWER

vs. LOAD

MAX9775/76 toc15

LOAD (Ω)

OUTPUT POWER (W)

0.5

1.0

1.5

2.0

2.5

1 100

THD+N = 10%

THD+N = 1%

VDD = 5V

f = 1kHz

OUTPUT POWER

vs. LOAD

MAX9775/76 toc16

LOAD (Ω)

OUTPUT POWER (W)

200

400

600

800

1000

1 100

THD+N = 10%

THD+N = 1%

VDD = 3.3V

f = 1kHz

POWER-SUPPLY REJECTION RATIO

vs. FREQUENCY

MAX9775/76 toc17

FREQUENCY (Hz)

POWER-SUPPLY REJECTION RATIO (dB)

10k1k100

-90

-80

-70

-60

-50

-40

-30

-20

-10

-100

10 100k

OUTR

OUTL

VDD = 3.3V

VIN = 100mVP-P

RL = 8Ω

CROSSTALK vs. FREQUENCY

FREQUENCY (Hz)

CROSSTALK (dB)

MAX9775/6 toc18

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

10 100 1k 10k 100k

LEFT TO RIGHT

RIGHT TO LEFT

OUT_ = 1VP-P

RL = 8Ω

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

10 ______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =

INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated

between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA=

+25°C, unless otherwise noted.)

CROSSTALK vs. INPUT AMPLITUDE

INPUT AMPLITUDE (VRMS)

CROSSTALK (dB)

MAX9775/6 toc19

0 0.1 0.2 0.3 0.4 0.5 0.6

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

fIN = 1kHz

RL = 8Ω

GAIN = +12dB

LEFT TO RIGHT

RIGHT TO LEFT

IN-BAND OUTPUT SPECTRUM

MAX9775/76 toc20

FREQUENCY (Hz)

OUTPUT MAGNITUDE (dBV)

15k10k5k

-120

-100

-80

-60

-40

-20

-140

0 20k

SSM MODE

RL = 8Ω

VDD = 3.3V

fIN = 1kHz

UNWEIGHTED

IN-BAND OUTPUT SPECTRUM

MAX9775/76 toc21

FREQUENCY (Hz)

OUTPUT MAGNITUDE (dBV)

15k10k5k

-120

-100

-80

-60

-40

-20

-140

0 20k

FFM MODE

RL = 8Ω

VDD = 3.3V

fIN = 1kHz

UNWEIGHTED

WIDEBAND OUTPUT SPECTRUM

FIXED-FREQUENCY MODE

FREQUENCY (MHz)

OUTPUT MAGNITUDE (dBV)

MAX9775/6 toc22

-140

-120

-100

-80

-60

-40

-20

0.1 1 10 100 1000

VDD = 5V

RL = 8Ω

INPUTS AC GROUNDED

WIDEBAND OUTPUT SPECTRUM

SPREAD-SPECTRUM MODE

FREQUENCY (MHz)

OUTPUT MAGNITUDE (dBV)

MAX9775 toc23

-140

-120

-100

-80

-60

-40

-20

0.1 1 10 100 1000

VDD = 5V

RL = 8Ω

INPUTS AC GROUNDED

MAX9775 SUPPLY CURRENT

vs. SUPPLY VOLTAGE

MAX9775/76 toc24

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

5.24.74.23.73.2

2.7

SP MODE

INPUTS AC GROUNDED

OUTPUTS UNLOADED

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =

INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated

between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA=

+25°C, unless otherwise noted.)

MAX9776 SUPPLY CURRENT

vs. SUPPLY VOLTAGE

MAX9775/76 toc25

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

5.24.74.23.73.2

2.7

SP MODE

INPUTS AC GROUNDED

OUTPUTS UNLOADED

SHUTDOWN SUPPLY CURRENT

vs. SUPPLY VOLTAGE

MAX9775/76 toc26

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (nA)

5.24.74.23.73.2

100

2.7

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. FREQUENCY

MAX9775/76 toc27

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.01

0.1

0.001

10 100k

VDD = 5V

RL = 32Ω

POUT = 20mW

POUT = 40mW

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. FREQUENCY

MAX9775/76 toc28

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.01

0.1

0.001

10 100k

VDD = 3.3V

RL = 16Ω

POUT = 20mW

POUT = 40mW

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. FREQUENCY

MAX9775/76 toc29

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.01

0.1

0.001

10 100k

VDD = 3.3V

RL = 32Ω

POUT = 10mW

POUT = 40mW

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. OUTPUT POWER

MAX9775/76 toc30

OUTPUT POWER (mW)

THD+N (%)

604020

0.01

0.1

100

0.001

080

VDD = 5V

RL = 32Ω

f = 10kHz

f = 20Hz

f = 1kHz

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

12 ______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =

INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated

between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA=

+25°C, unless otherwise noted.)

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. OUTPUT POWER

OUTPUT POWER (mW)

THD+N (%)

MAX9775 toc31

0 30 60 90 120

0.001

0.01

0.1

100

f = 20Hz

f = 1kHz

f = 10kHz

VDD = 3.3V

RL = 16Ω

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. OUTPUT POWER

MAX9775/76 toc32

OUTPUT POWER (mW)

THD+N (%)

604020

0.01

0.1

100

0.001

080

VDD = 3.3V

RL = 32Ω

f = 10kHz

f = 20Hz

f = 1kHz

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. COMMON-MODE VOLTAGE

COMMON-MODE VOLTAGE (V)

THD+N (%)

MAX9775/6 toc33

0 0.5 1.0 1.5 2.0 2.5

0.001

0.01

0.1

100

VDD = 3.3V

fIN = 1kHz

POUT = 30mW

GAIN = +3dB

RL = 32Ω

POWER DISSIPATION

vs. OUTPUT POWER

MAX9775/76 toc34

TOTAL OUTPUT POWER (mW)

POWER DISSIPATION (mW)

8040

100

150

200

250

300

350

400

450

500

0 120

VDD = 5V

f = 1kHz

RL = 32Ω

POUT = POUTR + POUTL

POWER DISSIPATION

vs. OUTPUT POWER

MAX9775/76 toc35

TOTAL OUTPUT POWER (mW)

POWER DISSIPATION (mW)

1208040

100

150

200

250

300

350

400

450

500

0 160

VDD = 3.3V

f = 1kHz

POUT = POUTR + POUTL

RL = 16Ω

RL = 32Ω

OUTPUT POWER

vs. SUPPLY VOLTAGE

MAX9775/76 toc36

SUPPLY VOLTAGE (V)

OUTPUT POWER (mW)

5.24.74.23.73.2

2.7

THD+N = 10%

THD+N = 1%

RL = 32Ω

f = 1kHz

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =

INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated

between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA=

+25°C, unless otherwise noted.)

OUTPUT POWER

vs. LOAD

MAX9775/76 toc37

LOAD (Ω)

OUTPUT POWER (mW)

100

120

140

160

180

200

10 1000

THD+N = 10%

THD+N = 1%

VDD = 5V

f = 1kHz

OUTPUT POWER

vs. LOAD

MAX9775/76 toc38

LOAD (Ω)

OUTPUT POWER (mW)

100

120

140

160

180

200

10 1000

THD+N = 10%

THD+N = 1%

VDD = 3.3V

f = 1kHz

OUTPUT POWER vs. LOAD RESISTANCE

AND CHARGE-PUMP CAPACITOR SIZE

LOAD (Ω)

OUTPUT POWER (mW)

MAX9775/6 toc39

100

10 100 1000

C1 = C2 = 2.2μF

VDD = 3.3V

f = 1kHz

THD+N = 1%

C1 = C2 = 1μF

C1 = C2 = 0.68μF

POWER-SUPPLY REJECTION RATIO

vs. FREQUENCY

FREQUENCY (Hz)

POWER-SUPPLY REJECTION RATIO (dB)

MAX9775/6 toc40

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

10 100 1k 10k 100k

HPL

HPR

VDD = 3.3V

VIN = 100mVP-P

RL = 32Ω

OUTPUT FREQUENCY SPECTRUM

MAX9775/76 toc41

FREQUENCY (Hz)

OUTPUT MAGNITUDE (dBV)

15k10k5k

-120

-100

-80

-60

-40

-20

-140

0 20k

VDD = 3.3V

f = 1kHz

RL = 32Ω

CROSSTALK vs. FREQUENCY

FREQUENCY (Hz)

CROSSTALK (dB)

MAX9775/6 toc42

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

10 100 1k 10k 100k

OUT_ = 1VP-P

RL = 32Ω

LEFT TO RIGHT

RIGHT TO LEFT

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

14 ______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =

INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated

between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA=

+25°C, unless otherwise noted.)

CROSSTALK vs. INPUT AMPLITUDE

INPUT AMPLITUDE (VRMS)

CROSSTALK (dB)

MAX9775 toc43

0 0.4 0.8 1.2

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

fIN = 1kHz

RL = 32Ω

GAIN = +3dB

LEFT TO RIGHT

RIGHT TO LEFT

TURN-ON RESPONSE

MAX9775/76 toc44

10ms/div

SCL

2V/div

SPEAKER

OUTPUT

50mA/div

HEADPHONE

OUTPUT

2V/div

TURN-OFF RESPONSE

MAX9775/76 toc45

10ms/div

SCL

2V/div

SPEAKER

OUTPUT

50mA/div

HEADPHONE

OUTPUT

2V/div

MUTE-ON RESPONSE

MAX9775/76 toc46

10ms/div

SCL

2V/div

SPEAKER

OUTPUT

50mA/div

HEADPHONE

OUTPUT

2V/div

MUTE-OFF RESPONSE

MAX9775/76 toc47

10ms/div

SCL

2V/div

SPEAKER

OUTPUT

50mA/div

HEADPHONE

OUTPUT

2V/div

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 15

Pin Description—MAX9775

PIN NAME FUNCTION

F1 PVDD Class D Power Supply

E1 OUTL- Negative Left-Speaker Output

D2 SCL Serial Clock Input. Connect a 1kΩ pullup resistor from SCL to VDD.

D1, F3 PGND Power Ground

C1 OUTL+ Positive Left-Speaker Output

C2 SDA Serial Data Input. Connect a 1kΩ pullup resistor from SDA to VDD.

B1 CL_L 3D External Capacitor 3. Connect a 2.2nF capacitor to GND.

B2 CL_H 3D External Capacitor 4. Connect a 22nF capacitor to GND.

A1 CPVDD Charge-Pump Power Supply

A2 C1P Charge-Pump Flying Capacitor Positive Terminal

B3 VBIAS Common-Mode Bias

A3 CPGND Charge-Pump GND

A4 C1N Charge-Pump Flying Capacitor Negative Terminal

B4 INC1 Input C1. Left input or positive input (see Table 5a).

A5 CPVSS Charge-Pump Output. Connect to VSS.

A6 HPL Left Headphone Output

B5 VSS Headphone Amplifier Negative Power Supply. Connect to CPVSS.

B6 HPR Right Headphone Output

C5 INC2 Input C2. Right input or negative input (see Table 5a).

C6 OUTRx Mono Receiver Output

D6 VDD Analog Power Supply

D5 INB2 Input B2. Right input or negative input (see Table 5a).

E6 CR_L 3D External Capacitor 1. Connect a 2.2nF capacitor to GND.

E5 INB1 Input B1. Left input or positive input (see Table 5a).

F6 GND Analog Ground

F5 CR_H 3D External Capacitor 2. Connect a 22nF capacitor to GND.

E4 INA2 Input A2. Right input or negative input (see Table 5a).

F4 OUTR+ Positive Right Speaker Output

E3 INA1 Input A1. Left input or positive input (see Table 5a).

F2 OUTR- Negative Right Speaker Output

E2 SHDN Active-Low Hardware Shutdown

—EP

Exposed Pad. The external pad lowers the package’s thermal impedance by providing a

direct heat conduction path from the die to the PCB. The exposed pad is internally

connected to GND. Connect the exposed thermal pad to the GND plane.

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

16 ______________________________________________________________________________________

Pin Description—MAX9776

TQFN UCSP NAME FUNCTION

1F1PV

DD Class D Power Supply

2 E1 OUT- Negative Left-Speaker Output

3 D2 SCL Serial Clock Input. Connect a 1kΩ pullup resistor from SCL to VDD.

4, 29 D1, F3 PGND Power Ground

5 C1 OUT+ Positive Left-Speaker Output

6 C2 SDA Serial Data Input. Connect a 1kΩ pullup resistor from SDA to VDD.

7, 8, 23,

26, 28, 31

B1, B2,

E6, F2,

F4, F5

I.C. Internal Connection. Leave unconnected. This pin is internally connected to the signal path.

Do not connect together or to any other pin.

9 A1 CPVDD Charge-Pump Power Supply

10 A2 C1P Charge-Pump Flying Capacitor Positive Terminal

11 B3 VBIAS Common-Mode Bias

12 A3 CPGND Charge-Pump GND

13 A4 C1N Charge-Pump Flying Capacitor Negative Terminal

14 B4 INC1 Input C1. Left input or positive input (see Table 5a).

15 A5 CPVSS Charge-Pump Output. Connect to VSS.

16 A6 HPL Left Headphone Output

17 B5 VSS Headphone Amplifier Negative Power Supply. Connect to CPVSS.

18 B6 HPR Right Headphone Output

19 C5 INC2 Input C2. Right input or negative input (see Table 5a).

20 C6 OUTRx Mono Receiver Output

21 D6 VDD Analog Power Supply

22 D5 INB2 Input B2. Right input or negative input (see Table 5a).

24 E5 INB1 Input B1. Left input or positive input (see Table 5a).

25 F6 GND Analog Ground

27 E4 INA2 Input A2. Right input or negative input (see Table 5a).

30 E3 INA1 Input A1. Left input or positive input (see Table 5a).

32 E2 SHDN Active-Low Hardware Shutdown

EP — EP

Exposed Pad. The external pad lowers the package’s thermal impedance by providing a

direct heat conduction path from the die to the PCB. The exposed pad is internally connected

to GND. Connect the exposed thermal pad to the GND plane.

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 17

Typical Application Circuits

MAX9775

CHARGE

PUMP

VDD

1μF

10kΩ

1μF

13 (A4)

12 (A3)

10 (A2)

9 (A1)

C1N

VBIAS

CPGND

INPUT A: 0dB,

6dB, OR 20dB

C1P

30 (E3)

27 (E4)

1μF

CPVDD

1μF

6 (C2)

3 (D2)

INA2

INA1

INPUT B: 0dB

OR 6dB

MAXIM 3D

SOUND

24 (E5)

22 (D5)

1μF

INB2

INB1

CLASS D

AMPLIFIER

INPUT C: 0dB

OR 6dB

14 (B4)

19 (C5)

1μF

INC2

INC1

INPUT

MIXER

OUTPUT

MIXER

RIGHT

VOLUME

LEFT

VOLUME

MONO

VOLUME

11 (B3)

32 (E2)

SDA

SCL

SHDN

I2C CONTROL

3dB

DirectDrive

12dB

CLASS D

AMPLIFIER

12dB

OUTR-

OUTRx

HPR

OUTR+

CL_H

22nF

OUTL-

OUTL+

HPL

31 (F2)

20 (C6)

18 (B6)

28 (F4)

2 (E1)

5 (C1)

16 (A6)

3D CIRCUIT

8 (B2)

CL_L

2.2nF

7 (B1)

CR_H

22nF

26 (F5)

CR_L

2.2nF

23 (E6)25 (F6)

GND

4 (D1) 29 (F3)

PGND

1μF

15 (A5) 17 (B5)

CPVSS VSS

1μF

21 (D6)

VDD

1μF0.1μF

1 (F1)

PVDD

VDD

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

18 ______________________________________________________________________________________

Typical Application Circuits (continued)

MAX9776

CHARGE

PUMP

VDD

1μF

13 (A4)

12 (A3)

10 (A2)

9 (A1)

C1N

VBIAS

CPGND

INPUT A: 0dB,

6dB, OR 20dB

C1P

30 (E3)

27 (E4)

1μF

CPVDD

1μF

6 (C2)

3 (D2)

INA2

INA1

INPUT B: 0dB

OR 6dB

24 (E5)

22 (D5)

1μF

INB2

INB1

CLASS D

AMPLIFIER

INPUT C: 0dB

OR 6dB

14 (B4)

19 (C5)

1μF

INC2

INC1

INPUT

MIXER

OUTPUT

MIXER

RIGHT

VOLUME

LEFT

VOLUME

MONO

VOLUME

11 (B3)

32 (E2)

SDA

SCL

SHDN

I2C CONTROL

3dB

DirectDrive

12dB

OUTRx

HPR

OUT-

OUT+

HPL

20 (C6)

18 (B6)

2 (E1)

5 (C1)

16 (A6)

25 (F6)

GND

4 (D1) 29 (F3)

PGNDPGND

1μF

15 (A5) 17 (B5)

CPVSS VSS

1μF

21 (D6)

VDD

1μF0.1μF

1 (F1)

PVDD

VDD

10kΩ

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 19

OUT+

OUT-

VIN-

VIN+

VOUT+ - VOUT-

tON(MIN)

tSW

Detailed Description

The MAX9775/MAX9776 ultra-low-EMI, filterless, Class D

audio power amplifiers feature several improvements to

switch-mode amplifier technology. The MAX9775/

MAX9776 feature active emissions limiting circuitry to

reduce EMI. Zero dead-time technology maintains state-

of-the-art efficiency and THD+N performance by allowing

the output FETs to switch simultaneously without cross-

conduction. A unique filterless modulation scheme and

spread-spectrum modulation create compact, flexible,

low-noise, efficient audio power amplifiers while

occupying minimal board space. The differential input

architecture reduces common-mode noise pickup with or

without the use of input-coupling capacitors. The

MAX9775/MAX9776 can also be configured as single-

ended input amplifiers without performance degradation.

The MAX9775/MAX9776 feature three fully differential

input pairs (INA_, INB_, INC_) that can be configured

as stereo single-ended or mono differential inputs. I2C

provides control for input configuration, volume level,

and mixer configuration. The MAX9775’s 3D enhance-

ment feature widens the stereo sound field to improve

stereo imaging when stereo speakers are placed in

close proximity.

DirectDrive allows the headphone and mono receiver

amplifiers to output ground-referenced signals from a

single supply, eliminating the need for large DC-block-

ing capacitors. Comprehensive click-and-pop suppres-

sion minimizes audible transients during the turn-on

and turn-off of amplifiers.

Class D Speaker Amplifier

Comparators monitor the audio inputs and compare the

complementary input voltages to a sawtooth waveform.

The comparators trip when the input magnitude of the

sawtooth exceeds their corresponding input voltage. The

active emissions limiting circuitry slightly reduces the

turn-on rate of the output H-bridge by slew-rate limiting

the comparator output pulse. Both comparators reset at

a fixed time after the rising edge of the second compara-

tor trip point, generating a minimum-width pulse

(tON(MIN),100ns typ) at the output of the second com-

parator (Figure 1). As the input voltage increases or

decreases, the duration of the pulse at one output

increases while the other output pulse duration remains

the same. This causes the net voltage across the speak-

er (VOUT+ - VOUT-) to change. The minimum-width pulse

helps the devices to achieve high levels of linearity.

Figure 1. Outputs with an Input Signal Applied

MAX9775/MAX9776

Operating Modes

Fixed-Frequency Modulation

The MAX9775/MAX9776 feature a fixed-frequency

modulation mode with a 1.1MHz switching frequency,

set through the I2C interface (Table 2). In fixed-frequen-

cy modulation mode, the frequency spectrum of the

Class D output consists of the fundamental switching

frequency and its associated harmonics (see the

Wideband Output Spectrum Fixed-Frequency Mode

graph in the

Typical Operating Characteristics

Spread-Spectrum Modulation

The MAX9775/MAX9776 feature a unique, patented

spread-spectrum modulation that flattens the wideband

spectral components. Proprietary techniques ensure that

the cycle-to-cycle variation of the switching period does

not degrade audio reproduction or efficiency (see the

Typical Operating Characteristics

). Select spread-spec-

trum modulation mode through the I2C interface (Table

2). In spread-spectrum modulation mode, the switching

frequency varies randomly by ±30kHz around the center

frequency (1.16MHz). The modulation scheme remains

the same, but the period of the sawtooth waveform

changes from cycle to cycle (Figure 2). Instead of a

large amount of spectral energy present at multiples of

the switching frequency, the energy is now spread over

a bandwidth that increases with frequency. Above a few

megahertz, the wideband spectrum looks like white

noise for EMI purposes (see Figure 3).

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

20 ______________________________________________________________________________________

VOUT+ - VOUT-

tSW tSW tSW tSW

VIN-

VIN+

OUT+

OUT-

tON(MIN)

Figure 2. Output with an Input Signal Applied (Spread-Spectrum Modulation Mode)

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 21

FREQUENCY (MHz)

AMPLITUDE (dBμV/m)

40.0

30.0 60.0 80.0 100.0 120.0 140.0 160.0 180.0 200.0 220.0 240.0 260.0 280.0 300.0

35.0

30.0

25.0

20.0

15.0

10.0

5.0

EN55022B LIMIT

Figure 3. EMI with 76mm of Speaker Cable

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

22 ______________________________________________________________________________________

Filterless Modulation/Common-Mode Idle

The MAX9775/MAX9776 use Maxim’s unique, patented

modulation scheme that eliminates the LC filter

required by traditional Class D amplifiers, improving

efficiency, reducing component count, conserving

board space and system cost. Conventional Class D

amplifiers output a 50% duty-cycle square wave when

no signal is present. With no filter, the square wave

appears across the load as a DC voltage, resulting in

finite load current, increasing power consumption,

especially when idling. When no signal is present at the

input of the MAX9775/MAX9776, the outputs switch as

shown in Figure 4. Because the MAX9775/MAX9776

drive the speaker differentially, the two outputs cancel

each other, resulting in no net idle mode voltage across

the speaker, minimizing power consumption.

DirectDrive

Traditional single-supply headphone amplifiers have

outputs biased at a nominal DC voltage (typically half

the supply) for maximum dynamic range. Large cou-

pling capacitors are needed to block this DC bias from

the headphone. Without these capacitors, a significant

amount of DC current flows to the headphone, resulting

in unnecessary power dissipation and possible dam-

age to both headphone and headphone amplifier.

Maxim’s patented DirectDrive architecture uses a charge

pump to create an internal negative supply voltage. This

allows the headphone outputs of the MAX9775/MAX9776

to be biased at GND, almost doubling dynamic range

while operating from a single supply. With no DC compo-

nent, there is no need for the large DC-blocking capaci-

tors. Instead of two large (220µF, typ) tantalum

capacitors, the MAX9775/MAX9776 charge pump

requires two small ceramic capacitors, conserving board

space, reducing cost, and improving the frequency

response of the headphone amplifier. See the Output

Power vs. Load Resistance and Charge-Pump Capacitor

Size graph in the

Typical Operating Characteristics

for

details of the possible capacitor sizes. There is a low DC

voltage on the amplifier outputs due to amplifier offset.

However, the offset of the MAX9775/MAX9776 is typically

1.4mV, which, when combined with a 32Ωload, results in

less than 44nA of DC current flow to the headphones.

In addition to the cost and size disadvantages of the

DC-blocking capacitors required by conventional head-

phone amplifiers, these capacitors limit the amplifier’s

low-frequency response and can distort the audio sig-

nal. Previous attempts at eliminating the output-cou-

pling capacitors involved biasing the headphone return

(sleeve) to the DC bias voltage of the headphone

amplifiers. This method raises some issues:

1) The sleeve is typically grounded to the chassis.

Using the midrail biasing approach, the sleeve must

be isolated from system ground, complicating prod-

uct design.

2) During an ESD strike, the driver’s ESD structures are

the only path to system ground. Thus, the amplifier

must be able to withstand the full ESD strike.

3) When using the headphone jack as a lineout to

other equipment, the bias voltage on the sleeve may

conflict with the ground potential from other equip-

ment, resulting in possible damage to the amplifiers.

VIN = 0V

OUT-

OUT+

VOUT+ - VOUT- = 0V

Figure 4. Outputs with No Input Signal

Charge Pump

The MAX9775/MAX9776 feature a low-noise charge

pump. The switching frequency of the charge pump is

half the switching frequency of the Class D amplifier,

regardless of the operating mode. The nominal switch-

ing frequency is well beyond the audio range, and thus

does not interfere with the audio signals, resulting in an

SNR of 93dB. Although not typically required, addition-

al high-frequency noise attenuation can be achieved by

increasing the size of C2 (see the

Typical Application

Circuits

). The charge pump is active in both speaker

and headphone modes.

3D Enhancement

The MAX9775 features a 3D stereo enhancement func-

tion, allowing the MAX9775 to widen the stereo sound field

and immerse the listener in a cleaner, richer sound experi-

ence. Note the MAX9776, mono Class D speaker amplifier

does not feature 3D stereo enhancement.

As stereo speaker applications become more compact,

the quality of stereophonic sound is jeopardized.

With Maxim’s 3D stereo enhancement, it is possible to

emulate stereo sound in situations where the speakers

must be positioned close together. As shown in Figure

6, wave interference can be used to cancel the left

channel in the vicinity of the listener’s right ear and vice

versa. This technique can yield an apparent separation

between the speakers that is a factor of four or greater

than the actual physical separation.

The external capacitors CL_L, CL_H, CR_L, and CR_H

set the starting and stopping range of the 3D effect.

CL_H and CR_H are for the lower limit (in the MAX9775

Typical Application Circuit

, it is 1kHz), CR_L and CL_L

are for the higher limit (10kHz). The internal resistor is

typically 7kΩand the frequencies are calculated as:

where R = 7kΩand C = CR_H and CL_H.

where R = 7kΩand C = CR_L and CL_L.

For example, with CR_L = CL_L = 2.2nF and CR_H =

CL_H = 22nF, the 3D start frequency is 1kHz and the

3D stop frequency is 10kHz.

Enabling the 3D sound effect results in an apparent 6dB

gain because the internal left and right signals are mixed

together. This gain can be nulled by volume adjusting

the left and right signals. The volume control can be pro-

grammed through the I2C-compatible interface to com-

pensate for the extra 6dB increase in gain. For example,

D STOP RC

_=π

D START RC

_=π

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 23

VDD / 2

VDD

GND

+VDD

-VDD

GND

VOUT

CONVENTIONAL DRIVER-BIASING SCHEME

DirectDrive BIASING SCHEME

Figure 5. Traditional Amplifier Output vs. MAX9775/MAX9776

DirectDrive Output

RIGHT

LEFT

RIGHT

LEFT

LISTENER

Figure 6. MAX9775 3D Stereo Enhancement

MAX9775/MAX9776

if the right and left volume controls are set for a maxi-

mum gain 0dB (11111 in Table 7, IN+6dB = 0 from Table

10) before the 3D effect is activated, the volume control

should be programmed to -6dB (11001 in Table 7)

immediately after the 3D effect has been activated.

Signal Path

The audio inputs of the MAX9775/MAX9776—INA, INB,

and INC—are preamplified and then mixed by the input

mixer to create three internal signals: Left (L), Right (R),

and Mono (M). Tables 5a and 5b show how the inputs

are mixed to create L, R, and M. These signals are then

independently volume adjusted by the L, R, and M vol-

ume control and routed to the output mixer. The output

mixer mixes the internal L, R, and M signals to create a

variety of audio mixes that are output to the headphone

speaker and mono receiver amplifiers. Figure 6 shows

the signal path that the audio signals take.

Signal amplification takes place in three stages. In the

first stage, the inputs (INA, INB, and INC) are pre-

amplified. The amount by which each input is amplified

is determined by the bits INA+20dB (B4 in the Input

Mode Control Register) and IN+6dB (B3 in the Global

Control Register). After preamplification, they are mixed

in the Input Mixer to create the internal signals L, R,

and M.

In the second stage of amplification, the internal L, R,

and M signals are independently volume adjusted.

Finally, each output amplifier has its own internal gain.

The speaker, headphone, and mono receiver amplifiers

have fixed gains of 12dB, 3dB, and 3dB, respectively.

Current-Limit and Thermal Protection

The MAX9775/MAX9776 feature current limiting and

thermal protection to protect the device from short cir-

cuits and overcurrent conditions. The headphone

amplifier pulses in the event of an overcurrent condition

with a pulse every 100µs as long as the condition is

present. Should the current still be high, the above

cycle is repeated. The speaker amplifier current-limit

protection clamps the output current without shutting

down the output. This can result in a distorted output.

Current is limited to 1.6A in the speaker amplifiers and

170mA in the headphone and mono receiver amplifiers.

The MAX9775/MAX9776 have thermal protection that

disables the device at +150°C until the temperature

decreases to +120°C.

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

24 ______________________________________________________________________________________

INPUT

MIXER

INPUT

PREAMPLIFIER

INPUT A:

0dB, 6dB, 20dB

-75dB TO 0dB

-75dB TO 0dB0dB TO 6dB

MVOLMONO+6dB

LVOL

-75dB TO 0dB

RVOL

INPUT B AND C:

0dB, 6dB

OUTPUT

MIXER

3dB

12dB

SPEAKER

HEADPHONE

RECEIVER

MONO

Figure 7. Signal Path

Click-and-Pop Suppression

In conventional single-supply headphone amplifiers, the

output-coupling capacitor is a major contributor of audi-

ble clicks and pops. Upon startup, the amplifier charges

the coupling capacitor to its bias voltage, typically half the

supply. Likewise, during shutdown, the capacitor is dis-

charged to GND. This results in a DC shift across the

capacitor, which, in turn, appears as an audible transient

at the speaker. Since the MAX9775/MAX9776 headphone

amplifier does not require output-coupling capacitors, this

problem does not arise.

In most applications, the output of the preamplifier dri-

ving the MAX9775/MAX9776 has a DC bias of typically

half the supply. During startup, the input-coupling

capacitor is charged to the preamplifier’s DC bias volt-

age, resulting in a DC shift across the capacitor and an

audible click/pop. An internal delay of 30ms eliminates

the click/pop caused by the input filter.

Shutdown

The MAX9775/MAX9776 feature a 0.1µA hard shutdown

mode that reduces power consumption to extend battery

life and a soft shutdown where current consumption is

typically 8.5µA. Hard shutdown is controlled by connect-

ing the SHDN pin to GND, disabling the amplifiers, bias

circuitry, charge pump, and I2C. In shutdown, the head-

phone amplifier output impedance is 1.4kΩand the

speaker output impedance is 300kΩ. Similarly, the

MAX9775/MAX9776 enter soft-shutdown when the SHDN

bit = 0 (see Table 2). The I2C interface is active and the

contents of the command register are not affected when

in soft-shutdown. This allows the master to write to the

MAX9775/MAX9776 while in shutdown. The I2C interface

is completely disabled in hardware shutdown. When the

MAX9775/MAX9776 are re-enabled the default settings

are applied (see Table 3).

I2C Interface

The MAX9775/MAX9776 feature an I2C 2-wire serial

interface consisting of a serial data line (SDA) and a

serial clock line (SCL). SDA and SCL facilitate commu-

nication between the MAX9775/MAX9776 and the mas-

ter at clock rates up to 400kHz. Figure 8 shows the

2-wire interface timing diagram. The MAX9775/

MAX9776 are receive-only slave devices relying on the

master to generate the SCL signal. The master, typical-

ly a microcontroller, generates SCL and initiates data

transfer on the bus. The MAX9775/MAX9776 cannot

write to the SDA bus except to acknowledge the receipt

of data from the master. The MAX9775/MAX9776 will

not acknowledge a read command from the master.

A master device communicates to the MAX9775/

MAX9776 by transmitting the proper address followed

by the data word. Each transmit sequence is framed by

a START (S) or REPEATED START (Sr) condition and a

STOP (P) condition. Each word transmitted over the

bus is 8 bits long and is always followed by an

acknowledge clock pulse.

The MAX9775/MAX9776 SDA line operates as both an

input and an open-drain output. A pullup resistor,

greater than 500Ω, is required on the SDA bus. The

MAX9775/MAX9776 SCL line operates as an input only.

A pullup resistor (greater than 500Ω) is required on

SCL if there are multiple masters on the bus or if the

master in a single-master system has an open-drain

SCL output. Series resistors in line with SDA and SCL

are optional. Series resistors protect the digital inputs of

the MAX9775/MAX9776 from high-voltage spikes on

the bus lines, and minimize crosstalk and undershoot of

the bus signals.

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 25

SCL

SDA

START

CONDITION

STOP

CONDITION

REPEATED

START

CONDITION

START

CONDITION

tHD, STA

tSU, STA tHD, STA tSP

tBUF

tSU, STO

tLOW

tSU, DAT

tHD, DAT

tHIGH

tRtF

Figure 8. 2-Wire Serial-Interface Timing Diagram

MAX9775/MAX9776

Bit Transfer

One data bit is transferred during each SCL cycle. The

data on SDA must remain stable during the high period

of the SCL pulse. Changes in SDA while SCL is high

are control signals (see the

START and STOP

Conditions

section). SDA and SCL idle high when the

I2C bus is not busy.

START and STOP Conditions

A master device initiates communication by issuing a

START condition. A START condition is a high-to-low

transition on SDA with SCL high. A STOP condition is a

low-to-high transition on SDA while SCL is high (Figure

9). A START (S) condition from the master signals the

beginning of a transmission to the MAX9775/MAX9776.

The master terminates transmission, and frees the bus,

by issuing a STOP (P) condition. The bus remains active

if a REPEATED START (Sr) condition is generated

instead of a STOP condition.

Early STOP Conditions

The MAX9775/MAX9776 recognize a STOP condition at

any point during data transmission except if the STOP

condition occurs in the same high pulse as a START

condition.

Slave Address

The MAX9775/MAX9776 are available with one preset

slave address (see Table 1). The address is defined as

the seven most significant bits (MSBs) followed by the

Read/Write bit. The address is the first byte of informa-

tion sent to the MAX9775/MAX9776 after the START

condition. The MAX9775/MAX9776 are slave devices

only capable of being written to. The Read/Write bit

should be a zero when configuring the MAX9775/

MAX9776.

Acknowledge

The acknowledge bit (ACK) is a clocked 9th bit that the

MAX9775/MAX9776 use to handshake receipt of each

byte of data (see Figure 10). The MAX9775/MAX9776

pull down SDA during the master-generated 9th clock

pulse. Monitoring ACK allows for detection of unsuc-

cessful data transfers. An unsuccessful data transfer

occurs if a receiving device is busy or if a system fault

has occurred. In the event of an unsuccessful data

transfer, the bus master may reattempt communications.

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

26 ______________________________________________________________________________________

SCL

SDA

SSrP

Figure 9. START, STOP, and REPEATED START Conditions

SCL

START

CONDITION

SDA

289

CLOCK PULSE FOR

ACKNOWLEDGMENT

ACKNOWLEDGE

NOT ACKNOWLEDGE

SLAVE ADDRESS

PART A6 A5 A4 A3 A2 A1 A0 R/W

MAX9775 1 0 0 1 1 0 0 0

MAX9776 1 0 0 1 1 0 1 0

Figure 10. Acknowledge

Table 1. MAX9775/MAX9776 Address Map

Write Data Format

A write to the MAX9775/MAX9776 includes transmis-

sion of a START condition, the slave address with the

R/Wbit set to 0 (Table 1), one byte of data to configure

the Command Register, and a STOP condition. Figure

11 illustrates the proper format for one frame.

The MAX9775/MAX9776 only accept write data, but

they acknowledge the receipt of the address byte with

the R/Wbit set high. The MAX9775/MAX9776 do not

write to the SDA bus in the event that the R/Wbit is set

high. Subsequently, the master reads all 1’s from the

MAX9775/MAX9776. Always set the R/Wbit to zero to

avoid this situation.

Programming the MAX9775/MAX9776

The MAX9775/MAX9776 are programmed through 6

control registers. Each register is addressed by the 3

MSBs (B5–B7) followed by 5 configure bits (B0–B4) as

shown in Table 2. Correct programming of the

MAX9775/MAX9776 requires writing to all 6 control reg-

isters. Upon power-on, their default settings are as list-

ed in Table 3.

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 27

ACK

ACKNOWLEDGE FROM

MAX9775/MAX9776

R/W ACKNOWLEDGE

FROM MAX9775/MAX9776

B7 B6 B5 B4 B3 B2

COMMAND BYTE IS STORED ON

RECEIPT OF STOP CONDITION

ACK

B1 B0

SLAVE ADDRESS COMMAND BYTE

Figure 11. Write Data Format Example

B7 B6 B5 B4 B3 B2 B1 B0

FUNCTION COMMAND DATA

Input Mode Control 0 0 0 INA+20dB INMODE (Tables 5a and 5b)

Mono Volume Control 0 0 1 MVOL (Table 7)

Left Volume Control 0 1 0 LVOL (Table 7)

Right Volume Control 0 1 1 RVOL (Table 7)

Output Mode Control 1 0 0 MONO+6dB OUTMODE (Table 9)

Global Control Register 1 0 1 SHDN IN+6dB MUTE SSM 3D/MONO

Table 2. Control Registers

COMMAND DATA DESCRIPTION

Input Mode (000) 10000 Input A gain = +20dB; input A, B, and C singled-ended stereo inputs

Mono Volume (001) 11111 Maximum volume

Left Volume (010) 11111 Maximum volume

Right Volume (011) 11111 Maximum volume

Output Mode (100) 01000 0dB of extra mono gain, mode 8: stereo headphone, stereo speaker

Global Control Register (101) 00011 Powered-off, input B/C gain = 0dB, MUTE off, SSM on, 3D/MONO on

Table 3. Power-On Reset Conditions

MAX9775/MAX9776

The MAX9775/MAX9776 have three flexible inputs that

can be configured as single-ended stereo inputs or dif-

ferential mono inputs. All input signals are summed into

three unique signals—Left (L), Right (R), and Mono

(M)—which are routed to the output amplifiers. The bit

INA+20dB allows the option of boosting low-level sig-

nals on INA. INA+20dB can be set as follows:

1 = Input A’s gain +20dB for low-level signals such as

FM receivers.

0 = Input A’s gain is either 0dB or +6dB as set by

IN+6dB (bit B3 of the Control Register).

Tables 5a and 5b show how the inputs—INA, INB, and

INC—are mixed to create the internal signals Left (L),

Right (R), and Mono (M).

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

28 ______________________________________________________________________________________

Input Mode Control

Input Mode Control 0 0 0 INA+20dB INMODE (Tables 5a and 5b )

Table 4. Input Mode Control Register

PROGRAMMING MODE INPUT CONFIGURATION

INMODE

B3 B2 B1 B0 INA1 INA2 INB1 INB2 INC1 INC2

0 0 0 0 LRLRLR

0001LRLRM+M-

0010LRM+M-LR

0 0 1 1 L R M+M-M+M-

0100LRR+R-L+L-

0101LRL+L-R+R-

0110M+M-LRLR

0 1 1 1 M+M- L R M+M-

1 0 0 0 M+M-M+M- L R

1 0 0 1 M+M-M+M-M+M-

1010M+M-R+R-L+L-

1011M+M-L+L-R+R-

Table 5a. Input Mode

PROGRAMMING MODE INTERNAL SIGNALS LEFT (L), RIGHT (R), AND MONO (M)

INMODE

B3 B2 B1 B0 LRM

0 0 0 0 INA1 + INB1 + INC1 INA2 + INB2 + INC2 —

0 0 0 1 INA1 + INB1 INA2 + INB2 INC1 - INC2

0 0 1 0 INA1 + INC1 INA2 + INC2 INB1 - INB2

0 0 1 1 INA1 INA2 (INB1 - INB2) + (INC1 - INC2)

0 1 0 0 INA1 + (INC1 - INC2) INA2 + (INB1 - INB2) —

0 1 0 1 INA1 + (INB1 - INB2) INA2 + (INC1 - INC2) —

0 1 1 0 INB1 + INC1 INB2 + INC2 INA1 - INA2

0 1 1 1 INB1 INB2 (INA1 - INA2) + (INC1 - INC2)

1 0 0 0 INC1 INC2 (INA1 - INA2) + (INB1 - INB2)

1001 — — (INA1 - INA2) + (INB1 - INB2)

+ (INC1 - INC2)

1 0 1 0 INC1 - INC2 INB1 - INB2 INA1 - INA2

1 0 1 1 INB1 - INB2 INC1 - INC2 INA1 - INA2

Table 5b. Internal Signals L, R, and M

The MAX9775/MAX9776 have separate volume controls

for each of the internal signals: Left (L), Right (R), and

Mono (M). The final gain of each signal is determined

by the way the following bits are set: MVOL, LVOL,

RVOL, INA+20dB, IN+6dB, and MONO+6dB. Table 7

shows how to configure the L, R, and M amplifiers for

specific gains.

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 29

Mono/Left/Right Volume Control

Mono Volume Control 0 0 1 MVOL

Left Volume Control 0 1 0 LVOL

Right Volume Control 0 1 1 RVOL

Table 6. Mono/Left/Right Volume Control Registers

MVOL/LVOL/RVOL

B4 B3 B2 B1 B0 GAIN (dB)

00000 Mute

00001 -75

00010 -71

00011 -67

00100 -63

00101 -59

00110 -55

00111 -51

01000 -47

01001 -44

01010 -41

01011 -38

01100 -35

01101 -32

01110 -29

01111 -26

MVOL/LVOL/RVOL

B4 B3 B2 B1 B0 GAIN (dB)

10000 -23

10001 -21

10010 -19

10011 -17

10100 -15

10101 -13

10110 -11

10111 -9

11000 -7

11001 -6

11010 -5

11011 -4

11100 -3

11101 -2

11110 -1

11111 0

Table 7. Volume Control Settings

MAX9775/MAX9776

MONO+6dB in the Output Mode Control register allows

an extra 6dB of gain on the internal mono signal:

1 = Additional 6dB of gain is applied to the internal

Mono (M) signal path.

0 = No additional gain is applied to the Internal Mono

(M) signal path.

The MAX9775 has five output amplifiers: a mono

receiver amplifier, a stereo DirectDrive headphone

amplifier, and a stereo Class D amplifier. The MAX9776

has four output amplifiers: a mono receiver amplifier, a

stereo DirectDrive headphone amplifier, and a mono

Class D amplifier.

Table 9 shows how each of the three internal signals—

Left (L), Right (R), and Mono (M)—are mixed and rout-

ed to the various outputs.

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

30 ______________________________________________________________________________________

Output Mode Control

Output Mode Control 1 0 0 MONO+6dB OUTMODE (Table 9)

Table 8. Output Mode Control Register

OUTMODE MAX9775 MAX9776

MODE B3 B2 B1 B0 RECEIVER LEFT HP RIGHT HP LEFT SPK RIGHT SPK

00000 — — — — — —

10001 M — — — — —

20010 — — — M M M

30011 — M M M M M

40100 — M M — — —

50101 — — — — — —

60110

1/2 (L + R) — — — — —

70111 — — — L R L + R

81000 — L R L R L + R

91001 — L R — — —

101010 — — — — — —

111011M + 1/2 (L + R) — — — — —

12 1 1 0 0 — — — L + M R + M L + R + 2M

13 1 1 0 1 — L + M R + M L + M R + M L + R + 2M

14 1 1 1 0 — L + M R + M — — —

15 1 1 1 1 MUTE MUTE MUTE MUTE MUTE MUTE

Table 9. Output Modes

— = Amplifier off.

L = Left signal.

R = Right signal.

M = Mono signal.

The Global Control Register is used for global configu-

rations, those affecting all inputs and outputs. The bits

in the control register are shown in Table 11.

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 31

Global Control Register

Global Control Register 1 0 1 SHDN IN+6dB MUTE SSM 3D/MONO

Table 10. Global Control Register

BIT NAME FUNCTION

B4 SHDN 1 = Normal operation

0 = Low-power shutdown mode. I2C settings are saved.

B3 IN+6dB

1 = All input signals are boosted by 6dB.

0 = All input signals are passed un-amplified.

This bit does not affect INA if the INA+20dB bit (B4 of the Input Mode Control Register) is set to

1, in which case INA is boosted by 20dB.

B2 MUTE 1 = Mute all outputs.

0 = All outputs are active.

B1 SSM 1 = Spread-spectrum Class D modulation.

0 = Fixed-frequency Class D modulation.

B0 3D/MONO

MAX9775:

1 = 3D Enhancement is on.

0 = 3D Enhancement is off.

1 = Speakers will output L+R in modes 7, 8, 12, and 13 (see Table 9).

0 = Speakers will output L in modes 7, 8, 12, and 13 (see Table 9).

Table 11. Global Control Register Configurations

Applications Information

Class D Filterless Operation

Traditional Class D amplifiers require an output filter to

recover the audio signal from the amplifier’s PWM out-

put. The filters add cost, increase the solution size of

the amplifier, and can decrease efficiency. The tradi-

tional PWM scheme uses large differential output

swings (2 x VDD(P-P)) and causes large ripple currents.

Any parasitic resistance in the filter components results

in a loss of power, lowering the efficiency.

The MAX9775/MAX9776 do not require an output filter.

The device relies on the inherent inductance of the

speaker coil and the natural filtering of both the speak-

er and the human ear to recover the audio component

of the square-wave output. Eliminating the output filter

results in a smaller, less costly, more efficient solution.

Because the switching frequency of the MAX9775/

MAX9776 speaker output is well beyond the bandwidth

of most speakers, voice coil movement due to the

square-wave frequency is very small. Although this move-

ment is small, a speaker not designed to handle the addi-

tional power may be damaged. For optimum results use a

speaker with a series inductance > 10µH. Typical 8Ω

speakers, for portable audio applications, exhibit series

inductances in the 20µH to 100µH range.

Input Amplifier

Differential Input

The MAX9775/MAX9776 feature a programmable differ-

ential input structure, making it compatible with many

CODECs, and offering improved noise immunity over a

single-ended input amplifier. In devices such as cell

phones, high-frequency signals from the RF transmitter

can be picked up by the amplifier’s input traces. The

signals appear at the amplifier’s inputs as common-

mode noise. A differential input amplifier amplifies the

difference of the two inputs and any signal common to

both is cancelled.

Single-Ended Input

The MAX9775/MAX9776 can be configured as a single-

ended input amplifier by appropriately configuring the

Input Control Register (see Tables 5a and 5b).

DC-Coupled Input

The input amplifier can accept DC-coupled inputs that

are biased to the amplifier’s bias voltage. DC-coupling

eliminates the input-coupling capacitors; reducing com-

ponent count to potentially six external components

(see the

Typical Application Circuits

). However, the

highpass filtering effect of the capacitors is lost, allow-

ing low-frequency signals to feed through to the load.

Unused Inputs

Connect any unused input pin directly to VBIAS. This

saves input capacitors on unused inputs and provides

the highest noise immunity on the input.

Component Selection

Input Filter

An input capacitor (CIN) in conjunction with the input

impedance of the MAX9775/MAX9776 form a highpass

filter that removes the DC bias from the incoming signal.

The AC-coupling capacitor allows the amplifiers to auto-

matically bias the signal to an optimum DC level.

Assuming zero source impedance, the -3dB point of the

highpass filter is given by:

Choose CIN so that f-3dB is well below the lowest fre-

quency of interest. Use capacitors whose dielectrics

have low-voltage coefficients, such as tantalum or alu-

minum electrolytic. Capacitors with high-voltage coeffi-

cients, such as ceramics, may result in increased

distortion at low frequencies.

Other considerations when designing the input filter

include the constraints of the overall system and the

actual frequency band of interest. Although high-fidelity

audio calls for a flat-gain response between 20Hz and

20kHz, portable voice-reproduction devices such as cell

phones and two-way radios need only concentrate on

the frequency range of the spoken human voice (typi-

cally 300Hz to 3.5kHz). In addition, speakers used in

portable devices typically have a poor response below

300Hz. Taking these two factors into consideration, the

input filter may not need to be designed for a 20Hz to

20kHz response, saving both board space and cost

due to the use of smaller capacitors.

Class D Output Filter

The MAX9775/MAX9776 do not require a Class D out-

put filter. The devices pass EN55022B emission stan-

dards with 152mm of unshielded speaker cables.

However, output filtering can be used if a design is fail-

ing radiated emissions due to board layout or cable

length, or the circuit is near EMI-sensitive devices. Use

a ferrite bead filter when radiated frequencies above

10MHz are of concern. Use an LC filter when radiated

frequencies below 10MHz are of concern, or when long

leads (> 152mm) connect the amplifier to the speaker.

Figure 12 shows optional speaker amplifier output filters.

External Component Selection

BIAS Capacitor

VBIAS is the output of the internally generated DC bias

voltage. The VBIAS bypass capacitor, CVBIAS improves

PSRR and THD+N by reducing power supply and other

noise sources at the common-mode bias node, and

also generates the clickless/popless, startup/shutdown

DC bias waveforms for the speaker amplifiers. Bypass

VBIAS with a 1µF capacitor to GND.

fRC

dB IN IN

−=

2π

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

32 ______________________________________________________________________________________

OUT_+

OUT_-

33μH

0.47μF

0.033μF

0.1μF

22Ω

0.033μF

0.1μF

Figure 12. Speaker Amplifier Output Filter

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 33

Table 12. Suggested Capacitor Manufacturers

SUPPLIER PHONE FAX WEBSITE

Taiyo Yuden 800-348-2496 847-925-0899 www.t-yuden.com

TDK 807-803-6100 847-390-4405 www.component.tdk.com

Charge-Pump Capacitor Selection

Use capacitors with an ESR less than 100mΩfor opti-

mum performance. Low-ESR ceramic capacitors mini-

mize the output resistance of the charge pump. Most

surface-mount ceramic capacitors satisfy the ESR

requirement. For best performance over the extended

temperature range, select capacitors with an X7R dielec-

tric or better. Table 12 lists suggested manufacturers.

Flying Capacitor (C1)

The value of the flying capacitor (C1) affects the output

resistance of the charge pump. A C1 value that is too

small degrades the device’s ability to provide sufficient

current drive, which leads to a loss of output voltage.

Increasing the value of C1 reduces the charge-pump out-

put resistance to an extent. Above 1µF, the on-resistance

of the switches and the ESR of C1 and C2 dominate.

Output Capacitor (C2)

The output capacitor value and ESR directly affect the

ripple at CPVSS. Increasing the value of C2 reduces

output ripple. Likewise, decreasing the ESR of C2

reduces both ripple and output resistance. Lower

capacitance values can be used in systems with low

maximum output power levels. See the Output Power

vs. Load Resistance and Charge-Pump Capacitor Size

graph in the

Typical Operating Characteristics

CPV

Bypass Capacitor (C3)

The CPVDD bypass capacitor (C3) lowers the output

impedance of the power supply and reduces the

impact of the MAX9775/MAX9776’s charge-pump

switching transients. Bypass CPVDD with C3 to PGND

and place it physically close to the CPVDD and PGND.

Use a value for C3 that is equal to C1.

Supply Bypassing, Layout, and Grounding

Proper layout and grounding are essential for optimum

performance. Use large traces for the power-supply

inputs and amplifier outputs to minimize losses due to

parasitic trace resistance. Large traces also aid in mov-

ing heat away from the package. Proper grounding

improves audio performance, minimizes crosstalk

between channels, and prevents any switching noise

from coupling into the audio signal. Connect PGND and

GND together at a single point on the PCB. Route all

traces that carry switching transients away from GND

and the traces/components in the audio signal path.

Connect all of the power-supply inputs (CPVDD, VDD,

and PVDD) together. Bypass CPVDD with a 1µF capaci-

tor to CPGND. Bypass VDD with 1µF capacitor to GND.

Bypass PVDD with a 1µF capacitor in parallel with a

0.1µF capacitor to PGND. Place the bypass capacitors

as close to the MAX9775/MAX9776 as possible. Place

a bulk capacitor between PVDD and PGND if needed.

Use large, low-resistance output traces. Current drawn

from the outputs increases as load impedance

decreases. High output trace resistance decreases the

power delivered to the load. Large output, supply, and

GND traces also allow more heat to move from the

MAX9775/MAX9776 to the PCB, decreasing the thermal

impedance of the circuit.

TQFN Applications Information

The MAX9776 TQFN-EP package features an exposed

thermal pad on its underside. This pad lowers the

package’s thermal impedance by providing a direct

heat conduction path from the die to the PCB. The

exposed pad is internally connected to GND. Connect

the exposed thermal pad to the PCB GND plane.

WLP Applications Information

For the latest application details on WLP construction,

dimensions, tape carrier information, PCB techniques,

bump-pad layout, and recommended reflow tempera-

ture profile, as well as the latest information of reliability

testing results, refer to Application Note 1891:

Understanding the Basics of the Wafer-Level Chip-

Scale Package (WL-CSP)

available on Maxim’s website

at www.maxim-ic.com/ucsp.

WLP Thermal Consideration

When operating at maximum output power, the WLP

thermal dissipation can become a limiting factor. The

WLP package does not dissipate as much power as a

TQFN and as a result will operate at a higher tempera-

ture. At peak output power into a 4Ωload, the

MAX9775/MAX9776 can exceed its thermal limit, trig-

gering thermal protection. As a result, do not choose

the WLP package when maximum output power into 4Ω

is required.

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

34 ______________________________________________________________________________________

Chip Information

PROCESS: BiCMOS

Pin Configurations

TOP VIEW

TQFN-EP*

32 28

293031 25

I.C.

INA1

PGND

I.C.

SHDN

INA2

I.C.

GND

10 13 15

*EP

1611 12

CPVDD

VBIAS

C1P

C1N

CPGND

CPVSS

INC1

HPL

23 I.C.

24 INB1

INB2

VDD

OUTRx

INC2

HPR

VSS

8I.C.

I.C.

SDA

OUT+

PGND

SCL

OUT-

1PVDD

MAX9776

TOP VIEW

(BUMPS ON BOTTOM)

MAX9775

C1P CPGND C1N

CPVDD

234

OUTL+ SDA

PGND SCL

WLP

PVDD OUTR- PGND OUTR+

CPVSS HPL

CL_H VBIAS INC1

CL_L VSS HPR

INC2 OUTRx

INB2 VDD

CR_H GND

OUTL- SHDN INA1 INA2 INB1 CR_L

MAX9776

C1P CPGND C1N

CPVDD

234

OUT+ SDA

PGND SCL

WLP

PVDD I.C. PGND I.C.

CPVSS HPL

I.C. VBIAS INC1

I.C. VSS HPR

INC2 OUTRx

INB2 VDD

I.C. GND

OUT- SHDN INA1 INA2 INB1 I.C.

MAX9775/MAX9776

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information

go to www.maxim-ic.com/packages.)

QFN THIN.EPS

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 35

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

36 ______________________________________________________________________________________

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information

go to www.maxim-ic.com/packages.)

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 37

WLP PKG.EPS

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information

go to www.maxim-ic.com/packages.)

PACKAGE TYPE PACKAGE CODE DOCUMENT NO.

36 WLP W363A3+3 21-0024

32 TQFN-EP T3255-4 21-0140

MAX9775/MAX9776

2 x 1.5W, Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are

implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

Revision History

REVISION

NUMBER

REVISION

DATE DESCRIPTION PAGES

CHANGED

0 3/07 Initial release —

1 7/07 Initial release of MAX9776 UCSP package and updated Tables 3 and 5b 1, 7, 27, 28

2 9/07 Initial release of MAX9775 UCSP and removal of MAX9775 TQFN, updated Pin

Description and Table 9 1, 12, 15, 30, 33, 34

3 1/08 Updated the Typical Application Circuits 17, 18

4 8/08 Changed package code and drawing 1, 33, 34, 37