_______________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
General Description
The MAX16974 is a 2A, current-mode, step-down con-
verter with an integrated high-side switch. It is designed
to operate with 3.5V to 28V input voltages, while using
only 35FA quiescent current at no load. The switching
frequency is adjustable from 220kHz to 2.2MHz by an
external resistor and can be synchronized to an external
clock. The output voltage is pin selectable to be 5V fixed
or 1V to 10V adjustable. The wide input voltage range
makes the device ideal for automotive and industrial
applications.
The device operates in skip mode for reduced current
consumption in light-load applications. An adjustable
reset threshold helps keep microcontrollers alive down to
their lowest specified input voltage. Protection features
include cycle-by-cycle current limit, overvoltage, and
thermal shutdown with automatic recovery. The device
also features a power-good monitor to ease power-
supply sequencing.
The device operates over the -40°C to +125°C auto-
motive temperature range and is available in a 16-pin
TSSOP-EP package.
Applications
Automotive
Industrial
Features
S Wide 3.5V to 28V Input Voltage Range
S 42V Input Transient Tolerance
S 5V Fixed or 1V to 10V Adjustable Output Voltage
S Integrated 2A Internal High-Side Switch
S Adjustable Switching Frequency (220kHz to
2.2MHz)
S Operates Through Cold Crank with High Duty
Cycle
S Frequency Synchronization Input
S Internal Boost Diode
S 35µA Skip-Mode Operating Current
S 5µA Typical Shutdown Current
S Adjustable Power-Good Output Level and Timing
S 3.3V Logic Level to 42V Compatible Enable Input
S Current-Limit, Thermal-Shutdown, and
Overvoltage Protections
S Automotive Temperature Range: -40°C to +125°C
S AEC-Q100 Qualified
19-5630; Rev 1; 7/11
Typical Application Circuit
Ordering Information
/V Denotes an automotive qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
EVALUATION KIT
AVAILABLE
PART TEMP RANGE PIN-PACKAGE
MAX16974AUE/V+ -40NC to +125NC16 TSSOP-EP*
MAX16974
D1 COUT
22µF
CIN2
4.7µF
CIN1
47µF
CCRES
100pF
RCOMP
20kIRRES
10kI
RFOSC
12.1kI
L1
4.7µH VOUT =
5V AT 2A
CBST
0.1µF
LX
BST
VOUT
PLACE CIN2 (4.7µF) AND CIN3 (0.1µF) NEXT TO SUP.
PLACE CIN4 (0.1µF) AND CIN5 (4.7µF) NEXT TO SUPSW.
OUT
VBIAS
VBAT
FB
RESETI VBIAS
RES
FOSC
CRES
CBIAS
1µF
CCOMP2
OPEN
BIAS
CCOMP1
5600pF
COMP
FSYNC
EN SUPSWSUP
CIN3
0.1µF
CIN4
0.1µF
CIN5
4.7µF
GND
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
2 ______________________________________________________________________________________
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
SUP, SUPSW, EN to GND .....................................-0.3V to +45V
SUP to SUPSW, LX ...............................................-0.3V to +0.3V
BST to GND ..........................................................-0.3V to +47V
BST to LX ...............................................................-0.3V to +6V
OUT to GND ..........................................................-0.3V to +12V
RESETI, FOSC, COMP, BIAS, FSYNC, CRES,
RES, FB to GND ..................................................-0.3V to +6V
Output Short-Circuit Duration ....................................Continuous
Continuous Power Dissipation (TA = +70NC)
TSSOP (derate 26.1mW/NC above +70NC) ........... 2088.8mW*
Operating Temperature Range ........................ -40NC to +125NC
Junction Temperature .....................................................+150NC
Storage Temperature Range ............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
ELECTRICAL CHARACTERISTICS
(VSUP = VSUPSW = 14V, L1 = 4.7FH, VEN = 14V, CIN = 10FF, COUT = 22FF, CBIAS = 1FF, CBST = 0.1FF, CCRES = 1nF, RFOSC =
12.1kI, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.)
ABSOLUTE MAXIMUM RATINGS
*As per JEDEC 51 standard (multilayer board).
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TSSOP
Junction-to-Ambient Thermal Resistance (qJA) ........38.3°C/W
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Voltage VSUP Normal operation 3.5 28 V
Supply Current ISUP Normal operation, ILOAD = 1.5A 2 3 mA
Skip mode, no load, VOUT = 5V 35 50 FA
Shutdown Supply Current VEN = 0V 5 10 FA
BIAS Regulator Voltage VBIAS VSUP = VSUPSW = 6V to 42V, VOUT > 6V 4.9 5.1 5.4 V
BIAS Undervoltage Lockout VUVBIAS VBIAS rising 2.85 3.05 3.25 V
BIAS Undervoltage Lockout
Hysteresis
VUVBIAS_
HYS 350 mV
Thermal-Shutdown Threshold 175 NC
OUTPUT VOLTAGE (OUT)
Output Voltage VOUT
Normal operation, VFB = VBIAS, ILOAD = 2A,
TA = +25°C 4.95 5 5.05
V
Normal operation, VFB = VBIAS, ILOAD = 2A,
-4C < TA <+12C 4.9 5 5.1
Skip-Mode Output Voltage VOUT_SKIP No load, VFB = VBIAS (Note 2) 4.95 5.05 5.2 V
Load Regulation VOUT = 5V, VFB = VBIAS; 400mA < ILOAD < 2A 1 %
Line Regulation 6V < VSUP < 28V 0.02 %/V
BST Input Current IBST 100% duty cycle, VBST - VLX = 5V 1.5 3 mA
LX Current Limit ILX 2.5 3 3.5 A
Skip-Mode Current Threshold ISKIP_TH 240 mA
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VSUP = VSUPSW = 14V, L1 = 4.7FH, VEN = 14V, CIN = 10FF, COUT = 22FF, CBIAS = 1FF, CBST = 0.1FF, CCRES = 1nF, RFOSC =
12.1kI, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Power-Switch On-Resistance RON RON measured between SUPSW and LX,
ILX = 500mA 185 400 mI
LX Leakage Current ILX,LEAK VSUP = 28V, VLX = 0V, TA = +25°C 1 FA
VSUP = 28V, VLX = 0V, TA = +125°C 0.04
TRANSCONDUCTANCE AMPLIFIER (COMP)
FB Input Current IFB 20 nA
FB Regulation Voltage VFB
FB connected to an external resistive divider,
TA = +25°C 0.99 1.0 1.01
V
FB connected to an external resistive divider,
-40°C < TA < +125°C 0.985 1.0 1.015
FB Line Regulation DVLINE 6V < VSUP < 28V 0.02 %/V
Transconductance (from FB to
COMP) gm,EA VFB = 1V, VBIAS = 5V 1000 FS
Minimum On-Time tMIN,ON 120 ns
Cold-Crank Event Duty Cycle DCCC 92 %
OSCILLATOR FREQUENCY
Oscillator Frequency RFOSC = 120kI190 260 310 kHz
RFOSC = 12.1kI2.00 2.20 2.48 MHz
EXTERNAL CLOCK INPUT (FSYNC)
External Input Clock Acquisition
Time tFSYNC 4 Cycles
External Input Clock High
Threshold VFSYNC_HI VFSYNC rising 1.5 V
External Input Clock Low Threshold VFSYNC_LO VFSYNC falling 0.5 V
FSYNC Pulldown Resistance IFSYNC 510 kI
Soft-Start Time tSS fSW = 220kHz 9.3 ms
fSW = 2.2MHz 0.93
ENABLE INPUT (EN)
Enable-On Threshold Voltage Low VEN_LO 0.7 V
Enable-On Threshold Voltage High VEN_HI 2.2 V
Enable Threshold Voltage
Hysteresis VEN,HYS 0.35 V
Enable Input Current IEN 0.5 FA
RESET
Reset Internal Switching Level VTH_RISING VFB rising, VRESETI = 0V 0.88 0.90 0.92 V
VTH_FALLING VFB falling, VRESETI = 0V 0.83 0.85 0.87
RESETI Threshold Voltage VRESETI_LO VRESETI falling 1.13 1.2 1.27 V
CRES Threshold Voltage VCRES_HI VCRES rising 1.1 1.25 1.45 V
CRES Threshold Hysteresis VCRES_HYS 0.04 V
RESETI Input Current IRESET VRESETI = 0V 0.02 FA
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
4 ______________________________________________________________________________________
Typical Operating Characteristics
(VSUP = VSUPSW = 14V, VOUT = 5V, FSYNC = GND, fOSC = 400kHz, TA = +25NC, unless otherwise noted. See Figure 1.)
Note 2: Guaranteed by design; not production tested.
ELECTRICAL CHARACTERISTICS (continued)
(VSUP = VSUPSW = 14V, L1 = 4.7FH, VEN = 14V, CIN = 10FF, COUT = 22FF, CBIAS = 1FF, CBST = 0.1FF, CCRES = 1nF, RFOSC =
12.1kI, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CRES Source Current ICRES VOUT in regulation 9.5 10 10.5 FA
CRES Pulldown Current ICRES_PD VOUT out of regulation 1 mA
RES Sink Current VRES pulls low, VRES > 0.4V 1 mA
RES Leakage Current (Open-
Drain Output) VOUT in regulation, TA = +25NC1FA
Reset Debounce Time tRES_DEB VRESETI falling 25 Fs
EFFICIENCY vs. ILOAD
(SKIP MODE)
MAX16974 toc01
ILOAD (C)
EFFICIENCY (%)
0.010.0010.0001
10
20
30
40
50
60
70
80
90
100
0
0.00001 0.1
VSUP = 14V 5V/400kHz
5V/2.2MHz
EFFICIENCY vs. ILOAD
MAX16974 toc02
ILOAD (A)
EFFICIENCY (%)
10.1
10
20
30
40
50
60
70
80
90
100
0
0.01 10
VSUP = 14V
5V/400kHz
5V/2.2MHz
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX16974 toc03
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
262420 2210 12 14 16 188
10
20
30
40
50
60
70
80
90
100
0
6 28
5V/400kHz
5V/2.2MHz
SHUTDOWN CURRENT
vs. INPUT VOLTAGE
MAX16974 toc04
INPUT VOLTAGE (V)
SHUTDOWN CURRENT (µA)
262420 228 10 12 14 16 186
1
2
3
4
5
6
7
8
9
10
11
12
13
14
0
4 28
TA = -40°C
TA = +25°C
TA = +125°C
STARTUP INTO HEAVY LOAD
MAX16974 toc05
0V
2A/div
SF = 400kHz
5V/div
5V/div
0A
0V
VSUP
VOUT
ILOAD
10ms/div
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
_______________________________________________________________________________________ 5
Typical Operating Characteristics (continued)
(VSUP = VSUPSW = 14V, VOUT = 5V, FSYNC = GND, fOSC = 400kHz, TA = +25NC, unless otherwise noted. See Figure 1.)
LOAD TRANSIENT
MAX16974 toc06
0V
1A/div
200mV/div
0A
VOUT
ILOAD
SF = 400kHz
VOUT AC-
COUPLED
UNDERVOLTAGE PULSE
MAX16974 toc07
0V
0V
5V/div
5V/div
5V/div
0V
VSUP
VOUT
20ms/div
VRES SF = 2.2MHz
RESET TIMEOUT PERIOD vs. CRES
MAX16974 toc08
CRES (µF)
RESET TIMEOUT PERIOD (ms)
0.90.80.6 0.70.2 0.3 0.4 0.50.1
10
20
30
40
50
60
70
80
90
100
0
0 1.0
SWITCHING FREQUENCY
vs. TEMPERATURE
MAX16974 toc09
TEMPERATURE (°C)
SWITCHING FREQUENCY (kHz)
1109565 80-10 5 20 35 50-25
410
420
430
440
450
460
470
480
490
500
400
-40 125
VOUT = 5V
LOAD DUMP TEST (5V/2.2MHz)
MAX16974 toc10
0
0
20V/div
5V/div
5V/div
0
VSUP
VOUT
100ms/div
VRES
SHORT-CIRCUIT RESPONSE
MAX16974 toc11
0A
0V
5A/div
5V/div
5V/div
0V
ILX
VOUT
2ms/div
2.2MHz
VRES
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
6 ______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VSUP = VSUPSW = 14V, VOUT = 5V, FSYNC = GND, fOSC = 400kHz, TA = +25NC, unless otherwise noted. See Figure 1.)
SWITCHING FREQUENCY vs. RFOSC
MAX16974 toc12
RFOSC (kI)
SWITCHING FREQUENCY (MHz)
12211222 32 42 62 72 82 9252 102
0.4
0.8
1.2
1.6
2.0
2.4
2.8
0
12
SWITCHING FREQUENCY
vs. SUPPLY VOLTAGE
MAX16974 toc13
SUPPLY VOLTAGE (V)
SWITCHING FREQUENCY (kHz)
262420 2210 12 14 16 188
402
404
406
408
410
412
414
416
418
420
400
6 28
ILOAD = 1A
FSYNC TRANSITION FROM INTERNAL TO EXTERNAL
FREQUENCY (5V/2.2MHz CONFIGURATION)
MAX16974 toc14
0
0
5V/div
2V/div
10V/div
0
EXTERNAL CLOCK
AT SYNC
VOUT
VLX
1µs/div
VOUT vs. ILOAD
MAX16974 toc15
ILOAD (A)
VOUT (V)
1.81.61.2 1.40.4 0.6 0.8 1.00.2
4.92
4.94
4.96
4.98
5.00
5.02
5.04
5.06
5.08
5.10
4.90
0 2.0
VSUP = 14V
5V/400kHz
5V/2.2MHz
SWITCHING FREQUENCY vs. ILOAD
MAX16974 toc16
ILOAD (A)
SWITCHING FREQUENCY (kHz)
1.81.61.2 1.40.4 0.6 0.8 1.00.2
402
404
406
408
410
412
414
416
418
420
400
0 2.0
VSUP = 14V
STARTUP INTO HEAVY LOAD
(5V/2.2MHz)
MAX16974 toc17
0
0
0V
5V/div
2V/div
5V/div
2A/div
0V
VSUP
VOUT
ILOAD
400µs/div
VRES
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
_______________________________________________________________________________________ 7
Typical Operating Characteristics (continued)
(VSUP = VSUPSW = 14V, VOUT = 5V, FSYNC = GND, fOSC = 400kHz, TA = +25NC, unless otherwise noted. See Figure 1.)
OUTPUT RESPONSE TO SLOW INPUT RAMP UP
(5V/400kHz)
MAX16974 toc18
0
0
0
10V/div
5V/div
10V/div
5V/div
0
VSUP
VOUT
VLX
10s/div
ILOAD = 2A
VRES
OUTPUT RESPONSE TO SLOW INPUT RAMP DOWN
(5V/2.2MHz)
MAX16974 toc19
0
0
0
2V/div
2V/div
2V/div
VSUP
VOUT
VLX
10s/div
DIPS AND DROP TEST
(5V/2.2MHz)
MAX16974 toc20
0
0
0
0
10V/div
5V/div
10V/div
2A/div
VSUP
VOUT
VLX
ILOAD
10ms/div
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
8 ______________________________________________________________________________________
Figure 1. 3.3V Fixed Output Voltage Configuration
Pin Configuration
MAX16974
D1 COUT
47µF
COUT1
47µF
CIN2
4.7µF
CIN1
47µF
CCRES
1nF
RCOMP
20kI
RRES
10kI
RFB1
124kI
RFB2
56kI
RFOSC
82kI
L1
15µH VOUT =
3.3V AT 2A AT 300kHz
CBST
0.1µF
LX
BST
VOUT
PLACE CIN2 (4.7µF) AND CIN3 (0.1µF) NEXT TO SUP.
PLACE CIN4 (0.1µF) AND CIN5 (4.7µF) NEXT TO SUPSW.
OUT
VBAT
FB
RESETI
VBIAS
RES
FOSC
CRES
CBIAS
1µF
CCOMP2
OPEN
BIAS
CCOMP1
5600pF
COMP
FSYNC
EN SUPSWSUP
CIN3
0.1µF
CIN4
0.1µF
CIN5
4.7µF
GND
+
TOP VIEW
MAX16974
TSSOP
13
4
SUPSWI.C.
14
3
ENFSYNC
15
2
RES
FOSC
16
1
RESETICRES
10
7
BST
OUT
11
6
SUPFB
9
8
BIASGND
12
5
LX
COMP
EP
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
_______________________________________________________________________________________ 9
Pin Description
PIN NAME FUNCTION
1 CRES
Analog Reset Timer. CRES sources 10FA (typ) of current into an external capacitor to set the reset
timeout period. Reset timeout period is defined as the time between the start of output regulation
and RES going high impedance. Leave unconnected for minimum delay time.
2 FOSC Resistor-Programmable Switching-Frequency Setting Control Input. Connect a resistor from FOSC
to GND to set the switching frequency.
3 FSYNC Synchronization Input. The device synchronizes to an external signal applied to FSYNC. The
external signal period must be 10% shorter than the internal clock period for proper operation.
4 I.C. Internally Connected. Connect to GND.
5 COMP Error Amplifier Output. Connect an RC network from COMP to GND for stable operation. See the
Compensation Network section for more details.
6 FB Feedback Input. Connect an external resistive divider from OUT to FB and GND to set the output
voltage. Connect to BIAS to set the output voltage to 5V.
7 OUT Supply Input. OUT provides power to the internal circuitry when the output voltage of the converter
is set between 3V and 5V.
8 GND Ground
9 BIAS Linear Regulator Output. BIAS powers up the internal circuitry. Bypass with a 1FF capacitor to ground.
10 BST High-Side Driver Supply. Connect a 0.1FF capacitor between LX and BST for proper operation.
11 SUP Voltage Supply Input. SUP powers up the internal linear regulator. Connect a minimum of 1FF
capacitor from SUP to GND close to the IC. Connect SUP to SUPSW.
12 LX Inductor Switching Node. Connect a Schottky diode between LX and GND.
13 SUPSW
Internal High-Side Switch Supply Input. SUPSW provides power to the internal switch. For most
applications, connect 4.7FF and 0.1FF capacitors between SUPSW and GND close to the IC. See
the Input Capacitor section for more details.
14 EN Battery-Compatible Enable Input. Drive EN low to disable the device. Drive EN high to enable the
device.
15 RES Open-Drain Active-Low Reset Output. RES asserts when VOUT is below the reset threshold set by
RESETI.
16 RESETI Reset Threshold Level Input. Connect to a resistive divider to set the reset threshold for RES.
Connect to GND to enable the internal reset threshold.
EP Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective power
dissipation. Do not use as the only IC ground connection. EP must be connected to GND.
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
10 _____________________________________________________________________________________
Detailed Description
The MAX16974 is a constant-frequency, current-mode,
automotive buck converter with an integrated high-side
switch. The device operates with 3.5V to 28V input volt-
ages and tolerates input transients up to 42V. During
undervoltage events, such as cold-crank conditions, the
internal pass device maintains up to 92% duty cycle.
An open-drain, active-low reset output helps monitor the
output voltage. The device offers an adjustable reset
threshold that helps keep microcontrollers alive down
to their lowest specified input voltage. A capacitor pro-
grammable reset timeout ensures proper startup.
The switching frequency is resistor programmable from
220kHz to 2.2MHz to allow optimization for efficiency,
noise, and board space. A clock input, FSYNC, allows
the device to synchronize to an external clock.
During light-load conditions, the device enters skip
mode that reduces the quiescent current down to 35FA.
The 5V fixed output voltage option eliminates the need
for external resistors and reduces the supply current by
up to 50FA. See Figure 2 for the internal block diagram.
Supply Voltage Range (SUP)
The device’s supply voltage range (VSUP) is compatible
with the typical 3.5V to 28V automotive battery voltage
range and can tolerate transients up to 42V.
Figure 2. Internal Block Diagram
10µA
COMP
COMP
GND
B.G.
REF
SOFT-
START
UVLO
MUX
LDO
STANDBY
SUPPLY
REF EA
LOGIC FOR
DROPOUT
RES
VBIAS
FB
RESETI
CRES
PWM
COMP
LEVEL
SHIFT
ILIM
LOGIC
EN
OSC SUM
ISENSE
FSYNC
FOSCBIASSUP
OUT
COMP
DRV
LX
BST SUPSW
MAX16974
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
______________________________________________________________________________________ 11
Linear Regulator Output (BIAS)
The device includes a 5V linear regulator, VBIAS, that
provides power to the internal circuitry. Connect a 1FF
ceramic capacitor from BIAS to GND. If the output
voltage is set between 3.0V and 5.6V, the internal lin-
ear regulator only provides power until the output is in
regulation. The internal linear regulator turns off once the
output is in regulation and load current is below 50mA,
allowing the output to provide power to the device.
External Clock Input (FSYNC)
The device synchronizes to an external clock signal
applied at FSYNC. The signal at FSYNC must have a
10% shorter period than the internal clock period for
proper synchronization. The internal clock signal takes
over if the externally applied signal has a frequency
lower than the internal clock frequency.
Adjustable Reset Level
The device features a programmable reset threshold
using a resistive divider between OUT, RESETI, and
GND. Connect RESETI to GND for the internal threshold.
RES asserts low when the output voltage falls to 85% of
its programmed level. RES deasserts when the output
voltage goes above 90% of its set voltage.
Some microprocessors have a wide input voltage range
(5V to 3.3V) and can operate during device dropout. Use
a resistive divider at RESETI to adjust the reset activation
level (RES goes low) to lower levels. The reference volt-
age at RESETI is 1.2V (typ).
The device also offers a capacitor-programmable reset
timeout period. Connect a capacitor from CRES to GND
to adjust the reset timeout period. When the output volt-
age goes out of regulation, RES asserts low, and the
reset timing capacitor discharges with a 1mA pulldown
current. Once the output is back in regulation, the reset
timing capacitor recharges with 10FA (typ) current. RES
stays low until the voltage at CRES reaches 1.25V (typ).
Dropout Operation
The device has an effective maximum duty cycle to help
refresh the BST capacitor when continuously operated
in dropout. When the high-side switch is on for three
consecutive clock cycles, the device forces the high-
side switch off during the final 35% of the fourth clock
cycle. When the high-side switch is off, the LX node
is pulled low by current flowing through the external
Schottky diode. This increases the voltage across the
BST capacitor. To ensure that the inductor has enough
current to pull LX to ground, an internal load sinks cur-
rent from VOUT when the device is close to dropout and
when the external load is small. Once the input voltage
is increased above the dropout region, the device con-
tinues to regulate without restarting.
If the device has neither external clock nor external load,
the effective maximum duty cycle is 92% when operating
deep into dropout. This effective maximum duty cycle is
influenced by the external load and by the external syn-
chronized clock, if any.
System Enable (EN)
An enable-control input (EN) activates the device from its
low-power shutdown mode. EN is compatible with inputs
from automotive battery level down to 3.3V. The high-
voltage compatibility allows EN to be connected to SUP,
KEY/KL30, or the INH pin of a CAN transceiver.
EN turns on the internal regulator. Once VBIAS is above
the internal lockout level, VUVL = 3.05V (typ), the con-
troller activates and the output voltage ramps up within
2048 cycles of the switching frequency.
A logic-low at EN shuts down the device. During shut-
down, the internal linear regulator and gate drivers turn
off. Shutdown is the lowest power state and reduces the
quiescent current to 5FA (typ). Drive EN high to bring the
device out of shutdown.
Overvoltage Protection
The device includes an overvoltage protection
circuit that protects the device when there is an over-
voltage condition at the output. If the output voltage
increases by more than 10% of its set voltage, the device
stops switching. The device resumes regulation once the
overvoltage condition is removed.
Overload Protection
The overload protection circuitry is activated when the
device is in current limit and VOUT is below the reset
threshold. Under these conditions the device enters a
soft-start mode. If the overcurrent condition is removed
before the soft-start mode is over, the device regulates
the output voltage to its set value. Otherwise, the soft-
start cycle repeats until the overcurrent condition is
removed.
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
12 _____________________________________________________________________________________
Skip Mode
During light-load operation, IINDUCTOR P 240mA, the
device enters skip-mode operation. Skip mode turns
off the internal switch and allows the output to drop
below regulation voltage before the switch is turned on
again. The lower the load current, the longer it takes for
the regulator to initiate a new cycle. Because the con-
verter skips unnecessary cycles, the converter efficiency
increases. During skip mode the quiescent current drops
to 35FA.
Overtemperature Protection
Thermal-overload protection limits the total power dissipa-
tion in the device. When the junction temperature exceeds
+175°C (typ), an internal thermal sensor shuts down the
internal bias regulator and the step-down controller, allow-
ing the IC to cool. The thermal sensor turns on the device
again after the junction temperature cools by +15°C.
Applications Information
Output Voltage/Reset Threshold
Resistive Divider Network
Although the device’s output voltage and reset thresh-
old can be set individually, Figure 3 shows a combined
resistive divider network to set the desired output voltage
and the reset threshold using three resistors. Use the
following formula to determine the RFB3 of the resistive
divider network:
TOTAL REF
FB3 OUT
R V
R V
×
=
where VREF = 1V, RTOTAL = selected total resistance of
RFB1, RFB2, and RFB3 in ohms, and VOUT is the desired
output voltage in volts.
TOTAL REF_RES
FB2 FB3
RES
R V
R - R
V
×
=
where VREF_RES is 1.2V (see the Electrical Characteristics
table), and VRES is the desired reset threshold in volts.
The precision of the reset threshold function is dependent
on the tolerance of the resistors used for the divider. Care
must be taken to choose the values of the resistors. Too
small a resistor value adds to the device’s quiescent cur-
rent, whereas if the resistors are too large, there is some
noise susceptibility to the FB pin.
Boost Capacitor for
Dropout Operation
The device has an internal boost capacitor refresh algo-
rithm for dropout operation. This is required to ensure
proper boost capacitor voltage, which delivers power to
the gate drive circuitry. If the high-side MOSFET is on
consecutively for 3.65 clock cycles, the internal counter
detects this and turns off the high-side MOSFET for 0.35
clock cycles. This is of particular concern when VIN is
falling and approaching VOUT and a minimum switching
frequency of 220kHz is used.
The worst-case condition for boost capacitor refresh time
is with no load on the output. For the boost capacitor
to recharge completely, the LX node must be pulled to
ground. If there is no current in the inductor, the LX node
does not go to ground. To solve this issue, an internal
load of approximately 100mA is turned on at the 6th
clock cycle, which is determined by a separate counter.
In the worst-case condition with no load, the LX node
does not go below ground during the first detect of the
3.65 clock cycles. It must wait for the next 3.65 clock
cycles to finish. This means the soonest the LX node can
go below ground is 4 + 3.65 = 7.65 clock cycles. This
time does not factor in the size of the inductor and the
time it takes for the inductor current to build up to 100mA
(internal load).
So no-load minimum time before refresh is:
dt (no load) = 7.65 clock cycles = 7.65 x 5µs
(at 220kHz) = 34.77µs
Figure 3. Output Voltage/Reset Threshold Resistive Divider
Network
MAX16974
RFB3
RFB2
RFB1
VOUT
RESETI
FB
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
______________________________________________________________________________________ 13
Assume a full 100mA is needed to refresh the BST
capacitor. Depending on the size of the inductor, the time
it takes to build up a full 100mA in the inductor is given by:
dt (inductor) = L x di/dV (current buildup starts from the
6th clock cycle)
L = inductor value chosen in the design guide
di is the required current = 100mA
dV = voltage across the inductor (assume this to be
0.5V), which means VIN is greater than VOUT by 0.5V
If dt (inductor) < 7.65 - 6 (clock cycles), the BST capaci-
tor should be sized as follows:
BST_CAP ≥ IBST(DROPOUT) x dt (no load)/dV
(BST capacitor)
dt (no load) = 7.65 clock cycles = 34.77µs
dV (BST capacitor) for (3.3V to 5V) output = VOUT - 2.7V
(2.7V is the minimum voltage allowed on the bst capacitor)
If dt (inductor) > 7.65 - 6 clock cycles, then wait for the
next count of 3.65 clock cycles making dt (no load) =
11.65 clock cycles.
Considering the typical inductor values used for 220kHz
operation, the safe way to design the BST capacitor is
to assume:
dt (no load) as 16 clock cycles
So the final BST_CAPACITOR equation is:
BST_CAP = IBST(DROPOUT) x dt (no load)/dV (BST
capacitor)
where
IBST(DROPOUT) = 3mA (worst case)
dt (no load) = 16 clock cycles
dV (BST capacitor) = VOUT - 2.7V.
Reset Timeout Period
The device offers a capacitor-adjustable reset timeout
period. Connect up to 0.1FF capacitor from CRES to
GND to set the timeout period. CRES can source 10FA
of current. Use the following formula to set the timeout
period:
-6
1.25V C
RESET_TIMEOUT (s),
10 10 A
×
=×
where C is the capacitor from CRES to GND in Farads.
Internal Oscillator
The switching frequency, fSW, is set by a resistor
(RFOSC) connected from FOSC to GND. See Figure 4 to
select the correct RFOSC value for the desired switching
frequency.
For example, a 2.2MHz switching frequency is set with
RFOSC = 12.1kI. Higher frequencies allow designs
with lower inductor values and less output capacitance.
Consequently, peak currents and I2R losses are lower
at higher switching frequencies, but core losses, gate-
charge currents, and switching losses increase.
Inductor Selection
Three key inductor parameters must be specified for
operation with the device: inductance value (L), inductor
saturation current (ISAT), and DC resistance (RDCR). To
select inductance value, the ratio of inductor peak-to-
peak AC current to DC average current (LIR) must be
selected first. A good compromise between size and
loss is a 30% peak-to-peak ripple current to average
current ratio (LIR = 0.3). The switching frequency, input
voltage, output voltage, and selected LIR determine the
inductor value as follows:
OUT SUP OUT
SUP SW OUT
V (V V )
LV f I LIR
=
where VSUP, VOUT, and IOUT are typical values so that
efficiency is optimum for typical conditions. The switch-
ing frequency is set by RFOSC (see the Internal Oscillator
section). The exact inductor value is not critical and can
be adjusted to make trade-offs among size, cost, effi-
ciency, and transient response requirements.
Figure 4. Switching Frequency vs. RFOSC
SWITCHING FREQUENCY vs. RFOSC
MAX16974 toc12
RFOSC (kI)
SWITCHING FREQUENCY (MHz)
12211222 32 42 62 72 82 9252 102
0.4
0.8
1.2
1.6
2.0
2.4
2.8
0
12
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
14 _____________________________________________________________________________________
Table 1 shows a comparison between small and large
inductor sizes.
The inductor value must be chosen so the maximum induc-
tor current does not reach the minimum current limit of
the device. The optimum operating point is usually found
between 10% and 30% ripple current. When pulse skip-
ping (light loads), the inductor value also determines the
load-current value at which PFM/PWM switchover occurs.
Find a low-loss inductor having the lowest possible
DC resistance that fits in the allotted dimensions. Most
inductor manufacturers provide inductors in standard
values, such as 1.0FH, 1.5FH, 2.2FH, 3.3FH, etc. Also
look for nonstandard values, which can provide a bet-
ter compromise in LIR across the input voltage range. If
using a swinging inductor (where the no-load inductance
decreases linearly with increasing current), evaluate
the LIR with properly scaled inductance values. For
the selected inductance value, the actual peak-to-peak
inductor ripple current (DIINDUCTOR) is defined by:
OUT SUP OUT
INDUCTOR SUP SW
V (V V )
IV f L
= × ×
where DIINDUCTOR is in A, L is in H, and fSW is in Hz.
Ferrite cores are often the best choices, although pow-
dered iron is inexpensive and can work well at 220kHz.
The core must be large enough not to saturate at the
peak inductor current (IPEAK):
INDUCTOR
PEAK LOAD(MAX)
I
I I 2
= +
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitor RMS current requirement (IRMS) is
defined by the following equation:
OUT SUP OUT
RMS LOAD(MAX) SUP
V (V V )
I I V
=
IRMS has a maximum value when the input voltage
equals twice the output voltage (VSUP = 2VOUT), so
IRMS(MAX) = ILOAD(MAX)/2.
Choose an input capacitor that exhibits less than +10NC
self-heating temperature rise at the RMS input current for
optimal long-term reliability.
The input-voltage ripple is comprised of DVQ (caused
by the capacitor discharge) and DVESR (caused by the
equivalent series resistance (ESR) of the capacitor). Use
low-ESR ceramic capacitors with high ripple-current
capability at the input. Assume the contribution from the
ESR and capacitor discharge equal to 50%. Calculate
the input capacitance and ESR required for a specified
input-voltage ripple using the following equations:
ESR
IN L
OUT
V
ESR I
I2
=
+
where
SUP OUT OUT
LSUP SW
(V V ) V
IV f L
×
= × ×
and
OUT OUT
IN Q SW SUPSW
I D(1 D) V
C and D
V f V
×
= =
×
where IOUT is the maximum output current, and D is the
duty cycle.
Output Capacitor
The output filter capacitor must have low enough ESR to
meet output ripple and load-transient requirements, yet
have high enough ESR to satisfy stability requirements.
The output capacitance must be high enough to absorb
the inductor energy while transitioning from full-load
to no-load conditions without tripping the overvoltage
fault protection. When using high-capacitance, low-ESR
capacitors, the filter capacitor’s ESR dominates the
output voltage ripple. So the size of the output capaci-
tor depends on the maximum ESR required to meet the
output voltage ripple (VRIPPLE(P-P)) specifications:
RIPPLE(P P) LOAD(MAX)
V ESR I LIR
= × ×
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as
to the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value.
Table 1. Inductor Size Comparison
INDUCTOR SIZE
SMALLER LARGER
Lower price Smaller ripple
Smaller form factor Higher efficiency
Faster load response Larger fixed-frequency
range in skip mode
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
______________________________________________________________________________________ 15
When using low-capacity filter capacitors, such as
ceramic capacitors, size is usually determined by the
capacity needed to prevent VSAG and VSOAR from caus-
ing problems during load transients. Generally, once
enough capacitance is added to meet the overshoot
requirement, undershoot at the rising-load edge is no
longer a problem (see the VSAG and VSOAR equations
in the Transient Response section). However, low-
capacity filter capacitors typically have high-ESR zeros
that can affect the overall stability. Other important crite-
ria in the choice of the total output capacitance are the
device’s soft-start time and maximum current capability
(see the Soft-Start Time and Maximum Allowed Output
Capacitance section).
Soft-Start Time and Maximum
Allowed Output Capacitance
The device’s soft-start time depends on the selected
switching frequency. The soft-start time is fixed to 2048
cycles, regardless of the switching frequency. This
means at 2.2MHz the soft-start time is ~0.93ms, and at
220kHz the soft-start time is ~9.3ms.
The device is a 2A-capable switching regulator and the
amount of load present at startup determines the total
output capacitance allowed for a particular application.
OUT(MAX) SW
OUT LX(MIN) LOAD(MAX)
C 2048/f
1/ V I - I
×
×
Keeping the above equation in mind, see the following
table to ensure that COUT is less than maximum allowed
values.
Transient Response
The inductor ripple current also impacts transient
response performance, especially at low VSUP - VOUT
differentials. Low inductor values allow the inductor cur-
rent to slew faster, replenishing charge removed from the
output filter capacitors by a sudden load step. The total
output-voltage sag is the sum of the voltage sag while
the inductor is ramping up and the voltage sag before
the next pulse can occur:
( )
( )
( )
( )
2
LOAD(MAX) LOAD(MAX)
SAG OUT
OUT SUP MAX OUT
L I I t t
VC
2C V D V
= +
×
where DMAX is the maximum duty factor (see the
Electrical Characteristics table), L is the inductor value
in FH, COUT is the output capacitor value in FF, t is the
switching period (1/fSW) in Fs, and δt equals (VOUT/
VSUP x t when in fixed-frequency PWM mode, or L x 0.2
x IMAX/(VSUP - VOUT) when in skip mode. The amount of
overshoot (VSOAR) during a full-load to a no-load tran-
sient due to stored inductor energy can be calculated
as:
( )
( )
2
SOAR LOAD(MAX) OUT OUT
V I L/ 2 x C V × ×
Rectifier Selection
The device requires an external Schottky diode rectifier
as a freewheeling diode. Connect this rectifier close
to the device using short leads and short PCB traces.
Choose a rectifier with a continuous current rating greater
than the highest output current-limit threshold (3.5A), and
with a voltage rating greater than the maximum expected
input voltage, VSUPSW. Use a low forward-voltage-drop
Schottky rectifier to limit the negative voltage at LX. Avoid
higher than necessary reverse-voltage Schottky rectifiers
that have higher forward-voltage drops.
Compensation Network
The device uses an internal transconductance error
amplifier with its inverting input and output available
to the user for external frequency compensation. The
output capacitor and compensation network determine
the loop stability. The inductor and the output capaci-
tor are chosen based on performance, size, and cost.
Additionally, the compensation network optimizes the
control-loop stability.
The controller uses a current-mode control scheme that
regulates the output voltage by forcing the required cur-
rent through the external inductor, so the device uses
FREQUENCY = 400kHz
VOUT (V) ILOAD
(STARTUP) (A)
COUT
(MAX ALLOWED)
3.3 2 775FF
5 2 512FF
3.3 0 3.9mF
5 0 2.6mF
FREQUENCY = 2.2MHz
VOUT (V) ILOAD
(STARTUP) (A)
COUT
(MAX ALLOWED)
3.3 2 140FF
5 2 93FF
3.3 0 705FF
5 0 465FF
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
16 _____________________________________________________________________________________
the voltage drop across the high-side MOSFET. Current-
mode control eliminates the double pole in the feedback
loop caused by the inductor and output capacitor result-
ing in a smaller phase shift and requiring less elaborate
error-amplifier compensation than voltage-mode control.
A simple single-series resistor (RC) and capacitor (CC)
are all that is required to have a stable, high-bandwidth
loop in applications where ceramic capacitors are
used for output filtering (Figure 5). For other types of
capacitors, due to the higher capacitance and ESR, the
frequency of the zero created by the capacitance and
ESR is lower than the desired closed-loop crossover fre-
quency. To stabilize a nonceramic output capacitor loop,
add another compensation capacitor (CF) from COMP to
GND to cancel this ESR zero.
The basic regulator loop is modeled as a power modulator,
output feedback divider, and an error amplifier. The power
modulator has a DC gain set by gmc O RLOAD, with a pole
and zero pair set by RLOAD, the output capacitor (COUT),
and its ESR. The following equations approximate the
value for the gain of the power modulator (GAINMOD(DC)),
neglecting the effect of the ramp stabilization. Ramp stabi-
lization is necessary when the duty cycle is above 50% and
is internally done for the device.
MOD(DC) mc LOAD
GAIN g R= ×
where RLOAD = VOUT/ILOUT(MAX) in I and gmc = 3S.
In a current-mode step-down converter, the output
capacitor, its ESR, and the load resistance introduce a
pole at the following frequency:
pMOD OUT LOAD
1
f2 C R
=π × ×
The output capacitor and its ESR also introduce a zero at:
zMOD OUT
1
f2 ESR C
=π × ×
When COUT is composed of “n” identical capacitors in
parallel, the resulting COUT = n O COUT(EACH) and ESR
= ESR(EACH)/n. Note that the capacitor zero for a paral-
lel combination of alike capacitors is the same as for an
individual capacitor.
The feedback voltage-divider has a gain of GAINFB =
VFB/VOUT, where VFB is 1V (typ).
The transconductance error amplifier has a DC gain of
GAINEA(DC) = gm,EA O ROUT,EA, where gm,EA is the error
amplifier transconductance, which is 1000FS (typ), and
ROUT,EA is the output resistance of the error amplifier 50MI.
A dominant pole (fdpEA) is set by the compensation
capacitor (CC) and the amplifier output resistance
(ROUT,EA). A zero (fZEA) is set by the compensation
resistor (RC) and the compensation capacitor (CC).
There is an optional pole (fpEA) set by CF and RC to
cancel the output capacitor ESR zero if it occurs near
the crossover frequency (fC, where the loop gain equals
1 (0dB)). Thus:
pdEA C OUT,EA C
1
f2 C (R R )
=π × × +
zEA C C
1
f2 C R
=π × ×
pEA F C
1
f2 C R
=π × ×
The loop-gain crossover frequency (fC) should be set
below 1/5th of the switching frequency and much higher
than the power-modulator pole (fpMOD):
SW
pMOD C
f
f f 5
<<
Figure 5. Compensation Network
R1
R2
CC
CF
VREF
VOUT
RC
COMP
gm
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
______________________________________________________________________________________ 17
The total loop gain as the product of the modulator gain,
the feedback voltage-divider gain, and the error amplifier
gain at fC should be equal to 1. So:
FB
MOD(fC) EA(fC)
OUT
V
GAIN GAIN 1
V
× × =
For the case where fzMOD is greater than fC:
EA(fC) m,EA C
GAIN g R= ×
pMOD
MOD(fC) MOD(DC) C
f
GAIN GAIN f
= ×
Therefore:
FB
MOD(fC) m,EA C
OUT
V
GAIN g R 1
V
× × × =
Solving for RC:
OUT
Cm,EA FB MOD(fC)
V
Rg V GAIN
=× ×
Set the error-amplifier compensation zero formed by RC
and CC (fzEA) at the fpMOD. Calculate the value of CC
as follows:
CpMOD C
1
C2 f R
=π × ×
If fzMOD is less than 5 x fC, add a second capacitor,
CF, from COMP to GND and set the compensation pole
formed by RC and CF (fpEA) at the fzMOD. Calculate the
value of CF as follows:
FzMOD C
1
C2 f R
=π × ×
As the load current decreases, the modulator pole also
decreases; however, the modulator gain increases
accordingly and the crossover frequency remains the
same.
For the case where fzMOD is less than fC:
The power-modulator gain at fC is:
pMOD
MOD(fC) MOD(DC) zMOD
f
GAIN GAIN f
= ×
The error-amplifier gain at fC is:
zMOD
EA(fC) m,EA C C
f
GAIN g R f
= × ×
Therefore:
zMOD
FB
MOD(fC) m,EA C
OUT C
f
V
GAIN g R 1
V f
× × × × =
Solving for RC:
OUT C
Cm,EA FB MOD(fC) zMOD
V f
Rg V GAIN f
×
=× × ×
Set the error-amplifier compensation zero formed by RC
and CC at the fpMOD (fzEA = fpMOD):
CpMOD C
1
C2 f R
=π × ×
If fzMOD is less than 5 O fC, add a second capacitor, CF,
from COMP to GND. Set fpEA = fzMOD and calculate CF
as follows:
FzMOD C
1
C2 f R
=π × ×
PCB Layout Guidelines
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Use a multilayer
board whenever possible for better noise immunity and
power dissipation. Follow these guidelines for good PCB
layout:
1) Use a large contiguous copper plane under the IC
package. Ensure that all heat-dissipating compo-
nents have adequate cooling. The bottom pad of the
device must be soldered down to this copper plane
for effective heat dissipation and getting the full
power out of the IC. Use multiple vias or a single large
via in this plane for heat dissipation.
2) Isolate the power components and high-current path
from the sensitive analog circuitry. This is essential to
prevent any noise coupling into the analog signals.
3) Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation. The high-current path composed
of input capacitor, high-side FET, inductor, and the
output capacitor should be as short as possible.
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
18 _____________________________________________________________________________________
4) Keep the power traces and load connections short. This
practice is essential for high efficiency. Use thick cop-
per PCBs (2oz vs. 1oz) to enhance full-load efficiency.
5) The analog signal lines should be routed away from
the high-frequency planes. This ensures integrity of
sensitive signals feeding back into the IC.
6) The ground connection for the analog and power sec-
tion should be close to the IC. This keeps the ground
current loops to a minimum. In cases where only one
ground is used, enough isolation between analog return
signals and high power signals must be maintained.
7) Ensure a high-frequency decoupling capacitor of 0.1µF
is placed next to the SUP pin of the IC. This capacitor
prevents high-frequency noise from entering the SUP
pin. Adding a resistor between the SUPSW and SUP
pins along with the decoupling capacitor at the SUP
pin is recommended to reduce noise sensitivity.
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
16 TSSOP-EP U16E+3 21-0108 90-0120
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 19
© 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 11/10 Initial release
1 7/11 Corrected the GAINMOD(DC) and fpMOD equations in the Compensation Network
section 16