SPD02N80C3
CoolMOSTM Power Transistor
Features
• New revolutionary high voltage technology
• Extreme dv/dt rated
• High peak current capability
• Qualified according to JEDEC1) for target applications
• Pb-free lead plating; RoHS compliant
• Ultra low gate charge
• Ultra low effective capacitances
CoolMOSTM 800V designed for:
• Industrial application with high DC bulk voltage
• Switching Application ( i.e. active clamp forward )
Maximum ratings, at Tj=25 °C, unless otherwise specified
Parameter Symbol Conditions Unit
Continuous drain current IDTC=25 °C A
TC=100 °C
Pulsed drain current2) ID,pulse TC=25 °C
Avalanche energy, single pulse EAS ID=1 A, VDD=50 V 90 mJ
Avalanche energy, repetitive tAR2),3) EAR ID=2 A, VDD=50 V
Avalanche current, repetitive tAR2),3) IAR A
MOSFET dv/dtruggedness dv/dtVDS=0…640 V V/ns
Gate source voltage VGS static V
AC (f>1 Hz)
Power dissipation Ptot TC=25 °C W
Operating and storage temperature Tj,Tstg °C
Value
2
1.2
6
±30
42
-55 ... 150
0.05
2
50
±20
VDS 800
V
RDS(on)max @Tj= 25°C 2.7 W
Qg,typ 12 nC
Product Summary
Type Package Marking
SPD02N80C3 PG-TO252-3 02N80C3
PG-TO252-3
Rev. 2.91 page 1 2011-09-28
xsx
; available in Halogen free mold compounda)
2.92
2013-07-31
a) non-Halogen free (OPN: SPD02N80C3BT); Halogen free (OPN: SPD02N80C3AT)
SPD02N80C3
Maximum ratings, at Tj=25 °C, unless otherwise specified
Parameter Symbol Conditions Unit
Continuous diode forward current ISA
Diode pulse current2) IS,pulse 6
Reverse diode dv/dt4) dv/dt4 V/ns
Parameter Symbol Conditions Unit
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case RthJC - - 3 K/W
RthJA
SMD version, device
on PCB, minimal
footprint - - 62
SMD version, device
on PCB, 6 cm2
cooling
area5) - 35 -
Soldering temperature, reflow
soldering Tsold reflow MSL1 - - 260 °C
Electrical characteristics, at Tj=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage V(BR)DSS VGS=0 V, ID=250 µA 800 - - V
Avalanche breakdown voltage V(BR)DS VGS=0 V, ID=2 A - 870 -
Gate threshold voltage VGS(th) VDS=VGS,ID=0.12 mA 2.1 3 3.9
Zero gate voltage drain current IDSS VDS=800 V, VGS=0 V,
Tj=25 °C - - 5 µA
VDS=800 V, VGS=0 V,
Tj=150 °C - 25 -
Gate-source leakage current IGSS VGS=20 V, VDS=0 V - - 100 nA
Drain-source on-state resistance RDS(on) VGS=10 V, ID=1.2 A,
Tj=25 °C - 2.4 2.7 W
VGS=10 V, ID=1.2 A,
Tj=150 °C - 6.5 -
Gate resistance RGf=1 MHz, open drain - 1.2 - W
Values
Thermal resistance, junction -
ambient
Value
TC=25 °C 2
Rev. 2.91 page 2 2011-09-28
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2013-07-31
SPD02N80C3
Parameter Symbol Conditions Unit
min. typ. max.
Dynamic characteristics
Input capacitance Ciss - 290 - pF
Output capacitance Coss - 13 -
Effective output capacitance, energy
related6) Co(er) - 11 -
Effective output capacitance, time
related7) Co(tr) - 26 -
Turn-on delay time td(on) - 25 - ns
Rise time tr- 15 -
Turn-off delay time td(off) - 72 -
Fall time tf- 18 -
Gate to source charge Qgs - 1.5 - nC
Gate to drain charge Qgd - 6 -
Gate charge total Qg- 12 16
Gate plateau voltage Vplateau - 5.5 - V
Reverse Diode
Diode forward voltage VSD VGS=0 V, IF=IS=2 A,
Tj=25 °C - 1 1.2 V
Reverse recovery time trr - 520 - ns
Reverse recovery charge Qrr - 2 - µC
Peak reverse recovery current Irrm - 6 - A
6) Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS.
7) Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Values
VGS=0 V, VDS=100 V,
f=1 MHz
VDD=400 V,
VGS=0/10 V, ID=2 A,
RG=47 ? , Tj
=25 °C
VDD=640 V, ID=2 A,
VGS=0 to 10 V
VGS=0 V, VDS=0 V
to 480 V
5)
Device on 40mm*40mm*1.5 epoxy PCB FR4 with 6cm² (one layer, 70µm thick) copper area for drain connection.
PCB is vertical without blown air
VR=400 V, IF=IS=2 A,
diF/dt=100 A/µs
3) Repetitive avalanche causes additional power losses that can be calculated as PAV=EAR*f.
4) ISD=ID, di/dt=400A/µs, VDClink = 400V, Vpeak<V(BR)DSS, Tj<Tjmax , identical low side and high side switch
2) Pulse width tplimited by Tj,max
1) J-STD20 and JESD22
Rev. 2.91 page 3 2011-09-28
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2013-07-31
SPD02N80C3
1 Power dissipation 2 Safe operating area
Ptot=f(TC)ID=f(VDS); TC=25 °C; D=0
parameter: tp
3 Max. transient thermal impedance 4 Typ. output characteristics
ZthJC=f(tP)ID=f(VDS); Tj=25 °C; tp=10 µs
parameter: D=tp/Tparameter: VGS
0
10
20
30
40
50
0 25 50 75 100 125 150
TC[°C]
Ptot [W]
1 µs
10 µs
100 µs
1 ms
10 ms
DC
101
100
10-1
10-2
1 10 100 1000
VDS [V]
ID[A]
single pulse
0.01
0.02
0.05
0.1
0.2
0.5
10-1
10-2
10-3
10-4
10-5
101
100
10-1
tp[s]
ZthJC [K/W]
5 V
5.5 V
6 V
6.5 V
10 V
20 V
0
1
2
3
4
5
6
7
0 5 10 15 20 25
VDS [V]
ID[A]
limited by on-state
resistance
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SPD02N80C3
5 Typ. output characteristics 6 Typ. drain-source on-state resistance
ID=f(VDS); Tj=150 °C; tp=10 µs RDS(on)=f(ID); Tj=150 °C
parameter: VGS parameter: VGS
7 Drain-source on-state resistance 8 Typ. transfer characteristics
RDS(on)=f(Tj); ID=1.2 A; VGS=10 V ID=f(VGS); |VDS|>2|ID|RDS(on)max;tp=10 µs
parameter: Tj
typ
98 %
0
0.8
1.6
2.4
3.2
4
4.8
5.6
-60 -20 20 60 100 140 180
Tj[°C]
RDS(on) [W]
25 °C
150 °C
0
1
2
3
4
5
6
7
0 2 4 6 8 10
VGS [V]
ID[A]
6 V
10 V
20 V
4.5 V
5 V
5.5 V
0
0.5
1
1.5
2
2.5
3
0 5 10 15 20 25
VDS [V]
ID[A]
4 V 4.5 V
5 V 5.5 V
6 V
10 V
20 V
5
5.4
5.8
6.2
6.6
7
7.4
7.8
8.2
8.6
9
0 1 2 3 4 5 6
ID[A]
RDS(on) [W]
Rev. 2.91 page 5 2011-09-28
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SPD02N80C3
9 Typ. gate charge 10 Forward characteristics of reverse diode
VGS=f(Qgate); ID=2 A pulsed IF=f(VSD); tp=10 µs
parameter: VDD parameter: Tj
11 Avalanche energy 12 Drain-source breakdown voltage
EAS=f(Tj); ID=1 A; VDD=50 V VBR(DSS)=f(Tj); ID=0.25 mA
25 °C
150 °C
150°C (98%)
25°C (98°C)
102
101
100
10-1
0 0.5 1 1.5 2
VSD [V]
IF[A]
160 V
640 V
0
2
4
6
8
10
0 2 4 6 8 10 12 14
Qgate [nC]
VGS [V]
680
720
760
800
840
880
920
960
-60 -20 20 60 100 140 180
Tj[°C]
VBR(DSS) [V]
0
20
40
60
80
25 50 75 100 125 150
Tj[°C]
EAS [mJ]
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SPD02N80C3
13 Typ. capacitances 14 Typ. Coss stored energy
C=f(VDS); VGS=0 V; f=1 MHz Eoss=f(VDS)
0
0.5
1
1.5
2
2.5
0 100 200 300 400 500 600 700 800
VDS [V]
Eoss [µJ]
Ciss
Coss
Crss
103
102
101
100
0 100 200 300 400 500
VDS [V]
C[pF]
Rev. 2.91 page 7 2011-09-28
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SPD02N80C3
Definition of diode switching characteristics
Rev. 2.91 page 8 2011-09-28
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SPD02N80C3
PG-TO252-3: Outline
dimensions in mm/inches
Rev. 2.91 page 9 2011-09-28
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2013-07-31
SPD02N80C3
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2008 Infineon Technologies AG
All Rights Reserved.
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conditions or characteristics. With respect to any examples or hints given herein, any typical
values stated herein and/or any information regarding the application of the device,
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including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
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on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with
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Rev. 2.91 page 10 2011-09-28
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2013-07-31