Page 1
EN6310QA 1A PowerSoC
Step-Down DC-DC Switching Converter with Integrated Inductor
DESCRIPTION
The EN6310QA is a member of Intel Enpirion’s high
efficiency EN6300 family of PowerSoCs. The
EN6310QA is a 1A PowerSoC that is AEC-Q100
qualified for automotive applications.
The EN6310QA employs Intel Enpirion’s EDMOS
MOSFET technology for monolithic integration and
very low switching loss. The device switches at
2.2MHz in fixed PWM operation to eliminate the low
frequency noise that is created by pulse frequency
modulation operating modes. The MOSFET ratios are
optimized to offer high conversion efficiency for
lower VOUT settings.
Output voltage settings are programmable via a
simple resistor divider circuit. Output voltage can be
programmed from as low as 0.6V to 3.3V. The device
has a programmable soft-start ramp rate to
accommodate sequencing and to prevent un-wanted
current inrush at start up. A Power OK (POK) flag is
provided to indicate a fault condition.
The Intel Enpirion power solution significantly helps
in system design and productivity by offering greatly
simplified board design, layout and manufacturing
requirements. In addition, a reduction in the number
of vendors required for the complete power solution
helps to enable an overall system cost savings.
All Intel Enpirion products are RoHS compliant and
lead-free manufacturing environment compatible.
FEATURES
• Integrated inductor, MOSFET and Controller
• -40°C to 105°C Ambient Temperature Range
• AEC-Q100 Qualified for Automotive Applications
• Small 4mm x 5mm x 1.85mm QFN
• High Efficiency up to 96%
• Solution Footprint Less than 65mm2
• 1A Continuous Output Current
• VIN Range of 2.7V to 5.5V
• VOUT Range from 0.6V to 3.3V
• Programmable Soft Start and Power OK Flag
• Fast Transient Response and Recovery Time
• Low Noise and Low Output Ripple; 4mV Typical
• 2.2MHz Switching Frequency
• Under Voltage Lock-out (UVLO), Short Circuit, Over
Current and Thermal Protection
APPLICATIONS
• Automotive Applications
• Altera FPGAs (MAX, ARRIA, CYCLONE,
STRATIX)
• Low Power FPGA Applications
• Noise Sensitive Wireless and RF Applications
Figure 1: Simplified Applications Circuit
Figure 2. Highest Efficiency in Smallest Solution Size
V
OUT
V
IN VOUT
ENABLE
AGND
PVIN
PGND PGND
C
SS
10nF
VFB
R
A
R
B
R
CA
C
A
C
OUT
2x22µF
1206
X7R
AVIN
EN6310QA
SS
R
AVIN
20Ω
C
AVIN
0.47µF
OFF
ON
C
IN1
100pF
C
IN2
4.7µF
0603
X7R
60
65
70
75
80
85
90
95
100
00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency vs. Output Current
VOUT = 2.5V
VOUT = 1.0V
CONDITIONS
V
IN
= 3.3V
DataSheeT
– enpirion® power solutions
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Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
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ORDERING INFORMATION
Part Number Package Markings TJ Rating Package Description
EN6310QA 6310A -40°C to +125°C 30-pin (4mm x 5mm x 1.85mm) QFN
EVB-EN6310QA 6310A QFN Evaluation Board
Packing and Marking Information: https://www.intel.com/support/quality-and-reliability/packing.html
PIN FUNCTIONS
Figure 3: Pin Diagram (Top View)
NOTE A: NC pins are not to be electrically connected to each other or to any external signal, ground or voltage. However,
they must be soldered to the PCB. Failure to follow this guideline may result in part malfunction or damage.
NOTE B: White ‘dot’ on top left is pin 1 indicator on top of the device package.
NOTE C: Keep-Out are No Connect pads that should not to be electrically connected to each other or to any external
signal, ground or voltage. They do not need to be soldered to the PCB.
Keep out
14 15
1
2
3
4
5
6
87
21
20
19
18
17
16
NC(SW)PGND
POK
PGND
PGND
PVIN
VFB
AGND
CSS
ENABLE
AVIN
VOUT
VOUT
NC(SW)
NC(SW)
NC(SW)
VOUT
131211109
2228 27 26 25 24 2330 29
VOUT
VOUT
VOUT
VOUT
VOUT
NC
PGND
PVIN
NC(SW)
NC(SW)
NC(SW)
NC(SW)
NC(SW)
31
PGND
Bottom Pad
Keep out
Keep out
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Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
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PIN DESCRIPTIONS
PIN NAME TYPE FUNCTION
1, 2,
24-30 NC(SW) - NO CONNECT. Do not connect to any signal, voltage, or ground. These pins
are connected internally to the MOSFET common switch node.
3, 4, 20,
21 PGND Ground
Power ground.
The output filter capacitor ground terminal should be
connected to these pins. Refer to application details for proper layout and
ground routing.
5-12 VOUT Power Regulated output. Connect output capacitors from these pins to PGND
(pins 3, 4).
13 VFB Analog NO CONNECT. Do not connect to any signal, voltage, or ground. These pins
may be connected internally.
14 AGND Power Output feed-back node. Connect to center of VOUT resistor divider.
15 NC - Q
uiet analog ground for control circuits. Connect to system ground plane.
16 SS Analog Soft Start startup time programming pin. Connect CSS capacitor from this
pin to AGND.
17 POK Digital
Power OK is an open drain transistor (pulled up to AVIN or similar voltage)
used for power system state indication. POK is logic high when VOUT is
above 90% of VOUT nominal. Leave this pin floating if not used.
18 ENABLE Analog Output enable;
Enable = logic high, Disable = logic low.
19 AVIN Power Quiet input supply for circuitry.
22, 23 PVIN Power
Power ground. The input filter capacitor ground terminal should be
connected to these pins. Refer to application details for proper layout and
ground routing.
31 PGND Ground Input supply voltage for high side MOSFET Switch. Connect input filter
capacitor from this pin to PGND.
ABSOLUTE MAXIMUM RATINGS
CAUTION: Absolute Maximum ratings are stress ratings only. Functional operation beyond the recommended
operating conditions is not implied. Stress beyond the absolute maximum ratings may impair device
life. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
Absolute Maximum Pin Ratings
PARAMETER SYMBOL MIN MAX UNITS
PVIN, AVIN, VOUT -0.3 6.6 V
ENABLE, POK -0.3 VIN+0.3 V
VFB, SS -0.3 2.7 V
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Absolute Maximum Thermal Ratings
PARAMETER CONDITION MIN MAX UNITS
Maximum
Operating Junction
Temperature +150 °C
Storage Temperature Range -65 +150 °C
Reflow Peak Body Temperature (10 Sec) MSL3 JEDEC J-STD-020A +260 °C
Absolute Maximum ESD Ratings
PARAMETER CONDITION MIN MAX UNITS
HBM (Human Body Model) ±2000 V
CDM (Charged Device Model) ±500 V
RECOMMENDED OPERATING CONDITIONS
PARAMETER SYMBOL MIN MAX UNITS
Input Voltage Range VIN 2.7 5.5 V
Output Voltage Range VOUT 0.6 3.3 V
Output Current Range IOUT 1 A
Operating Ambient Temperature Range TA -40 +105 °C
Operating Junction Temperature TJ -40 +125 °C
THERMAL CHARACTERISTICS
PARAMETER SYMBOL TYPICAL UNITS
Thermal Shutdown TSD 140 °C
Thermal Shutdown Hysteresis TSDHYS 20 °C
Thermal Resistance: Junction to Ambient (0 LFM) (1) θJA 60 °C/W
Thermal Resistance: Junction to Case (0 LFM) θJC 3 °C/W
(1) Based on 2oz. external copper layers and proper thermal design in line with EIJ/JEDEC JESD51-7 standard for high
thermal conductivity boards.
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Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
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ELECTRICAL CHARACTERISTICS
NOTE: VIN = PVIN = AVIN = 5V, Minimum and Maximum values are over operating ambient temperature range
unless otherwise noted. Typical values are at TA = 25°C.
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Operating Input Voltage VIN PVIN = AVIN 2.7 5.5 V
Under Voltage Lock-Out
– VIN Rising VUVLOR Voltage above which UVLO is
not asserted 2.3 V
Under Voltage Lock-Out
– VIN Falling VUVLOF Voltage below which UVLO is
asserted 1.9 V
Output Voltage Range VOUT 0.6 3.3 V
Maximum Duty Cycle DMAX 85 %
Feedback Pin Voltage
Intial Accuracy VFB TA = 25°C, VIN = 5.0V,
ILOAD = 100mA
0.6 V
Output Voltage DC
Accuracy
VIN = 3.3V; 0A ≤ IOUT ≤ 1.0A;
-40°C ≤ TA ≤ +105°C
-2.0 +2.25 %
VIN = 5.0V; 0A ≤ IOUT ≤ 1.0A;
-20°C ≤ TA ≤ +105°C
-2.0 +2.0 %
VIN = 5.0V; 0A ≤ IOUT ≤ 1.0A;
-40°C ≤ TA ≤ +105°C
-3.0 +2.0 %
Feedback pin Input
Leakage Current (2) IFB
VFB pin input leakage
current 100 nA
Continuous Output
Current IOUT 1 A
Over Current Trip Level IOCP 1.2 1.8 A
OCP Threshold IOCP 2.7 ≤ VIN ≤ 5.5V 1.2 A
AVIN Shut-Down Current ISD ENABLE = Low 175 µA
PVIN Shut-Down Current ISD ENABLE = Low 2.2 µA
ENABLE Pin Logic
Threshold
ENLOW Pin = Low 0.0 0.4 V
ENHIGH Pin = High 1.8 VIN V
ENABLE Pin Input
Current IENABLE ENABLE = High 5 µA
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Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
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PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
ENABLE Lock-out ENLO
Time before enable will re-
assert internally after being
pulled low
12.5 ms
Switching Frequency fSW 2.2 MHz
Soft Start Time(2) (3) TSS CSS = 10nF 5.2 6.5 7.8 ms
Allowable Soft Start
Capacitor Range(3) CSS 0.47 10 nF
(2) Parameter not production tested but is guaranteed by design.
(3) Soft Start Time range does not include capacitor tolerances.
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TYPICAL PERFORMANCE CURVES
50
55
60
65
70
75
80
85
90
95
100
00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency vs. Output Current
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.5V
VOUT = 1.2V
VOUT = 1.0V
CONDITIONS
V
IN
= 5.0V
50
55
60
65
70
75
80
85
90
95
100
00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency vs. Output Current
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.5V
VOUT = 1.2V
VOUT = 1.0V
CONDITIONS
V
IN
= 3.3V
0.970
0.980
0.990
1.000
1.010
1.020
1.030
00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (A)
Output Voltage vs. Output Current
VIN = 3.3V
VIN = 5V
CONDITIONS
V
OUT
= 1.0V
1.170
1.180
1.190
1.200
1.210
1.220
00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (A)
Output Voltage vs. Output Current
VIN = 3.3V
VIN = 5.0V
CONDITIONS
V
OUT
= 1.2V
1.470
1.480
1.490
1.500
1.510
1.520
00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (A)
Output Voltage vs. Output Current
VIN = 3.3V
VIN = 5.0V
CONDITIONS
V
OUT
= 1.5V
1.750
1.760
1.770
1.780
1.790
1.800
1.810
1.820
00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (A)
Output Voltage vs. Output Current
VIN = 3.3V
VIN = 5.0V
CONDITIONS
V
OUT
= 1.8V
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TYPICAL PERFORMANCE CURVES (CONTINUED)
2.470
2.480
2.490
2.500
2.510
2.520
2.530
2.540
00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (A)
Output Voltage vs. Output Current
VIN = 3.3V
VIN = 5.0V
CONDITIONS
V
OUT
= 2.5V
3.270
3.280
3.290
3.300
3.310
3.320
00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (A)
Output Voltage vs. Output Current
VIN = 5.0V
CONDITIONS
V
OUT
= 3.3V
0.980
0.985
0.990
0.995
1.000
1.005
1.010
1.015
1.020
-40 -15 10 35 60 85 110
OUTPUT VOLTAGE (V)
AMBIENT TEMPERATURE (°C)
Output Voltage vs. Temperature
LOAD = 0A
LOAD = 0.2A
LOAD = 0.4A
LOAD = 0.8A
LOAD = 1A
CONDITIONS
VIN = 3.3V
VOUT_NOM = 1.0V
0.980
0.985
0.990
0.995
1.000
1.005
1.010
1.015
1.020
-40 -15 10 35 60 85 110
OUTPUT VOLTAGE (V)
AMBIENT TEMPERATURE (°C)
Output Voltage vs. Temperature
LOAD = 0A
LOAD = 0.2A
LOAD = 0.4A
LOAD = 0.8A
LOAD = 1A
CONDITIONS
VIN = 5.0V
VOUT_NOM = 1.0V
2.380
2.430
2.480
2.530
2.580
-40 -15 10 35 60 85 110
OUTPUT VOLTAGE (V)
AMBIENT TEMPERATURE (°C)
Output Voltage vs. Temperature
LOAD = 0A
LOAD = 0.2A
LOAD = 0.4A
LOAD = 0.8A
LOAD = 1A
CONDITIONS
VIN = 3.3V
VOUT_NOM = 2.5V
3.220
3.240
3.260
3.280
3.300
3.320
3.340
3.360
3.380
-40 -15 10 35 60 85 110
OUTPUT VOLTAGE (V)
AMBIENT TEMPERATURE (°C)
Output Voltage vs. Temperature
LOAD = 0A
LOAD = 0.2A
LOAD = 0.4A
LOAD = 0.6A
LOAD = 1A
CONDITIONS
VIN = 5.0V
VOUT_NOM = 3.3V
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TYPICAL PERFORMANCE CURVES (CONTINUED)
1.770
1.775
1.780
1.785
1.790
1.795
1.800
1.805
1.810
1.815
1.820
2.5 33.5 44.5 55.5
OUTPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Output Voltage vs. Input Voltage
LOAD = 0A
LOAD = 0.05A
LOAD = 0.25A
LOAD = 0.5A
LOAD = 1A
CONDITIONS
V
OUT_NOM
= 1.8V
T
A
= 25°C
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
-40 -15 10 35 60 85 110
GUARANTEED OUTPUT CURRENT (A)
AMBIENT TEMPERATURE(°C)
No Thermal Derating
Conditions
V
IN
= 5.0V
V
OUT
= 3.3V
CONDITIONS
V
IN
= 5.0V
V
OUT
= 1.0V
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
-40 -15 10 35 60 85 110
GUARANTEED OUTPUT CURRENT (A)
AMBIENT TEMPERATURE(°C)
No Thermal Derating
Conditions
VIN = 5.0V
VOUT = 3.3V
CONDITIONS
VIN = 5.0V
VOUT = 3.3V
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Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
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TYPICAL PERFORMANCE CHARACTERISTICS
VOUT
(AC Coupled)
Output Ripple at 20MHz Bandwidth
CONDITIONS
VIN = 3.3V
VOUT = 1.2V
IOUT = 0A
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (106)
VOUT
(AC Coupled)
Output Ripple at 20MHz Bandwidth
CONDITIONS
VIN = 3.3V
VOUT = 1.2V
IOUT = 1A
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (1206)
VOUT
(AC Coupled)
Output Ripple at 500MHz Bandwidth
CONDITIONS
VIN = 3.3V
VOUT = 1.2V
IOUT = 0A
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (1206)
VOUT
(AC Coupled)
Output Ripple at 500MHz Bandwidth
CONDITIONS
VIN = 3.3V
VOUT = 1.2V
IOUT = 1A
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (1206)
VOUT
(AC Coupled)
Output Ripple at 500MHz Bandwidth
CONDITIONS
VIN = 5V
VOUT = 1.2V
IOUT = 0A
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (1206)
VOUT
(AC Coupled)
Output Ripple at 500MHz Bandwidth
CONDITIONS
VIN = 5V
VOUT = 1.2V
IOUT = 1A
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (1206)
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TYPICAL PERFORMANCE CHARACTERISTICS (CONTINUED)
VOUT
(AC Coupled)
Output Ripple at 500MHz Bandwidth
CONDITIONS
VIN = 5V
VOUT = 3.3V
IOUT = 0A
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (1206)
VOUT
(AC Coupled)
Output Ripple at 500MHz Bandwidth
CONDITIONS
VIN = 5V
VOUT = 3.3V
IOUT = 1A
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (1206)
VOUT = 1V
(AC Coupled)
50mV / DIV
Load Transient from 0A to 1A
CONDITIONS
VIN = 3.3V, VOUT = 1V
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (1206)
Using Datasheet Recommended Components
LOAD
VOUT = 1.8V
(AC Coupled)
50mV / DIV
Load Transient from 0A to 1A
CONDITIONS
VIN = 3.3V, VOUT = 1.8V
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (1206)
Using Datasheet Recommended Components
LOAD
VOUT = 2.5V
(AC Coupled)
50mV / DIV
Load Transient from 0A to 1A
CONDITIONS
VIN = 3.3V, VOUT = 2.5V
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (1206)
Using Datasheet Recommended Components
LOAD
VOUT = 1.0V
(AC Coupled)
50mV / DIV
Load Transient from 0A to 1A
CONDITIONS
VIN = 5.0V, VOUT = 1.0V
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (1206)
Using Datasheet Recommended Components
LOAD
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TYPICAL PERFORMANCE CHARACTERISTICS (CONTINUED)
VOUT = 1.8V
(AC Coupled)
50mV / DIV
Load Transient from 0A to 1A
CONDITIONS
VIN = 5.0V, VOUT = 1.8V
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (1206)
Using Datasheet Recommended Components
LOAD
VOUT = 1.8V
(AC Coupled)
50mV / DIV
Load Transient from 0A to 1A
CONDITIONS
VIN = 5.0V, VOUT = 3.3V
CIN = 4.7µF (0603) + 100pF
COUT = 2x22µF (1206)
Using Datasheet Recommended Components
LOAD
ENABLE
Enable Startup/Shutdown Waveform (0A)
CONDITIONS
VIN = 5V, VOUT = 1.8V, No Load, Css = 10nF
CIN = 4.7µF (0603) + 100pF, COUT = 2x22µF (1206)
VOUT
POK
LOAD
ENABLE
Enable Startup/Shutdown Waveform (1A)
CONDITIONS
VIN = 5V, VOUT = 1.8V, 1A Load, Css = 10nF
CIN = 4.7µF (0603) + 100pF, COUT = 2x22µF (1206)
VOUT
POK
LOAD
ENABLE
Enable Startup Waveform (0A)
CONDITIONS
VIN = 5V, VOUT = 1.8V, No Load, Css = 10nF
CIN = 4.7µF (0603) + 100pF, COUT = 2x22µF (1206)
VOUT
POK
LOAD
ENABLE
Enable Shutdown Waveform (0A)
CONDITIONS
VIN = 5V, VOUT = 1.8V, No Load, Css = 10nF
CIN = 4.7µF (0603) + 100pF, COUT = 2x22µF (1206)
VOUT
POK
LOAD
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FUNCTIONAL BLOCK DIAGRAM
(+)
(-)
Error
Amp
VFB
VOUT
P-Drive
N-Drive
UVLO
Thermal Limit
Current Limit
Soft Start
PLL/
Sawtooth
Generator
(+)
(-)
PWM
Comp
ENABLE
PGND
Logic
Compensation
Network
NC(SW)
AVIN
AGND
Internal
Regulator
Internal
Reference
CSS
Power
OK
POK
PVIN
Figure 4: Functional Block Diagram
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FUNCTIONAL DESCRIPTION
Synchronous DC-DC Step-Down PowerSoC
The EN6310QA is a synchronous buck converter with integrated MOSFET switches and Inductor. The device
can deliver up to 1A of continuous load current. The EN6310QA has a programmable soft start rise time and
a power OK (POK) signal. The device operates in a fixed 2.2MHz PWM mode to eliminate noise associated with
pulse frequency modulation schemes. The control topology is a low complexity type IV voltage mode
providing high noise immunity and stability over the entire operating range. Output voltage is set with a simple
resistor divider. The high switching frequency enables the use of small MLCC input and output filter capacitors.
Figure 4 shows the EN6310QA block diagram.
Operational Features:
The EN6310QA has the following protection features.
• Over-current protection (to protect the IC from excessive load current)
• Short-Circuit protection
• Thermal shutdown with hysteresis
• Under-voltage lockout circuit to disable the converter output when the input voltage is below a pre-
defined level
Protection Features:
• Soft-start circuit, limiting the in-rush current when the converter is initially powered up. The soft start time
is programmable with appropriate choice of soft start capacitor value.
High Efficiency Technology
The key enabler of this revolutionary integration is Enpirion’s proprietary power MOSFET technology. The
advanced MOSFET switches are implemented in deep-submicron CMOS to supply very low switching loss at
high switching frequencies and to allow a high level of integration. The semiconductor process allows seamless
integration of all switching, control, and compensation circuitry.
The proprietary magnetics design provides high-density/high-value magnetics in a very small footprint.
Enpirion magnetics are carefully matched to the control and compensation circuitry yielding an optimal
solution with assured performance over the entire operating range.
Integration for Low-Noise Low-EMI
The EN6310QA utilizes a proprietary low loss integrated inductor. The integration of the inductor greatly
simplifies the power supply design process. The inherent shielding and compact construction of the integrated
inductor reduces the conducted and radiated noise that can couple into the traces of the printed circuit board.
Furthermore, the package layout is optimized to reduce the electrical path length for the high di/dt input AC
ripple currents that are a major source of radiated emissions from DC-DC converters. Careful package and IC
design minimize common mode noise that can be difficult to mitigate otherwise. The integrated inductor
provides the optimal solution to the complexity, output ripple, and noise that plague low power DC-DC
converter design.
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Control Topology
The EN6310QA utilizes an internal type IV voltage mode compensation scheme. Voltage mode control
provides a high degree of noise immunity at light load currents so that low ripple and high accuracy are
maintained over the entire load range. The high switching frequency allows for a very wide control loop
bandwidth and hence excellent transient performance. The EN6310QA is optimized for fast transient recovery
for applications with demanding transient performance. Voltage mode control enables a high degree of
stability over the entire operating range.
Enable
The EN6310QA ENABLE pin enables and disables operation of the device. A logic low will disable the
converter and cause it to shut down. A logic high will enable the converter and initiate a normal soft start
operation. When ENABLE is pulled low, the Power MOSFETs stop switching and the output is discharged in a
controlled manner with a soft pull down MOSFET. Once the enable pin is pulled low, there is a lockout period
before the device can be re-enabled. The lock out period can be found in the Electrical Characteristics Table.
Do not leave ENABLE pin floating or it will be in an unknown random state.
The EN6310QA supports startup into a pre-biased output of up to 1.5V. The output of the EN6310QA can be
pre-biased with a voltage up to 1.5V when it is first enabled.
POK Operation
The POK signal is an open drain signal (requires a pull up resistor to AVIN or similar voltage) from the converter
indicating the output voltage is within the specified range. Typically, a 100kΩ or lower resistance is used as the
pull-up resistor. The POK signal will be logic high (AVIN) when the output voltage is above 90% of the
programmed voltage level. If the output voltage is below this point, the POK signal will be a logic low. The POK
will also be a logic low if the input voltage is in UVLO or if the ENABLE is pulled low. The POK signal can be
used to sequence down-stream converters by tying to their enable pins.
Programmable Soft Start Operation
Soft start is externally programmable by adjusting the value of the CSS capacitor, which is placed between the
respective CSS pin and AGND pin. When the enable pin is pulled high, the output will ramp up monotonically
at a rate determined by the CSS capacitor.
Soft start ramp time is programmable over a range of 0.5ms to 10ms. The longer ramp times allow startup
into very large bulk capacitors that may be present in applications such as wireless broadband or solid state
storage, without triggering an Over Current condition. The rise time is given as:
TRISE [ms] = CSS [nF] x 0.65 ± 25%
NOTE: Rise time does not include capacitor tolerances.
If a 10nF soft-start capacitor is used, then the output voltage rise time will be around 6.5ms. The rise time is
measured from when VIN ≥ VUVLOR and ENABLE pin voltage crosses its logic high threshold to when VOUT reaches
its programmed value.
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Over Current/Short Circuit Protection
The current limit and short-circuit protection is achieved by sensing the current flowing through a sense PFET.
When the sensed current exceeds the current limit, both NFET and PFET switches are turned off and the output
is discharged. After 1.6ms the device will be re-enabled and will then go through a normal soft-start cycle. If
the over current condition persists, the device will enter a hiccup mode.
Under Voltage Lockout
During initial power up an under voltage lockout circuit will hold-off the switching circuitry until the input
voltage reaches a sufficient level to insure proper operation. If the voltage drops below the UVLO threshold,
the lockout circuitry will again disable the switching. Hysteresis is included to prevent chattering between
states.
Thermal Shutdown
When excess power is dissipated in the EN6310QA the junction temperature will rise. Once the junction
temperature exceeds the thermal shutdown temperature the thermal shutdown circuit turns off the converter
output voltage thus allowing the device to cool. When the junction temperature decreases to a safe operating
level, the part will go through the normal startup process. The thermal shutdown temperature and hysteresis
values can be found in The electrical characteristics table.
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Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
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APPLICATION INFORMATION
Output Voltage Setting
The EN6310QA output voltage is programmed using a simple resistor divider network (RA and RB). The
feedback voltage at VFB is nominally 0.6V. RA is fixed at 200kΩ and RB can be calculated based on Figure 5.
The values recommended for COUT, CA, and RCA make up the external compensation of the EN6310QA. It will
vary with each VIN and VOUT combination to optimize on performance. Please see Table 1 for a list of
recommended RA, CA, RCA, and COUT values for each solution. Since VFB is a sensitive node, do not touch the
VFB node while the device is in operation as doing so may introduce parasitic capacitance into the control loop
that causes the device to behave abnormally and damage may occur.
V
OUT
VOUT
PGND
VFB
RA
RB
RCA
CA
COUT
RA
VFB
VFB
VOUT
x
-
=
VFB = 0.6V
EN6310QI
Figure 5: VOUT Resistor Divider & Compensation Capacitor
The output voltage is set by the following formula:
= 1 +
Rearranging to solve for RB:
=
Where:
RA = 200kΩ, VREF = 0.60V
Then RB is given as:
=
120
0.6
RA is chosen as 200kΩ to provide constant loop gain. The output voltage can be programmed over the range
of 0.6V to 3.3V.
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Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
Page 18
Table 1: Compensation values. For output voltages in between, use the values from the higher output voltage
CIN = 4.7µF/0603 + 100pF
CAVIN = 20Ω + 0.47µF
COUT = 47µF/0805 or 2x22µF/0603
RA = 200kΩ, RCA = 1kΩ, RB = 0.6RA/(VOUT – 0.6)
VIN VOUT CA VIN VOUT CA
5.5V
3.3V 15pF
5.5V
1.2V
27pF
5.0V 5.0V
4.5V 4.5V
33pF
5.5V
2.5V 15pF
3.3V
5.0V 2.7V 39pF
4.5V 5.5V
1.0V
39pF
3.3V 5.0V
5.5V
1.8V
15pF
4.5V
5.0V 3.3V
47pF
4.5V 2.7V
3.3V
22pF
5.5V
0.6V
39pF
2.7V 5.0V
5.5V
1.5V
22pF
4.5V 47F
5.0V 3.3V
56pF
4.5V 2.7V
3.3V 27pF
2.7V 33pF
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Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
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Input Filter Capacitor
The EN6310QA requires at least a 4.7µF/0603 and a 100pF input capacitor near the PVIN pins. Low-cost, low-
ESR ceramic capacitors should be used as input capacitors for this converter. The dielectric must be X5R or
X7R rated. Y5V or equivalent dielectric formulations must not be used as these lose too much capacitance
with frequency, temperature and bias voltage. In some applications, lower value capacitors are needed in
parallel with the larger capacitors in order to provide high frequency decoupling. Table 2 contains a list of
recommended input capacitors.
Table 2: Recommended Input Capacitors
DESCRIPTION MFG P/N
4.7µF, 6.3V, X7R, 0603 Taiyo Yuden JMK107BB7475KA-T
Output Capacitor Selection
The EN6310QA requires at least two 22µF/1206 output filter capacitors. Low ESR ceramic capacitors are
required with X7R rated dielectric formulation. Y5V or equivalent dielectric formulations must not be used as
these lose too much capacitance with frequency, temperature and bias voltage. Table 3 contains a list of
recommended output capacitors.
Table 3: Recommended Output Capacitors
DESCRIPTION MFG P/N
22µF, 10V, X7R, 1206
Murata GRM31CR71A226ME15
Taiyo Yuden LMK316AB7226KL-TR
AVX 1206ZC226KAT2A
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Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
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THERMAL CONSIDERATIONS
Thermal considerations are important power supply design facts that cannot be avoided in the real world.
Whenever there are power losses in a system, the heat that is generated by the power dissipation needs to be
accounted for. The Enpirion PowerSoC helps alleviate some of those concerns.
Intel Enpirion EN6310QA DC-DC converter is packaged in a 4x5x1.85mm 30-pin QFN package. The QFN
package is constructed with copper lead frames that have exposed thermal pads. The exposed thermal pad
on the package should be soldered directly on to a copper ground pad on the printed circuit board (PCB) to
act as a heat sink. The recommended maximum junction temperature for continuous operation is 125°C.
Continuous operation above 125°C may reduce long-term reliability. The device has a thermal overload
protection circuit designed to turn off the device at an approximate junction temperature value of 140°C.
The following example and calculations illustrate the thermal performance of the EN6310QA.
Example:
VIN = 5V
VOUT = 3.3V
IOUT = 1A
First calculate the output power.
POUT = 3.3V x 1A = 3.3W
Next, determine the input power based on the efficiency (η) shown in Figure 6.
Figure 6: Efficiency vs. Output Current
50
55
60
65
70
75
80
85
90
95
100
00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency vs. Output Current
VOUT = 3.3V
CONDITIONS
V
IN
= 5.0V
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For VIN = 5V, VOUT = 3.3V at 1A, η ≈ 91%
η = POUT / PIN = 91% = 0.91
PIN = POUT / η
PIN ≈ 3.3W / 0.91 ≈ 3.63W
The power dissipation (PD) is the power loss in the system and can be calculated by subtracting the output
power from the input power.
PD = PIN – POUT
≈ 3.63W – 3.3W ≈ 0.33W
With the power dissipation known, the temperature rise in the device may be estimated based on the theta JA
value (θJA). The θJA parameter estimates how much the temperature will rise in the device for every watt of
power dissipation. The EN6310QA has a θJA value of 60 °C/W without airflow.
Determine the change in temperature (ΔT) based on PD and θJA.
ΔT = PD x θJA
ΔT ≈ 0.33W x 60°C/W ≈ 19.8°C ≈ 20°C
The junction temperature (TJ) of the device is approximately the ambient temperature (TA) plus the change in
temperature. We assume the initial ambient temperature to be 25°C.
TJ = TA + ΔT
TJ ≈ 25°C + 20°C ≈ 45°C
The maximum operating junction temperature (TJMAX) of the device is 125°C, so the device can operate at a
higher ambient temperature. The maximum ambient temperature (TAMAX) allowed can be calculated.
TAMAX = TJMAX – PD x θJA
≈ 125°C – 20°C ≈ 105°C
The maximum ambient temperature the device can reach is 105°C given the input and output conditions. Note
that the efficiency will be slightly lower at higher temperatures and this calculation is an estimate.
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Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
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APPLICATION CIRCUITS
Figure 7: Typical Engineering Schematic
VOUT
VIN VOUT
ENABLE
AGND
PVIN
PGND PGND
C
SS
10nF
VFB
R
A
R
B
R
CA
C
A
C
OUT
2x22µF
1206
X7R
AVIN
EN6310QA
SS
R
AVIN
20
Ω
C
AVIN
0.47µF
OFF
ON
C
IN1
100pF
C
IN2
4.7µF
0603
X7R
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Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
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LAYOUT RECOMMENDATIONS
Figure 8: Drop-In Board Layout Recommendations
Recommendation 1: Input and output filter capacitors should be placed on the same side of the PCB, and as
close to the EN6310QA package as possible. They should be connected to the device with very short and wide
traces. Do not use thermal reliefs or spokes when connecting the capacitor pads to the respective nodes. The
Voltage and GND traces between the capacitors and the EN6310QA should be as close to each other as
possible so that the gap between the two nodes is minimized, even under the capacitors.
Recommendation 2: The system ground plane should be the first layer immediately below the surface layer.
This ground plane should be continuous and un-interrupted below the converter and the input/output
capacitors. Please see the Gerber files on EN6310QA’s product page at www.intel.com/enpirion.
Recommendation 3: The large thermal pad underneath the component must be connected to the system
ground plane through as many vias as possible. The drill diameter of the vias should be 0.33mm, and the vias
must have at least 1 oz. copper plating on the inside wall, making the finished hole size around 0.20-0.26mm.
Do not use thermal reliefs or spokes to connect the vias to the ground plane. This connection provides the
path for heat dissipation from the converter. See Figure 8.
Recommendation 4: Multiple small vias (the same size as the thermal vias discussed in recommendation 3
should be used to connect ground terminal of the input capacitor and output capacitors to the system ground
plane. It is preferred to put these vias under the capacitors along the edge of the GND copper closest to the
+V copper. Please see Figure 8. These vias connect the input/output filter capacitors to the GND plane, and
14060 January 18, 2019 Rev F
Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
Page 24
help reduce parasitic inductances in the input and output current loops. If the vias cannot be placed under CIN
and COUT, then put them just outside the capacitors along the GND slit separating the two components. Do not
use thermal reliefs or spokes to connect these vias to the ground plane. AVIN is the power supply for the
internal small-signal control circuits. It should be connected to the input voltage at a quiet point. A good
location is to place the AVIN connection on the source side of the input capacitor, away from the PVIN pins.
Recommendation 6: The layer 1 metal under the device must not be more than shown in Figure 8. See the
section regarding exposed metal on bottom of package. As with any switch-mode DC-DC converter, try not to
run sensitive signal or control lines underneath the converter package on other layers.
Recommendation 7: The VOUT sense point should be just after the last output filter capacitor. Keep the sense
trace as short as possible in order to avoid noise coupling into the control loop.
Recommendation 8: Keep RA, CA, and RB close to the VFB pin (see Figures 6 and 7). The VFB pin is a high-
impedance, sensitive node. Keep the trace to this pin as short as possible. Whenever possible, connect RB
directly to the AGND pin instead of going through the GND plane.
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Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
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DESIGN CONSIDERATION FOR LEAD-FRAME BASED MODULES
Exposed Metal on Bottom of Package
Lead-frames offer many advantages in thermal performance, in reduced electrical lead resistance, and in
overall foot print. However, they do require some special considerations.
In the assembly process lead frame construction requires that, for mechanical support, some of the lead-
frame cantilevers be exposed at the point where wire-bond or internal passives are attached. This results in
several small pads being exposed on the bottom of the package, as shown in Figure 9.
Only the thermal pad and the perimeter pads are to be mechanically or electrically connected to the PC board.
The PCB top layer under the EN6310QA should be clear of any metal (copper pours, traces, or vias) except for
the thermal pad. The “shaded-out” area in Figure 9 represents the area that should be clear of any metal on
the top layer of the PCB. Any layer 1 metal under the shaded-out area runs the risk of undesirable shorted
connections even if it is covered by soldermask.
The solder stencil aperture should be smaller than the PCB ground pad. This will prevent excess solder from
causing bridging between adjacent pins or other exposed metal under the package.
Figure 9: Lead-Frame Expose Metal (Bottom View)
Shaded area highlights metal that not be mechanically or electrically connected to the PCB.
14060 January 18, 2019 Rev F
Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
Page 26
RECOMMENDED PCB FOOTPRINT
Figure 10: EN6310QA PCB Footprint (Top View)
14060 January 18, 2019 Rev F
Datasheet | Intel® Enpirion® Power Solutions: EN6310QA
WHERE TO GET MORE INFORMATION
For more information about Intel® and Enpirion® PowerSoCs, visit:
www.Intel.com/enpirion
© 2017 Intel Corporation. All rights reserved. Intel, the Intel logo, Altera, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS, and STRATIX words and logos are trademarks of Intel
Corporation or its subsidiaries in the U.S. and/or other countries. Other marks and brands may be claimed as the property of others. Intel reserves the right to make changes to any products and
services at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to
in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
* Other marks and brands may be claimed as the property of others.
Page 28
REVISION HISTORY
Rev Date Change(s)
F Jan, 2019 Changed datasheet into Intel format.
14060 January 18, 2019 Rev F
