2014 Microchip Technology Inc. DS20005369A-page 1
MCP14A0051/2
Features
• High Peak Output Current: 0.5A (typical)
• Wide Input Supply Voltage Operating Range:
- 4.5V to 18V
• Low Shoot-Through/Cross-Conduction Current in
Output Stage
• High Capacitive Load Drive Capability:
- 1000 pF in 40 ns (typical)
• Short Delay Times: 33 ns (tD1), 24 ns (tD2) (typical)
• Low Supply Current: 375 µA (typical)
• Low Voltage Threshold Input and Enable with
Hysteresis
• Latch-Up Protected: Withstands 500 mA Reverse
Current
• Space-Saving Packages:
-6L SOT-23
-6L 2x2 DFN
Applications
• Switch Mode Power Supplies
• Pulse Transformer Drive
• Line Drivers
• Level Translator
• Motor and Solenoid Drive
General Description
The MCP14A0051/2 devices are high-speed MOSFET
drivers that are capable of providing up to 0.5A of peak
current while operating from a single 4.5V to 18V
supply. The inverting (MCP14A0051) or non-inverting
(MCP14A0052) single-channel output is directly
controlled from either TTL or CMOS (2V to 18V) logic.
These devices also feature low shoot-through current,
matched rise and fall times, and short propagation
delays which make them ideal for high switching
frequency applications.
The MCP14A0051/2 family of devices offer enhanced
control with Enable functionality. The active-high
Enable pin can be driven low to drive the output of the
MCP14A0051/2 low regardless of the status of the
Input pin. An integrated pull-up resistor allows the user
to leave the Enable pin floating for standard operation.
Additionally, the MCP14A0051/2 devices feature sepa-
rate ground pins (AGND and GND), allowing greater
noise isolation between the level-sensitive Input/
Enable pins and the fast, high-current transitions of the
push-pull output stage.
These devices are highly latch-up resistant under any
condition within their power and voltage ratings. They
can accept up to 500 mA of reverse current being
forced back into their outputs without damage or logic
upset. All terminals are fully protected against
electrostatic discharge (ESD) up to 1.75 kV (HBM) and
100V (MM).
Package Types
4
1
2
3
6OUT
EN
VDD
AGND
IN
5GND
6-Lead SOT-23 2x2 DFN-6*
GND
EN
IN
1
2
3
6
5
4
VDD
EP
7
AGND
OUT
OUT
MCP14A0051
MCP14A0052
OUT
MCP14A0052 MCP14A0051
* Includes Exposed Thermal Pad (EP); see Ta b le 3 -1 .
0.5A MOSFET Driver
With Low Threshold Input And Enable
MCP14A0051/2
DS20005369A-page 2 2014 Microchip Technology Inc.
Functional Block Diagram
Non-Inverting
Enab le
Input
GND
VDD
Output
Inverting
VREF
VREF
VDD
AG ND
AG ND
Internal
Pull-Up MCP14 A00 51 Inverting
M CP 14 A00 52 Non-Inverting
2014 Microchip Technology Inc. DS20005369A-page 3
MCP14A0051/2
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
VDD, Supply Voltage.............................................+20V
VIN, Input Voltage...........(VDD + 0.3V) to (GND - 0.3V)
VEN, Enable Voltage....... (VDD + 0.3V) to (GND - 0.3V)
Package Power Dissipation (TA= +50°C)
6L SOT-23....................................................0.52 W
6L 2 x 2 DFN................................................1.09 W
ESD Protection on all Pins....................1.75 kV (HBM)
....................................................................100V (MM)
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational sections of this
specification is not intended. Exposure to maximum
rating conditions for extended periods may affect
device reliability.
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, TA= +25°C, with 4.5V VDD 18V.
Parameters Sym. Min. Typ. Max. Units Conditions
Input
Input Voltage Range VIN GND - 0.3V — VDD +0.3 V
Logic ‘1’ High Input Voltage VIH 2.0 1.6 — V
Logic ‘0’ Low Input Voltage VIL —1.20.8V
Input Voltage Hysteresis VHYST(IN) —0.4— V
Input Current IIN -1 — +1 µA 0V VIN VDD
Enable
Enable Voltage Range VEN GND - 0.3V — VDD +0.3 V
Logic ‘1’ High Enable Voltage VEH 2.0 1.6 — V
Logic ‘0’ Low Enable Voltage VEL —1.20.8V
Enable Voltage Hysteresis VHYST(EN) —0.4— V
Enable Pin Pull-Up Resistance RENBL —1.8—MΩVDD =18V, ENB=A
GND
Enable Input Current IEN —10—µAV
DD =18V, ENB=A
GND
Propagation Delay tD3 —3543nsV
DD =18V, V
EN =5V, see
Figure 4-3, (Note 1)
Propagation Delay tD4 —2331nsV
DD =18V, V
EN =5V, see
Figure 4-3, (Note 1)
Output
High Output Voltage VOH VDD -0.025 — — V I
OUT =0A
Low Output Voltage VOL ——0.025VI
OUT =0A
Output Resistance, High ROH —12.517 ΩIOUT =10mA, V
DD =18V
Output Resistance, Low ROL —7.510 ΩIOUT =10mA, V
DD =18V
Peak Output Current IPK —0.5— AV
DD =18V (Note 1)
Latch-Up Protection Withstand
Reverse Current
IREV 0.5 — — A Duty cycle 2%, t 300 µs
(Note 1)
Switching T ime (Note 1)
Rise Time tR—4051nsV
DD =18V, C
L= 1000 pF, see
Figure 4-1, Figure 4-2
(Note 1)
Fall Time tF—2839nsV
DD =18V, C
L= 1000 pF, see
Figure 4-1, Figure 4-2
(Note 1)
Note 1: Tested during characterization, not production tested.
MCP14A0051/2
DS20005369A-page 4 2014 Microchip Technology Inc.
Delay Time tD1 —3341nsV
DD =18V, V
IN =5V, see
Figure 4-1, Figure 4-2,
(Note 1)
Delay Time tD2 —2432nsV
DD =18V, V
IN =5V, see
Figure 4-1, Figure 4-2,
(Note 1)
Power Supply
Supply Voltage VDD 4.5 — 18 V
Power Supply Current
IDD — 330 560 µA VIN =3V, V
EN = 3V
IDD — 360 580 µA VIN =0V, V
EN = 3V
IDD — 360 580 µA VIN =3V, V
EN = 0V
IDD — 375 600 µA VIN =0V, V
EN = 0V
DC CHARACTERISTICS (CONTINUE D)
Electrical Specifications: Unless otherwise noted, TA= +25°C, with 4.5V VDD 18V.
Parameters Sym. Min. Typ. Max. Units Conditions
Note 1: Tested during characterization, not production tested.
DC CHARACTERISTICS (OVE R OPERATING TEMP. RANGE) (Note 1)
Electrical Specifications: Unless otherwise indicated, over the operating range with 4.5V VDD 18V.
Parameters Sym. Min. Typ. Max. Units Conditions
Input
Input Voltage Range VIN GND - 0.3V — VDD +0.3 V
Logic ‘1’ High Input Voltage VIH 2.0 1.6 — V
Logic ‘0’ Low Input Voltage VIL —1.20.8V
Input Voltage Hysteresis VHYST(IN) —0.4— V
Input Current IIN -10 — +10 µA 0V VIN VDD
Enable
Enable Voltage Range VEN GND - 0.3V — VDD +0.3 V
Logic ‘1’ High Enable Voltage VEH 2.0 1.6 — V
Logic ‘0’ Low Enable Voltage VEL —1.20.8V
Enable Voltage Hysteresis VHYST(EN) —0.4— V
Enable Input Current IEN —12—µAV
DD =18V, ENB=A
GND
Propagation Delay tD3 —3341nsV
DD =18V, V
EN =5V, T
A=+125°C,
see Figure 4-3
Propagation Delay tD4 —2533nsV
DD =18V, V
EN =5V, T
A=+125°C,
see Figure 4-3
Output
High Output Voltage VOH VDD - 0.025 — — V DC Test
Low Output Voltage VOL — — 0.025 V DC Test
Output Resistance, High ROH ——24IOUT =10mA, V
DD =18V
Output Resistance, Low ROL ——15IOUT =10mA, V
DD =18V
Note 1: Tested during characterization, not production tested.
2014 Microchip Technology Inc. DS20005369A-page 5
MCP14A0051/2
Switching T ime (Note 1)
Rise Time tR—4556nsV
DD =18V, C
L= 1000 pF,
TA= +125°C, see Figure 4-1,
Figure 4-2
Fall Time tF—3445nsV
DD =18V, C
L= 1000 pF,
TA= +125°C, see Figure 4-1,
Figure 4-2
Delay Time tD1 —3240nsV
DD =18V, V
IN =5V, T
A=+125°C,
see Figure 4-1, Figure 4-2
Delay Time tD2 —2735 V
DD =18V, V
IN =5V, T
A=+125°C,
see Figure 4-1, Figure 4-2
Power Supply
Supply Voltage VDD 4.5 — 18 V
Power Supply Current
IDD ——760uAV
IN =3V, V
EN = 3V
IDD ——780uAV
IN =0V, V
EN = 3V
IDD ——780uAV
IN =3V, V
EN = 0V
IDD ——800uAV
IN =0V, V
EN = 0V
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V VDD 18V
Parameter Sym. Min. Typ. Max. Units Comments
Temperature Ranges
Specified Temperature Range TA-40 — +125 °C
Maximum Junction Temperature TJ——+150°C
Storage Temperature Range TA-65 — +150 °C
Package Thermal Resistances
Thermal Resistance, 6LD 2x2 DFN JA —91—°C/W
Thermal Resistance, 6LD SOT-23 JA —192—°C/W
DC CHARACTERISTICS (OVER OPERATING T EMP. RANGE) (Note 1) (CONTINUED)
Electrical Specifications: Unless otherwise indicated, over the operating range with 4.5V VDD 18V.
Parameters Sym. Min. Typ. Max. Units Conditions
Note 1: Tested during characterization, not production tested.
MCP14A0051/2
DS20005369A-page 6 2014 Microchip Technology Inc.
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, TA= +25°C with 4.5V VDD 18V.
FIGURE 2-1: Rise Time vs. Supply
Voltage.
FIGURE 2-2: Rise Time vs. Capacitive
Load.
FIGURE 2-3: Fall Time vs. Supply
Voltage.
FIGURE 2-4: Fall Time vs. Capacitive
Load.
FIGURE 2-5: Rise and Fall Time vs.
Temperature.
FIGURE 2-6: Cros sove r Cu rrent vs .
Supply Voltage.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0
50
100
150
200
250
300
4 6 8 10 12 14 16 18
Rise Time (ns)
Supply Voltage (V)
470 pF
1000 pF
3300 pF
6800 pF
100 pF
0
20
40
60
80
100
120
140
160
180
200
100 1000 10000
Rise Time (ns)
Capacitive Load (pF)
18V
12V
5V
0
50
100
150
200
250
4 6 8 10 12 14 16 18
Fall Time (ns)
Supply Voltage (V)
470 pF
1000 pF
3300 pF
6800 pF
100 pF
0
20
40
60
80
100
120
140
160
100 1000 10000
Fall Time (ns)
Capacitive Load (pF)
18V
12V
5V
5
10
15
20
25
30
35
40
45
50
55
-40 -25 -10 5 20 35 50 65 80 95 110 125
V
DD
= 18V
tR, 470 pF
tF, 470 pF
tF, 1000 pF
tR, 1000 pF
1
10
100
1000
10000
4 6 8 10 12 14 16 18
Crossover Current (µA)
Supply Voltage (V)
500 kHz
200 kHz
100 kHz
50 kHz
2014 Microchip Technology Inc. DS20005369A-page 7
MCP14A0051/2
Note: Unless otherwise indicated, TA=+25°C with 4.5VVDD 18V.
FIGURE 2-7: Input Propagation Delay vs.
Supply Voltage.
FIGURE 2-8: Input Propagation Delay
Time vs. Input Amplitude.
FIGURE 2-9: Input Propagation Delay vs.
Temperature.
FIGURE 2-10: Enable Propagation Delay
vs. Supply Voltage.
FIGURE 2-11: Enable Propagation Delay
Time vs. Enable Voltage Amplitude.
FIGURE 2-12: Enable Propagation Delay
vs. Temperature.
20
25
30
35
40
45
50
4 6 8 10 12 14 16 18
Input Propagation Delay (ns)
Supply Voltage (V)
V
IN
= 5V
t
D1
t
D2
20
25
30
35
40
4 6 8 10 12 14 16 18
Input Propogation Delay (ns)
Input Voltage Amplitude (V)
t
D2
t
D1
V
DD
= 18V
20
25
30
35
40
-40 -25 -10 5 20 35 50 65 80 95 110 125
Input Propagation Delay (ns)
Temperature (°C)
V
DD
= 18V
V
IN
= 5V
t
D2
t
D1
20
25
30
35
40
45
50
4 6 8 10 12 14 16 18
Enable Propagation Delay (ns)
Supply Voltage (V)
V
EN
= 5V
t
D3
t
D4
20
25
30
35
40
4 6 8 10 12 14 16 18
Enable Propagation Delay (ns)
Enable Voltage Amplitude (V)
t
D4
t
D3
V
DD
= 18V
20
25
30
35
40
-40 -25 -10 5 20 35 50 65 80 95 110 125
Enable Propagation Delay (ns)
Temperature (°C)
t
D4
t
D3
V
DD
= 18V
V
EN
= 5V
MCP14A0051/2
DS20005369A-page 8 2014 Microchip Technology Inc.
Note: Unless otherwise indicated, TA= +25°C with 4.5V VDD 18V.
FIGURE 2-13: Quiescent Supply Current
vs. Supply Voltage.
FIGURE 2-14: Quiescent Supply Current
vs. Temperature.
FIGURE 2-15: Input Threshold vs.
Temperature.
FIGURE 2-16: Input Threshold vs Supply
Voltage.
FIGURE 2-17: Enable Threshold vs.
Temperature.
FIGURE 2-18: Enable Threshold vs Supply
Voltage.
250
300
350
400
4 6 8 10 12 14 16 18
Quiescent Current (µA)
Supply Voltage (V)
V
IN
= 3V,V
EN
= 3V
V
IN
= 0V,V
EN
= 0V
V
IN
= 3V,V
EN
= 0V or V
IN
= 0V,V
EN
= 3V
200
250
300
350
400
450
500
550
-40 -25 -10 5 20 35 50 65 80 95 110 125
Quiescent Current (µA)
Temperature (°C)
V
DD
= 18V
V
IN
= 5V,V
EN
= 5V
V
IN
= 0V,V
EN
= 0V
V
IN
= 5V,V
EN
= 0V or V
IN
= 0V,V
EN
= 5V
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
-40 -25 -10 5 20 35 50 65 80 95 110 125
Input Threshold (V)
Temperature (°C)
V
DD
= 18V
V
IL
V
IH
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
4 6 8 10 12 14 16 18
Input Threshold (V)
Supply Voltage (V)
V
IL
V
IH
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
-40 -25 -10 5 20 35 50 65 80 95 110 125
Enable Threshold (V)
Temperature (°C)
V
DD
= 18V
V
EL
V
EH
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
4 6 8 10 12 14 16 18
Enable Threshold (V)
Supply Voltage (V)
V
EL
V
EH
2014 Microchip Technology Inc. DS20005369A-page 9
MCP14A0051/2
Note: Unless otherwise indicated, TA=+25°C with 4.5VVDD 18V.
FIGURE 2-19: Output Resistance (Output
High) vs. Supply Voltage.
FIGURE 2-20: Output Resistance (Output
Low) vs. Supply Voltage.
FIGURE 2-21: Supply Cur rent vs .
Capacitive Load (VDD = 18V).
FIGURE 2-22: Supply Current vs.
Capacitive Loa d (VDD = 12V).
FIGURE 2-23: Supply Current vs.
Capacitive Loa d (VDD = 6V).
FIGURE 2-24: Supply Current vs.
Frequency (VDD = 18V).
10
15
20
25
30
35
40
45
4 6 8 10 12 14 16
18
ROH - Output Resistance (Ω)
Supply Voltage (V)
TA = +25°C
TA = +125°C
VIN
= 0V (MCP14A0051)
VIN
= 5V (MCP14A0052)
5
10
15
20
25
46810121416
18
ROL - Output Resistance (Ω)
Supply Voltage (V)
TA = +25°C
TA = +125°C
VIN = 5V (MCP14A0051)
VIN = 0V (MCP14A0052)
0
10
20
30
40
50
60
70
80
90
100
100 1000 10000
Supply Current (mA)
Capacitive Load (pF)
1 MHz
500 kHz
200 kHz
100 kHz
50 kHz
10 kHz
V
DD
= 18V
0
5
10
15
20
25
30
35
40
45
50
100 1000 10000
Supply Current (mA)
Capacitive Load (pF)
1 MHz
500 kHz
200 kHz
100 kHz
50 kHz
10 kHz
V
DD
= 12V
0
5
10
15
20
25
30
100 1000 10000
Supply Current (mA)
Capacitive Load (pF)
1 MHz
500 kHz
200 kHz
100 kHz
50 kHz
10 kHz
V
DD
= 6V
0
10
20
30
40
50
60
70
80
90
100
10 100 1000
Supply Current (mA)
Switching Frequency (kHz)
10000 pF
6800 pF
3300 pF
1000 pF
470 pF
100 pF
V
DD
= 18V
MCP14A0051/2
DS20005369A-page 10 2014 Microchip Technology Inc.
Note: Unless otherwise indicated, TA= +25°C with 4.5V VDD 18V.
FIGURE 2-25: Supply Cur rent vs .
Frequency (VDD = 12V).
FIGURE 2-26: Supply Cur rent vs .
Frequency (VDD = 6V).
FIGURE 2-27: Enable Current vs. Supply
Voltage.
0
5
10
15
20
25
30
35
40
45
50
10 100 1000
Supply Current (mA)
Switching Frequency (kHz)
10000 pF
6800 pF
3300 pF
1000 pF
470 pF
100 pF
V
DD
= 12V
0
5
10
15
20
25
30
10 100 1000
Supply Current (mA)
Switching Frequency (kHz)
10000 pF
6800 pF
3300 pF
1000 pF
470 pF
100 pF
V
DD
= 6V
8
9
10
11
12
13
14
46810121416
18
Enable Current (uA)
Supply Voltage (V)
TA = +25°C
TA = +125°C
2014 Microchip Technology Inc. DS20005369A-page 11
MCP14A0051/2
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Tabl e 3 -1.
3.1 Output Pin (OUT, OUT)
The Output is a CMOS push-pull output that is capable
of sourcing and sinking 0.5A of peak current
(VDD = 18V). The low output impedance ensures the
gate of the external MOSFET stays in the intended
state even during large transients. This output also has
a reverse current latch-up rating of 500 mA.
3.2 Power Ground Pin (GND)
GND is the device return pin for the output stage. The
GND pin should have a low-impedance connection to
the bias supply source return. When the capacitive load
is being discharged, high peak currents will flow out of
the ground pin.
3.3 Device Enable Pin (EN)
The MOSFET driver Device Enable is a high-
impedance, TTL/CMOS compatible input. The Enable
input also has hysteresis between the high and low-
input levels, allowing them to be driven from slow rising
and falling signals and to provide noise immunity.
Driving the Enable pin below the threshold will disable
the output of the device, pulling OUT/OUT low,
regardless of the status of the Input pin. Driving the
Enable pin above the threshold allows normal
operation of the OUT/OUT pin based on the status of
the Input pin. The Enable pin utilizes an internal pull up
resistor, allowing the pin to be left floating for standard
driver operation.
3.4 Analog Ground Pin (AGND)
AGND is the device return pin for the input and enable
stages of the MOSFET driver. The AGND pin should be
connected to an electrically “quiet” ground node to pro-
vide a low noise reference for the input and enable
pins.
3.5 Control Input Pin (IN)
The MOSFET driver Control Input is a high-impedance,
TTL/CMOS compatible input. The Input also has
hysteresis between the high and low-input levels,
allowing them to be driven from slow rising and falling
signals and to provide noise immunity.
3.6 Supply Input Pin (VDD)
VDD is the bias supply input for the MOSFET driver and
has a voltage range of 4.5V to 18V. This input must be
decoupled to ground with a local capacitor. This bypass
capacitor provides a localized low-impedance path for
the peak currents that are provided to the load.
3.7 Exposed Metal Pad Pin (EP)
The exposed metal pad of the DFN package is not
internally connected to any potential. Therefore, this
pad can be connected to a ground plane, or other cop-
per plane on a printed circuit board, to aid in heat
removal from the package.
TABLE 3-1: PIN FUNCTION TABLE
Pin No. Symbol Description
6L 2x2 DFN 6L SOT-23
16OUT
/OUT Push-Pull Output
2 5 GND Power Ground
3 4 EN Device Enable
42A
GND Analog Ground
5 3 IN Control Input
61V
DD Supply Input
EP — EP Exposed Thermal Pad (GND)
MCP14A0051/2
DS20005369A-page 12 2014 Microchip Technology Inc.
4.0 APPLICATION INFORMATION
4.1 General Information
MOSFET drivers are high-speed, high-current devices
which are intended to source/sink high peak currents to
charge/discharge the gate capacitance of external
MOSFETs or Insulated-Gate Bipolar Transistors
(IGBTs). In high-frequency switching power supplies,
the Pulse-Width Modulation (PWM) controller may not
have the drive capability to directly drive the power
MOSFET. A MOSFET driver such as the
MCP14A0051/2 family can be used to provide addi-
tional source/sink current capability.
4.2 MOSFET Driver Timing
The ability of a MOSFET driver to transition from a fully-
off state to a fully-on state is characterized by the
driver’s rise time (tR), fall time (tF) and propagation
delays (tD1 and tD2). Figure 4-1 and Figure 4-2 show
the test circuit and timing waveform used to verify the
MCP14A0051/2 timing.
FIGURE 4-1: Inverting Driver Timing
Waveform.
FIGURE 4-2: Non-Inverting Driver Timing
Waveform.
4.3 Enable Function
The enable pin (EN) provides additional control of the
output pin (OUT).This pin is active high and is internally
pulled up to VDD so that the pin can be left floating to
provide standard MOSFET driver operation.
When the enable pin’s voltage is above the Enable pin
high-voltage threshold, (VEN_H), the output is enabled
and allowed to react to the status of the Input pin.
However, when the voltage applied to the Enable pin
falls below the low threshold voltage (VEN_L), the driver
output is disabled and doesn't respond to changes in
the status of the Input pin. When the driver is disabled,
the output is pulled down to a low state. Refer to
Table 4-1 for enable pin logic. The threshold voltage
levels for the Enable pin are similar to the threshold
voltage levels of the Input pin, and are TTL and CMOS
compatible. Hysteresis is provided to help increase the
noise immunity of the enable function, avoiding false
triggers of the enable signal during driver switching.
There are propagation delays associated with the
driver receiving an enable signal and the output
reacting. These propagation delays, tD3 and tD4, are
graphically represented in Figure 4-3.
Input Output
C
L
= 1000 pF
1 µF 0.1 µF
V
DD
= 18V
MCP14A0051
t
D1
10%
90%
Input
Output
5V
18V
0V
0V
V
IH
(Typ.) V
IL
(Typ.)
t
D2
t
F
t
R
Input Output
C
L
= 1000 pF
1 µF 0.1 µF
V
DD
= 18V
MCP14A0052
t
D1
10%
90%
Input
Output
5V
18V
0V
0V
V
IH
(Typ.) V
IL
(Typ.)
t
D2
t
R
t
F
2014 Microchip Technology Inc. DS20005369A-page 13
MCP14A0051/2
TABLE 4-1: ENABLE PIN LOGIC
FIGURE 4-3: Enable Timing Waveform.
4.4 Decoupling Capacitors
Careful PCB layout and decoupling capacitors are
required when using power MOSFET drivers. Large
current is required to charge and discharge capacitive
loads quickly. For example, approximately 720 mA are
needed to charge a 1000 pF load with 18V in 25 ns.
To operate the MOSFET driver over a wide frequency
range with low supply impedance, it is recommended to
place 1.0 µF and 0.1 µF low ESR ceramic capacitors in
parallel between the driver VDD and GND. These
capacitors should be placed close to the driver to
minimize circuit board parasitics and provide a local
source for the required current.
4.5 PCB Layout Considerations
Proper Printed Circuit Board (PCB) layout is important
in high-current, fast switching circuits to provide proper
device operation and robustness of design. Improper
component placement may cause errant switching,
excessive voltage ringing or circuit latch-up. The PCB
trace loop length and inductance should be minimized
by the use of ground planes or traces under the
MOSFET gate drive signal, separate analog and power
grounds, and local driver decoupling.
Placing a ground plane beneath the MCP14A0051/2
devices will help as a radiated noise shield, as well as
providing some heat sinking for power dissipated within
the device.
4.6 Power Dissipation
The total internal power dissipation in a MOSFET driver
is the summation of three separate power dissipation
elements, as shown in Equation 4-1.
EQUATION 4-1:
4.6.1 CAPACITIVE LOAD DISSIPATION
The power dissipation caused by a capacitive load is a
direct function of the frequency, total capacitive load
and supply voltage. The power lost in the MOSFET
driver for a complete charging and discharging cycle of
a MOSFET is shown in Equation 4-2.
EQUATION 4-2:
4.6.2 QUIESCENT POWER DISSIPATION
The power dissipation associated with the quiescent
current draw depends on the state of the Input and
Enable pins. Refer to Sectio n 1.0 “Electrical Char a c-
teristics” for typical quiescent current draw values in
different operating states. The quiescent power dissi-
pation is shown in Equation 4-3.
EQUATION 4-3:
ENB IN MCP14A0051
OUT MCP14A0052
OUT
HH L H
HL H L
LX L L
tD3
10%
90%
Enable
Output
5V
18V
0V
0V
VEH (Typ.) VEL (Typ.)
tD4
PTPLPQPCC
++=
Where:
PT= Total power dissipation
PL= Load power dissipation
PQ= Quiescent power dissipation
PCC = Operating power dissipation
PLfC
T
VDD2
=
Where:
f = Switching frequency
CT= Total load capacitance
VDD = MOSFET driver supply voltage
PQIQH DI
QL 1D–+VDD
=
Where:
IQH = Quiescent current in the High state
D = Duty cycle
IQL = Quiescent current in the Low state
VDD = MOSFET driver supply voltage
MCP14A0051/2
DS20005369A-page 14 2014 Microchip Technology Inc.
4.6.3 OPERATING POWER DISSIPATION
The operating power dissipation occurs each time the
MOSFET driver output transitions because, for a very
short period of time, both MOSFETs in the output stage
are on simultaneously. This cross-conduction current
leads to a power dissipation described in Equation 4-4.
EQUATION 4-4:
PCC CC fVDD
=
Where:
CC = Cross-Conduction constant
(Ampere x second)
f = Switching frequency
VDD = MOSFET driver supply voltage
2014 Microchip Technology Inc. DS20005369A-page 15
MCP14A0051/2
5.0 PACKAGING INFORMATION
5.1 Package Marking Information
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over
to the next line, thus limiting the number of available characters for customer-specific
information.
3
e
3
e
6-Lead DFN (2x2x0.9 mm) Example
6-Lead SOT-23 Example
XXXXY
WWNNN AAAQ4
40256
ABG
256
Standard Markings for SOT-23
Part Number Code
MCP14A0051T-E/MAY ABG
MCP14A0052T-E/MAY ABH
MCP14A0051T-E/CH AAAQY
MCP14A0052T-E/CH AAARY
MCP14A0051/2
DS20005369A-page 16 2014 Microchip Technology Inc.
2014 Microchip Technology Inc. DS20005369A-page 17
MCP14A0051/2
MCP14A0051/2
DS20005369A-page 18 2014 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2014 Microchip Technology Inc. DS20005369A-page 19
MCP14A0051/2
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b
E
4
N
E1
PIN 1 ID BY
LASER MARK
D
123
e
e1
A
A1
A2 c
L
L1
φ
  7 3L+
MCP14A0051/2
DS20005369A-page 20 2014 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2014 Microchip Technology Inc. DS20005369A-page 21
MCP14A0051/2
APPENDIX A: REVISION HISTORY
Revision A (December 2014)
• Original Release of this Document.
2014 Microchip Technology Inc. DS20005369A-page 22
MCP14A0051/2
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Device: MCP14A0051T: High-Speed MOSFET Driver
(Tape and Reel)
MCP14A0052T: High-Speed MOSFET Driver
(Tape and Reel)
Temperature Range: E = -40°C to +125°C (Extended)
Package: CH = Plastic Small Outline Transistor (SOT-23), 6-lead
MAY = Plastic Dual Flat, No Lead Package -
2 x 2 x 0.9 mm Body (DFN) 6-lead
PART NO. –X /XX
PackageTemperature
Range
Device
[X](1)
Tape and Reel
Examples:
a) MCP14A0051T-E/CH: Tape and Reel,
Extended temperature,
6LD SOT-23 package
a) MCP14A0052T-E/MAY:Tape and Reel
Extended temperature,
6LD DFN package
Note 1: Tape and Reel identifier only appears in the
catalog part number description. This identi-
fier is used for ordering purposes and is not
printed on the device package. Check with
your Microchip Sales Office for package
availability with the Tape and Reel option.
2014 Microchip Technology Inc. DS20005369A-page 23
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer,
LANCheck, MediaLB, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC,
SST, SST Logo, SuperFlash and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
The Embedded Control Solutions Company and mTouch are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo,
CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit
Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet,
KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo,
MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code
Generation, PICDEM, PICDEM.net, PICkit, PICtail,
RightTouch logo, REAL ICE, SQI, Serial Quad I/O, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademarks of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2014, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-63276-908-4
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPI C® DSCs, KEELOQ® code hoppin g
devices, Serial EEPROMs, microperiph erals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS20005369A-page 24 2014 Microchip Technology Inc.
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03/25/14