KIT ATION EVALU E L B A AVAIL 19-0856; Rev 0; 7/07 Quad PCI Express, Hot-Plug Controllers Features The MAX5959/MAX5960 quad hot-plug controllers are designed for PCI Express(R) (PCIe) applications. These devices provide hot-plug control for the main 12V, 3.3V, and 3.3V auxiliary supplies of four PCIe slots. The MAX5959/MAX5960s' logic inputs/outputs allow interfacing directly with the system hot-plug management controller or through an SMBusTM with an external I/O expander such as the MAX7313. An integrated debounced attention switch and present-detect signals simplify system design. The MAX5959/MAX5960 drive eight external n-channel MOSFETs to control the 12V and 3.3V main outputs. The 3.3V auxiliary outputs are controlled through 0.2 n-channel MOSFETs. Internal charge pumps provide the gate drive for the 12V outputs while the gate drive of the 3.3V output is driven by the 12V input supply clamped to 5.5V above the respective 3.3V main supply rail. The 3.3V auxiliary outputs are completely independent from the main outputs with their own charge pumps. At power-up, the MAX5959/MAX5960 keep all the MOSFETs off until the supplies rise above their respective undervoltage lockout (UVLO) thresholds. Upon a turn-on command, the MAX5959/MAX5960 enhance the external and internal MOSFETs slowly with a constant gate current to limit the power-supply inrush current. The MAX5959/MAX5960 actively limit the current to protect all outputs at all times and shut down if an overcurrent condition persists longer than the programmable overcurrent timeout. After an overcurrent or overtemperature fault condition, the MAX5959L/MAX5960L latch off while the MAX5959A/MAX5960A automatically restart after a restart time delay. The MAX5959/MAX5960 are offered in latch-off or autorestart versions (see the Selector Guide). The MAX5959/MAX5960 are available in an 80-pin TQFP package and operate over the -40C to +85C temperature range. Applications Servers Desktop Mobile Server Platforms PCIe Compliant Hot Swap 12V, 3.3V, and 3.3V Auxiliary for 4 PCIe Slots Integrated Power MOSFETs for Auxiliary Supply Rails Controls di/dt and dV/dt Active Current Limiting Protects Against Overcurrent/Short-Circuit Conditions Programmable Current-Limit Timeout PWRGD Signal Outputs with Programmable Power-On Reset (POR) (160ms Default) Latched FAULT Signal Output After Overcurrent or Overtemperature Fault Attention Switch Inputs/Outputs with 4ms Debounce Present-Detect Inputs Force-On Inputs Facilitate Testing/Debug Thermal Shutdown Allow Control Through SMBus with an I/O Expander Ordering Information PART TEMP RANGE PINPACKAGE PKG CODE MAX5959AECS+ -40C to +85C 80 TQFP C80-1 C80-1 MAX5959LECS+ -40C to +85C 80 TQFP MAX5960AECS+ -40C to +85C 80 TQFP C80-1 MAX5960LECS+ -40C to +85C 80 TQFP C80-1 +Denotes a lead-free package. Pin Configuration and Typical Application Circuit appear at end of data sheet. PCI Express is a registered trademark of PCI-SIG Corp. SMBus is a trademark of Intel Corp. Workstations Selector Guide PART LATCH OFF MAX5959AECS+ MAX5959LECS+ GUARANTEED AUX CURRENT (mA) 375 550 MAX5960AECS+ MAX5960LECS+ AUTORESTART 375 550 ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 MAX5959/MAX5960 General Description MAX5959/MAX5960 Quad PCI Express, Hot-Plug Controllers ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND, unless otherwise noted.) 12VIN......................................................................-0.3V to +14V 12G_ ..........................................................-0.3V to (V12VIN + 6V) 12S_+, 12S_-, 3.3G_ ..............................-0.3V to (V12VIN + 0.3V) 3.3VAUXIN, ON_, FAULT_, PWRGD_.......................-0.3V to +6V PGND ....................................................................-0.3V to +0.3V All Other Pins ..................................-0.3V to (V3.3VAUXIN + 0.3V) Continuous Power Dissipation (TA = +70C) 80-Pin TQFP (derate 23.3mW/C above +70C).........1860mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V12VIN = V12S_+ = V12S_- = 12V, V3.3S_+ = V3.3S_- = V3.3AUXIN = VON_ = VAUXON_ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = 12G_ = 3.3G_ = OPEN, INPUT_ = PRES-DET_ = PGND = GND, TA = TJ = -40C to +85C, unless otherwise noted. Typical values are at TA = TJ = +25C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS V 12V SUPPLY (MAIN) 12V Supply Input-Voltage Range V12VIN 12V Undervoltage Lockout V12UVLO 12V Undervoltage Lockout Deglitch Time tDEG,UVLO 12V Supply Current I12VIN V12VIN rising 10.8 12 13.2 9.5 10 10.5 V Hysteresis 0.1 V12IN falling below V12UVLO to UVLO assertion 30 V12VIN = 13.2V 1 2.5 mA 49 54 59 mV V12G_ = GND 4 5 6 A Normal turn-off, ON_ = GND, V12G_ = 2V 50 150 250 A Output short-circuit condition, strong gate pulldown to regulation, (V12S+ - V12S-) 1V, V12G_ = 5V 60 120 200 mA 4.8 5.3 5.8 V 3 4 4.8 V 1 A 10 30 A 3.0 3.3 3.6 V 2.50 2.65 2.78 s 12VIN CONTROL 12VIN Current-Limit Threshold (V12S+ - V12S-) 12G_ Gate Charge Current 12G_ Gate Discharge Current V12ILIM I12G, CHG I12G_, DIS 12G_ Gate High Voltage (V12G_ - V12VIN) V12G, H I12G_ = 1A 12G_ Threshold Voltage for PWRGD_ Assertion VPGTH12 Referred to V12VIN, I12G_ = 1A (Note 2) 12S_- Input Bias Current 12S_+ Input Bias Current 3.3V SUPPLY (MAIN) 3.3V Supply Voltage Range Undervoltage Lockout (Note 3) 2 V3.3S_+ 3.3SA+ rising Hysteresis 30 _______________________________________________________________________________________ V mV Quad PCI Express, Hot-Plug Controllers (V12VIN = V12S_+ = V12S_- = 12V, V3.3S_+ = V3.3S_- = V3.3AUXIN = VON_ = VAUXON_ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = 12G_ = 3.3G_ = OPEN, INPUT_ = PRES-DET_ = PGND = GND, TA = TJ = -40C to +85C, unless otherwise noted. Typical values are at TA = TJ = +25C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 17 20 23 mV V3.3G_ = GND 4 5 6 A Normal turn-off, ON_ = GND, V3.3G_ = 2V 50 150 250 A Output short-circuit condition, strong gate pulldown to regulation, V3.3S_+ - V3.3S_- 1V, V3.3G_ = 5V 90 150 250 mA 4.5 5.5 6.8 V 3 4 4.5 V 1 A 20 60 A 3.0 3.3 3.6 V 2.50 2.65 2.78 V 5 mA 3.3V CONTROL 3.3V Current-Limit Threshold (V3.3S_+ - V3.3S_-) V3.3ILIM 3.3G_ Gate Charge Current I3.3G_,CHG 3.3G_ Gate Discharge Current I3.3G_, DIS 3.3G_ Gate High Voltage (V3.3G_- V3.3S_+) V3.3G_H ISOURCE = 1A 3.3G_ Threshold Voltage for PWRGD_ Assertion VPGTH3.3 Referred to V3.3AUXIN, I3.3G_ = 1A (Note 2) 3.3S_- Input Bias Current 3.3S_+ Input Bias Current 3.3V AUXILIARY SUPPLY 3.3VAUXIN Supply Input Voltage Range 3.3VAUXIN Undervoltage Lockout V3.3AUXIN V3.3VAUXUVLO V3.3VAUXIN rising Hysteresis 30 3.3VAUXIN Supply Current V3.3VAUXIN = 3.6V 2.5 3.3VAUXIN to 3.3VAUXO_ Maximum Dropout I3.3VAUXO_ = 550mA (MAX5960) 280 I3.3VAUXO_ = 375mA (MAX5959) 225 3.3VAUXO_ Current-Limit Threshold 3.3VAUXO_ shorted to GND 3.3VAUXO_ Threshold for PWRGD_ Assertion (V3.3VAUXIN - V3.3VAUXO_) VPGTH3.3AUX mV MAX5959 376 450 564 MAX5960 560 700 850 (Note 2) mV mA 400 mV 2.0 V LOGIC SIGNALS Input-Logic Threshold (ON_, FON_, AUXON_, PRES-DET_, INPUT_) Rising edge 1.0 Hysteresis 25 Input Bias Current (ON_, AUXON_, INPUT_) FON_, PRES-DET_ Internal ON_, AUXON_ High-to-Low Deglitch Time 25 50 4 mV 1 A 75 k s _______________________________________________________________________________________ 3 MAX5959/MAX5960 ELECTRICAL CHARACTERISTICS (continued) MAX5959/MAX5960 Quad PCI Express, Hot-Plug Controllers ELECTRICAL CHARACTERISTICS (continued) (V12VIN = V12S_+ = V12S_- = 12V, V3.3S_+ = V3.3S_- = V3.3AUXIN = VON_ = VAUXON_ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = 12G_ = 3.3G_ = OPEN, INPUT_ = PRES-DET_ = PGND = GND, TA = TJ = -40C to +85C, unless otherwise noted. Typical values are at TA = TJ = +25C.) (Note 1) PARAMETER PRES-DET_ High-to-Low Deglitch Time SYMBOL CONDITIONS MIN TYP MAX UNITS 3 5 7 ms 1 s PORADJ = unconnected 90 160 250 RPORADJ = 20k 35 55 75 RPORADJ = 100k 145 265 380 tDEG VPORADJ = GND PWRGD_ Power-On Reset Deglitch Time (Note 2) tPOR_HL RPORADJ = 200k PWRGD_ Low-to-High Deglitch Time PWRGD_, FAULT_ Output High Leakage Current FAULT_ Timeout 530 tPOR_LH PWRGD_, FAULT_ Output Low Voltage 4 ISINK = 2mA 0.1 ISINK = 30mA 0.8 1 TIM = open 5.5 11 17 RTIM = 15k 1.4 2.6 3.8 RTIM = 120k 12 22 32 RTIM = 300k FAULT_ Timeout During Startup Autorestart Delay Time Fault Reset Minimum Pulse Width Thermal Shutdown Threshold tSU OUT_ Voltage High tRESTART Note 1: Note 2: Note 3: Note 4: 4 ms 64 x tFAULT ms s tRESET (Note 4) 100 tSD TJ rising 150 C 20 2.6 ISOURCE = 2mA A ms tFAULT tDBC V 53 2x Thermal Shutdown Hysteresis OUT_ Debounce Time s PWRGD_, FAULT_ = 5.5V tFAULT ms 4.4 V3.3AUXIN - 0.3 6.2 V3.3AUXIN All devices are 100% production tested at TA = +25C. Limits over temperature are guaranteed by design. PWRGD_ asserts a time tPOR_HL after VPGTH12, VPGTH3.3, and VPGTH3.3AUX conditions are met. The UVLO for the 3.3V supply is sensed at 3.3SA+. This is the time that ON_ or AUXON_ must stay low when resetting a fault condition. _______________________________________________________________________________________ ms V Quad PCI Express, Hot-Plug Controllers (V12VIN = V12S_+ = 12V, V3.3S_+ = V3.3S_- = V3.3AUXIN = VON_ = VAUXON_ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = OPEN, INPUT_ = PRES-DET_ = PGND = GND. See the Typical Application Circuit.) 1.04 1.02 1.00 0.98 0.96 0.94 3.5 3.0 2.5 2.0 1.5 -15 10 35 60 1.55 1.50 ON THRESHOLD 1.45 1.40 AUXON THRESHOLD 1.35 1.30 1.0 1.25 1.20 -40 85 -15 10 35 60 -40 85 -15 10 35 60 TEMPERATURE (C) TEMPERATURE (C) TEMPERATURE (C) 3.3VAUXO_ OUTPUT VOLTAGE vs. OUTPUT CURRENT 12G_ AND 3.3G_ GATE CHARGE CURRENT vs. TEMPERATURE 12G_ AND 3.3G_ GATE DISCHARGE CURRENT vs. TEMPERATURE 3.0 MAX5959 MAX5960 2.5 2.0 1.5 1.0 0.5 12G_ 5.10 5.05 5.00 4.95 3.3G_ 4.90 4.85 180 85 MAX5959 toc06 5.15 GATE DISCHARGE CURRENT (A) 3.5 5.20 MAX5959 toc05 MAX5959 toc04 4.0 GATE CHARGE CURRENT (A) -40 MAX5959 toc03 4.0 0 0.90 175 170 3.3G_ 165 160 12G_ 155 4.80 150 4.75 0 0 -40 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 -15 10 35 60 -40 85 -15 10 35 60 TEMPERATURE (C) TEMPERATURE (C) 3.3VAUX INTERNAL SWITCH MAXIMUM DROPOUT vs. TEMPERATURE 12V AND 3.3V CURRENT-LIMIT THRESHOLD VOLTAGE vs. TEMPERATURE AUXILIARY CURRENT LIMIT vs. TEMPERATURE 0.16 0.14 0.12 0.10 0.08 ILOAD = 375mA MAX5959 0.06 0.04 0.02 0 -40 -15 10 35 TEMPERATURE (C) 60 85 60 50 12V CURRENT-LIMIT THRESHOLD 40 3.3V CURRENT-LIMIT THRESHOLD 30 1.00 20 85 MAX5959 toc09 ILOAD = 550mA MAX5960 0.90 AUXILIARY CURRENT (mA) 0.18 MAX5959 toc07 0.20 12V AND 3.3V MAIN CURRENT-LIMIT THRESHOLD (mV) OUTPUT CURRENT (A) MAX5959 toc08 OUTPUT VOLTAGE (V) 1.60 0.5 0.92 DROPOUT VOLTAGE (V) 4.5 THRESHOLD VOLTAGE (V) 1.06 5.0 MAX5959 toc02 1.08 3.3VAUXIN SUPPLY CURRENT (mA) MAX5959 toc01 3.3VAUXIN SUPPLY CURRENT (mA) 1.10 ON AND AUXON LOW-TO-HIGH THRESHOLD VOLTAGE vs. TEMPERATURE 3.3VAUXIN SUPPLY CURRENT vs. TEMPERATURE 12V INPUT SUPPLY CURRENT vs. TEMPERATURE 0.80 0.70 MAX5960 0.60 0.50 MAX5959 0.40 0.30 0.20 10 0.10 0 0 -40 -15 10 35 TEMPERATURE (C) 60 85 -40 -15 10 35 60 85 TEMPERATURE (C) _______________________________________________________________________________________ 5 MAX5959/MAX5960 Typical Operating Characteristics Typical Operating Characteristics (continued) (V12VIN = V12S_+ = 12V, V3.3S_+ = V3.3S_- = V3.3AUXIN = VON_ = VAUXON_ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = OPEN, INPUT_ = PRES-DET_ = PGND = GND. See the Typical Application Circuit.) 3.3VAUXON UNDERVOLTAGE LOCKOUT THRESHOLD vs. TEMPERATURE 12V UNDERVOLTAGE LOCKOUT THRESHOLD vs. TEMPERATURE 2.68 2.66 UVLO THRESHOLD (V) 10.10 10.05 10.00 9.95 9.90 MAX5959 toc11 10.15 12V TURN-ON/OFF TIME MAX5959 toc12 2.70 MAX5959 toc10 10.20 UVLO THRESHOLD (V) MAX5959/MAX5960 Quad PCI Express, Hot-Plug Controllers 10V/div 12V OUTPUT VOLTAGE 20V/div 12G_ 5V/div ON_ 5V/div PWRGD_ 2.64 2.62 2.60 2.58 2.56 2.54 9.85 2.52 9.80 2.50 -40 -15 10 35 60 85 -40 -15 TEMPERATURE (C) 10 35 60 85 40ms/div TEMPERATURE (C) 3.3V TURN-ON/OFF TIME 3.3V AUXILIARY TURN-ON/OFF TIME MAX5959 toc13 MAX5959 toc14 3.3AUXO_OUTPUT VOLTAGE 2V/div 3.3V OUTPUT 5V/div 3.3G_ 10V/div PWRGD_ 2V/div ON_ 5V/div PWRGD_ 5V/div AUXON_ 2V/div 40ms/div 40ms/div TURN-ON DELAY 3.3V OUTPUT AND 3.3V AUXILIARY OUTPUT FAULT CONDITION ON 12V MAIN OUTPUT (AUTORESTART OPTION) MAX5959 toc16 MAX5959 toc15 RLOAD STEP TO 1.5 5V/div 3.3VAUXO_ OUTPUT VOLTAGE 5V/div 3.3 INPUT, 3.3VAUXIN 5V/div 3.3 OUTPUT VOLTAGE 5V/div PWRGD 0A 12G_ 20V/div 0V 12V OUTPUT VOLTAGE 10V/div 0V 3.3G_ 10V/div tRESTART 0V 4ms/div 6 12V OUTPUT CURRENT 5A/div 100ms/div _______________________________________________________________________________________ FAULT_ 5V/div Quad PCI Express, Hot-Plug Controllers (V12VIN = V12S_+ = 12V, V3.3S_+ = V3.3S_- = V3.3AUXIN = VON_ = VAUXON_ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = OPEN, INPUT_ = PRES-DET_ = PGND = GND. See the Typical Application Circuit.) FAULT CONDITION ON 3.3V MAIN OUTPUT (AUTORESTART OPTION) FAULT CONDITION ON AUXILIARY OUTPUT (AUTORESTART OPTION) MAX5959 toc17 MAX5959 toc18 RLOAD STEP TO 4 RLOAD STEP TO 0.5 3.3VAUXO_ OUTPUT CURRENT 500mA/div 3.3V MAIN OUTPUT CURRENT 2A/div 0A 0A 0V 3.3G_ 10V/div 0V 3.3V OUTPUT VOLTAGE 5V/div tRESTART 3.3VAUXO_ OUTPUT VOLTAGE 2V/div 0V 0V 100ms/div 100ms/div FAULT CONDITION ON 12V MAIN OUTPUT (LATCH-OFF OPTION) FAULT CONDITION ON 12V OUTPUT MAX5959 toc19 RLOAD STEP TO 1.5 MAX5959 toc20 12V OUTPUT CURRENT 5A/div RLOAD STEP TO 1.5 12V OUTPUT CURRENT 5A/div tFAULT 12G_ 20V/div 12G_ 20V/div 12V OUTPUT VOLTAGE 10V/div 12V OUTPUT VOLTAGE 10V/div FAULT_ 5V/div FAULT_ 5V/div 100ms/div 4ms/div FAULT CONDITION ON 3.3V MAIN OUTPUT (LATCH-OFF OPTION) FAULT CONDITION ON 3.3V MAIN OUTPUT MAX5959 toc21 MAX5959 toc22 RLOAD STEP TO 0.5 3.3V OUTPUT CURRENT 2A/div 40ms/div FAULT_ 2V/div 0V tRESTART FAULT_ 5V/div tFAULT RLOAD STEP TO 0.5 3.3V OUTPUT CURRENT 2A/div 3.3G_ 10V/div 3.3G_ 10V/div 3.3V OUTPUT VOLTAGE 5V/div 3.3V OUTPUT VOLTAGE 5V/div FAULT_ 5V/div FAULT_ 5V/div 4ms/div _______________________________________________________________________________________ 7 MAX5959/MAX5960 Typical Operating Characteristics (continued) MAX5959/MAX5960 Quad PCI Express, Hot-Plug Controllers Typical Operating Characteristics (continued) (V12VIN = V12S_+ = 12V, V3.3S_+ = V3.3S_- = V3.3AUXIN = VON_ = VAUXON_ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = OPEN, INPUT_ = PRES-DET_ = PGND = GND. See the Typical Application Circuit.) FAULT CONDITION ON AUXILIARY OUTPUT (LATCH-OFF OPTION) FAULT CONDITION ON AUXILIARY OUTPUT MAX5959 toc24 MAX5959 toc23 RLOAD STEP TO 3.5 RLOAD STEP TO 3 tFAULT 3.3VAUXO_ OUTPUT CURRENT 500mA/div 3.3VAUXO_ OUTPUT CURRENT 500mA/div 3.3VAUXO_ OUTPUT VOLTAGE 2V/div 3.3VAUXO_ OUTPUT VOLTAGE 2V/div MAX5960 FAULT_ 2V/div FAULT_ 2V/div MAX5960 10ms/div 100ms/div SHORT CIRCUIT ON 12V MAIN OUTPUT SHORT CIRCUIT ON 12V MAIN OUTPUT MAX5959 toc25 MAX5959 toc26 12V OUTPUT CURRENT 5A/div 12V OUTPUT CURRENT 10A/div 12G_ 20V/div 12V OUTPUT VOLTAGE 10V/div FAULT_ 5V/div 2ms/div 12G_ 20V/div 0V 12V OUTPUT VOLTAGE 10V/div 0V FAULT_ 5V/div 4s/div SHORT CIRCUIT ON 3.3V MAIN OUTPUT SHORT CIRCUIT ON 3.3V MAIN OUTPUT MAX5959 toc27 MAX5959 toc28 2ms/div 8 0V 3.3V OUTPUT CURRENT 2A/div 3.3V OUTPUT CURRENT 10A/div 3.3G_ 5V/div 3.3G_ 5V/div 3.3V OUTPUT VOLTAGE 5V/div 3.3V OUTPUT VOLTAGE 5V/div FAULT_ 5V/div FAULT_ 5V/div 0V 2s/div _______________________________________________________________________________________ Quad PCI Express, Hot-Plug Controllers (V12VIN = V12S_+ = 12V, V3.3S_+ = V3.3S_- = V3.3AUXIN = VON_ = VAUXON_ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = OPEN, INPUT_ = PRES-DET_ = PGND = GND. See the Typical Application Circuit.) SHORT CIRCUIT ON 3.3VAUXO_ (AUXILIARY OUTPUT) SHORT CIRCUIT ON 3.3AUXO_ (AUXILIARY OUTPUT) MAX5959 toc30 MAX5959 toc29 3.3VAUXO_ OUTPUT CURRENT 500mA/div 3.3VAUXO_ OUTPUT CURRENT 5A/div 0A 3.3VAUXO_ OUTPUT VOLTAGE 2V/div 3.3VAUXO_ OUTPUT VOLTAGE 2V/div 0A FAULT_ 5V/div FAULT_ 5V/div MAX5960 MAX5960 4s/div 2ms/div POWER-UP INTO FAULT (AUXILIARY SUPPLY) POWER-UP INTO FAULT (3.3V MAIN) MAX5959 toc32 MAX5959 toc31 RLOAD = 3 3.3VAUXO_ OUTPUT CURRENT 500mA/div tSU 3.3VAUXO_ OUTPUT VOLTAGE 2V/div AUXON_ 5V/div FAULT_ 5V/div MAX5960 5A/div 3.3V OUTPUT CURRENT 5V/div 3.3G_ 2V/div 3.3V OUTPUT VOLTAGE 5V/div ON_, AUXON_ 5V/div FAULT_ 4ms/div 4ms/div POWER-UP INTO FAULT (12V MAIN OUTPUT) PRESENT-DETECT (ON/OFF) OPERATION MAX5959 toc34 MAX5959 toc33 tSU 12V OUTPUT CURRENT 5A/div 10V/div 12V OUTPUT VOLTAGE 12G_ 10V/div 12V OUTPUT VOLTAGE 10V/div ON_, AUXON_ 5V/div 5V/div 3.3VAUXO_ OUTPUT VOLTAGE 5V/div PWRGD_ 5V/div PRES-DET_ FAULT_ 5V/div 4ms/div 40ms/div _______________________________________________________________________________________ 9 MAX5959/MAX5960 Typical Operating Characteristics (continued) Typical Operating Characteristics (continued) (V12VIN = V12S_+ = 12V, V3.3S_+ = V3.3S_- = V3.3AUXIN = VON_ = VAUXON_ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = OPEN, INPUT_ = PRES-DET_ = PGND = GND. See the Typical Application Circuit.) PRESENT-DETECT (ON/OFF) OPERATION FORCED-ON (ON/OFF) OPERATION MAX5959 toc35 MAX5959 toc36 10V/div 12V OUTPUT VOLTAGE 10V/div 5V/div 3.3V OUTPUT VOLTAGE 5V/div 3.3V AUXO_ OUTPUT VOLTAGE 5V/div PWRGD_ 5V/div PWRGD_ 5V/div PRES-DET_ 5V/div FON_ 12V OUTPUT VOLTAGE 4ms/div 40ms/div FORCED-ON (ON/OFF) OPERATION DEBOUNCED INPUT/OUTPUT OPERATION MAX5959 toc38 MAX5959 toc37 10V/div 12V OUTPUT VOLTAGE 5V/div 3.3V OUTPUT VOLTAGE 5V/div PWRGD_ 5V/div FON_ INPUT_ 2V/div OUTPUT_ 2V/div 10ms/div 4ms/div POWER-ON-RESET TIME vs. PORADJ RESISTOR tFAULT TIME DELAY vs. TIM RESISTOR MAX5959 toc40 180 160 140 120 100 80 60 40 20 0 0 100 200 300 400 500 600 700 800 900 1000 RPORADJ (k) 10 200 MAX5959 toc39 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 tFAULT (ms) tPOR_HL (ms) MAX5959/MAX5960 Quad PCI Express, Hot-Plug Controllers 0 200 400 600 800 RTIM (k) ______________________________________________________________________________________ 1000 Quad PCI Express, Hot-Plug Controllers PIN NAME FUNCTION 1 12SB- Slot B 12V Negative Current-Sense Input. Connect 12SB- to the negative side of the current-sense resistor using the Kelvin-sensing technique to ensure accurate current sensing. 2 12SB+ Slot B 12V Positive Current-Sense Input. Connect the positive terminal of the current-sense resistor to 12SB+ using the Kelvin-sensing technique to ensure accurate current sensing. 3 AUXONB 4 ONB 5 INPUT1 6 OUTPUT1 7 INPUT2 8 OUTPUT2 9, 61, 80 N.C. 10 FOND Slot D Forced-On Input. FOND has a 50k internal pullup to 3.3VAUXIN. A logic-low on FOND turns on all slot D outputs as long as the power inputs are within their operating range, regardless of the status of the other input signals. Leave FOND unconnected for normal operation. 11 PRES-DETD Slot D Present-Detect Input. PRES-DETD accepts inputs from PRSNT#_# on a PCIe connector. PRESDETD has an internal 50k pullup to 3.3VAUXIN. When PRES-DETA is low, the outputs follow the command from OND and AUXOND after a 4ms debounced time. When PRES-DETD goes from low to high, all outputs of the respective slot shut down with no delay. 12 OND 13 AUXOND 14 GND Ground 15 FONC Slot C Forced-On Input C. FONC has a 50k internal pullup to 3.3VAUXIN. A logic-low on FONC turns on all slot C outputs as long as the power inputs are within their operating range, regardless of the status of the other input signals. Leave FONC unconnected for normal operation. 16 PRES-DETC Slot C Present-Detect Input. PRES-DETC accepts inputs from PRSNT#_# on a PCIe connector. PRESDETC has an internal 50k pullup to 3.3VAUXIN. When PRES-DETC is low, the outputs follow the command from ONC and AUXONC after a 4ms debounced time. When PRES-DETC goes from low to high, all outputs of the respective slot shut down with no delay. 17 ONC 18 AUXONC 19 12SC+ Slot C 12V Positive Current-Sense Input. Connect the positive terminal of the current-sense resistor to 12SC+ using the Kelvin-sensing technique to ensure accurate current sensing. 20 12SC- Slot C 12V Negative Current-Sense Input. Connect 12SC- to the negative side of the current-sense resistor using the Kelvin-sensing technique to ensure accurate current sensing. 21 12GC Slot C 12V Gate-Drive Output. Connect 12GC to the gate of slot C's 12V MOSFET. At power-up, 12GC is raised to the internal charge-pump voltage level by a constant current. 22 3.3SC+ Slot B 3.3V Auxiliary Output Enable. A logic-high at AUXONB turns on the slot B auxiliary output. Slot B 12V and 3.3V Main Outputs Enable. A logic-high at ONB turns on the 12V and 3.3V main outputs of slot B (see Table 2). Digital Logic Gate Input 1 Digital Output 1. 4ms debounced digital output of INPUT1. Digital Logic Gate Input 2 Digital Output 2. 4ms debounced digital output of INPUT2. No Connection. Not internally connected. Leave unconnected. Slot D 12V and 3.3V Main Outputs Enable. A logic-high at OND turns on the 12V and 3.3V main outputs of slot D (see Table 2). Slot D 3.3V Auxiliary Output Enable. A logic-high at AUXOND turns on the slot D auxiliary output. Slot C 12V And 3.3V Main Outputs Enable. A logic-high at ONC turns on the 12V and 3.3V main outputs of slot C (see Table 2). Slot C 3.3V Auxiliary Output Enable. A logic-high at AUXONC turns on the slot C auxiliary output. Slot C 3.3V Positive Current-Sense Input. Connect the positive side of the current-sense resistor to 3.3SC+ using the Kelvin-sensing technique to ensure accurate current sensing. ______________________________________________________________________________________ 11 MAX5959/MAX5960 Pin Description Quad PCI Express, Hot-Plug Controllers MAX5959/MAX5960 Pin Description (continued) PIN NAME FUNCTION 23 3.3SC- Slot C 3.3V Negative Current-Sense Input. Connect to the negative side of the sense resistor using the Kelvin-sensing technique to ensure accurate current sensing. 24 3.3GC Slot C 3.3V Gate-Drive Output. Connect 3.3GC to the gate of slot C's 3.3V MOSFET. At power-up, 3.3GC is charged to 5.5V above the 3.3V supply by a constant current derived from V12VIN. V3.3GC`s rise time is determined by the external gate capacitance. Open-Drain Fault Output Signal. FAULTC latches active-low whenever slot C outputs are shut down due to a fault. A fault is either of: * An overcurrent condition lasting longer than the overcurrent timeout. * A device over temperature condition. If the fault is detected in the main outputs, FAULTC must be reset by toggling the ONC input. If the fault is in the auxiliary output, FAULTC must be reset by toggling both ONC and AUXONC. For the autorestart version, FAULTC is reset when the part initiates the next power-on cycle. 25 FAULTC 26 PWRGDC 27,28 3.3AUXOC Slot C 3.3V Auxiliary Power-Supply Output 29, 30, 31, 69, 70, 71 3.3VAUXIN 3.3V Auxiliary Supply Input. 3.3VAUXIN is the input to a charge pump that drives the internal MOSFETs connecting 3.3AUXIN to 3.3AUXO_. V3.3AUXIN is also used to power the internal control logic and analog references of the MAX5959/MAX5960 and must always be connected to a supply between 3V and 3.6V. Bypass 3.3AUXIN with at least a 0.1F capacitor to GND. 32, 33 3.3AUXOD Slot D 3.3V Auxiliary Power-Supply Output 34, 66 PGND Power Ground. Connect externally to GND. 35 PWRGDD 12 Open-Drain Power-Good Output. PWRGDC goes low 160ms after all outputs of slot C reach their final value and the power MOSFETs are fully enhanced. Open-Drain Power-Good Output. PWRGDD goes low 160ms after all outputs of slot D reach their final value and the power MOSFETs are fully enhanced. Open-Drain Fault Output Signal. FAULTD latches active-low whenever slot D outputs are shut down due to a fault. A fault is either of: * An overcurrent condition lasting longer than the overcurrent timeout. * A device over temperature condition. If the fault is detected in the main outputs, FAULTD must be reset by toggling the OND input. If the fault is in the auxiliary output, FAULTD must be reset by toggling both OND and AUXOND. For the autorestart version, FAULTD is reset when the part initiates the next power-on cycle. 36 FAULTD 37 TIM 38 PORADJ 39 GND Ground 40 12VIN 12V Supply Input. V12VIN drives the gates of the MOSFETs connected to 3.3G_. 12VIN powers an internal charge pump that drives the gates of the MOSFETs connected to 12G_. Bypass 12VIN with a 1F capacitor to GND. See the Typical Application Circuit and Input Transients section. 41 12GD Slot D 12V Gate-Drive Output. Connect 12GD to the gate of slot D's 12V MOSFET. At power-up, V12GD is raised to the internal charge-pump voltage level by a constant current. 42 12SD- Slot D 12V Negative Current-Sense Input. Connect 12SD- to the negative side of the current-sense resistor using the Kelvin-sensing technique to ensure accurate current sensing. Overcurrent Timeout Programming Input. Connect a resistor between 500 and 500k from TIM to GND to program tFAULT. Leave TIM unconnected for a default timeout of 11ms. Power-On-Reset Programming Input. Connect a resistor between 500 and 500k from PORADJ to GND to program the POR timing. Leave unconnected for a default value of 160ms. Connect PORADJ to GND to completely skip the POR time delay for PWRGD_ assertion. ______________________________________________________________________________________ Quad PCI Express, Hot-Plug Controllers PIN NAME FUNCTION 43 12SD+ Slot D 12V Positive Current-Sense Input. Connect the positive terminal of the current-sense resistor to 12SD+ using the Kelvin-sensing technique to ensure accurate current sensing. 44 3.3GD Slot D 3.3V Gate-Drive Output. Connect 3.3GD to the gate of slot D's 3.3V MOSFET. At power-up, V3.3GD is charged to 5.5V above the 3.3V supply by a constant current derived from V12VIN. V3.3GD's rise time is determined by the external gate capacitance. 45 3.3SD- Slot D 3.3V Negative Current-Sense Input. Connect to the negative side of the sense resistor using the Kelvin-sensing technique to ensure accurate current sensing. 46 3.3SD+ Slot D 3.3V Positive Current-Sense Input. Connect the positive side of the current-sense resistor to 3.3SD+ using the Kelvin-sensing technique to ensure accurate current sensing. 47 PRES-DETB Slot B Present-Detect Input. PRES-DETB accepts inputs from PRSNT#_# on a PCIe connector. PRES-DETB has an internal 50k pullup to 3.3VAUXIN. When PRES-DETB is low, the outputs follow the command from ONB and AUXONB after a 4ms debounced time. When PRES-DETB goes from low to high, all outputs of the respective slot shut down with no delay. 48 FONB Slot B Forced-On Input. FONB has a 50k internal pullup to 3.3VAUXIN. A logic-low on FONB turns on all slot B outputs as long as the power inputs are within their operating range, regardless of the status of the other input signals. Leave FONB unconnected for normal operation. 49 PRES-DETA Slot A Present-Detect Input. PRES-DETA accepts inputs from PRSNT#_# on a PCIe connector. PRES-DETA has an internal 50k pullup to 3.3VAUXIN. When PRES-DETA is low, the outputs follow the command from ONA and AUXONA after a 4ms debounced time. When PRES-DETA goes from low to high, all outputs of the respective slot shut down with no delay. 50 FONA Slot A Forced-On Input. FONA has a 50k internal pullup to 3.3VAUXIN. A logic-low on FONA turns on all slot A outputs as long as the power inputs are within their operating range, regardless of the status of the other input signals. Leave FONA unconnected for normal operation. 51 OUTPUT4 52 INPUT4 53 OUTPUT3 54 INPUT3 55 ONA 56 AUXONA 57 12SA+ Slot A 12V Positive Current-Sense Input. Connect the positive terminal of the current-sense resistor to 12SA+ using the Kelvin-sensing technique to ensure accurate current sensing. 58 12SA- Slot A 12V Negative Current-Sense Input. Connect 12SA- to the negative side of the current-sense resistor using the Kelvin-sensing technique to ensure accurate current sensing. 59 12GA Slot A 12V Gate-Drive Output. Connect 12GA to the gate of slot A's 12V MOSFET. At power-up, V12GA is raised to the internal charge-pump voltage level by a constant current. 60 3.3SA+ Slot A 3.3V Positive Current-Sense Input. Connect the positive side of the current-sense resistor to 3.3SA+ using the Kelvin-sensing technique to ensure accurate current sensing. 62 3.3SA- Slot A 3.3V Negative Current-Sense Input. Connect to the negative side of the sense resistor using the Kelvin-sensing technique to ensure accurate current sensing. Digital Output 4. 4ms debounced digital output of INPUT4. Digital Logic Gate Input 4 Digital Output 3. 4ms debounced digital output of INPUT3. Digital Logic Gate Input 3 Slot A 12V and 3.3V Outputs Enable. A logic-high at ONA turns on the 12V and 3.3V outputs of slot A (see Table 2). Slot A 3.3V Auxiliary Output Enable. A logic-high at AUXONA turns on the slot A auxiliary output. ______________________________________________________________________________________ 13 MAX5959/MAX5960 Pin Description (continued) Quad PCI Express, Hot-Plug Controllers MAX5959/MAX5960 Pin Description (continued) PIN NAME 63 3.3GA FUNCTION Slot A 3.3V Gate-Drive Output. Connect 3.3GA to the gate of slot A's 3.3V MOSFET. At power-up, V3.3GA is charged to 5.5V above the 3.3V supply by a constant current derived from V12VIN. V3.3GA`s rise time is determined by the external gate capacitance. Open-Drain Fault Output Signal. FAULTA latches active low whenever slot A outputs are shut down due to a fault. A fault is either of: * An overcurrent condition lasting longer than the overcurrent timeout. * A device over temperature condition. If the fault is detected in the main outputs, FAULTA must be reset by toggling the ONA input. If the fault is in the auxiliary output, FAULTA must be reset by toggling both ONA and AUXONA. For the autorestart version, FAULTA is reset when the part initiates the next power-on cycle. 64 FAULTA 65 PWRGDA Open-Drain Power-Good Output. PWRGDA goes low 160ms after all outputs of slot A reach their final value and the power MOSFETs are fully enhanced. 67, 68 3.3AUXOA Slot A 3.3V Auxiliary Power-Supply Output 72, 73 3.3AUXOB Slot B 3.3V Auxiliary Power-Supply Output 74 PWRGDB Open-Drain Power-Good Output. PWRGDB goes low 160ms after all outputs of slot B reach their final value and the power MOSFETs are fully enhanced. Open-Drain Fault Output Signal. FAULTB latches active-low whenever slot B outputs are shut down due to a fault. A fault is either of: * An overcurrent condition lasting longer than the overcurrent timeout. * A device over temperature condition. If the fault is detected in the main outputs, FAULTB must be reset by toggling the ONB input. If the fault is in the auxiliary output, FAULTB must be reset by toggling both ONB and AUXONB. For the autorestart version, FAULTB is reset when the part initiates the next power-on cycle. 75 FAULTB 76 3.3GB Slot B 3.3V Gate-Drive Output. Connect 3.3GB to the gate of slot B's 3.3V MOSFET. At power-up, V3.3GB is charged to 5.5V above the 3.3V supply by a constant current derived from V12VIN. V3.3GB`s rise time is determined by the external gate capacitance. 77 3.3SB- Slot B 3.3V Negative Current-Sense Input. Connect to the negative side of the sense resistor using the Kelvin-sensing technique to ensure accurate current sensing. 78 3.3SB+ Slot B 3.3V Positive Current-Sense Input. Connect the positive side of the current-sense resistor to 3.3SB+ using the Kelvin-sensing technique to ensure accurate current sensing. 79 12GB Slot B 12V Gate-Drive Output. Connect 12GB to the gate of slot B's 12V MOSFET. At power-up, V12GB is raised to the internal charge-pump voltage level by a constant current. Detailed Description The MAX5959/MAX5960 quad hot-plug controllers are designed for PCIe applications. The devices provide hot-plug control for 12V, 3.3V, and 3.3V auxiliary supplies for three PCIe slots. The MAX5959/MAX5960s' logic inputs/outputs allow interfacing directly with the system hot-plug-management controller or through an SMBus with an external I/O expander. An integrated debounced attention switch and present-detect signals are included to simplify system design (Figure 1). 14 The MAX5959/MAX5960 drive eight external n-channel MOSFETs to control the 12V and 3.3V main outputs. The 3.3V auxiliary outputs are controlled through internal 0.2 n-channel MOSFETs. Internal charge pumps provide a gate drive for the 12V outputs while the gate drive of the 3.3V output is driven by the 12V input supply. The 3.3V auxiliary outputs are completely independent from the main outputs with their own charge pumps. ______________________________________________________________________________________ Quad PCI Express, Hot-Plug Controllers RPORADJ IN PORADJ TIM OUT 12VIN PWRGD_ FAULT_ 12S_+ 108mV + - + - RSENSE 54mV 12S_- CHARGE PUMP 5A 12G_ 10A A01 tFAULT DEBOUNCE FAST OSCILLATOR tPOR OSCILLATOR 150A 120mA A001 MAX5959 3.3S_+ 40mV + - + - RSENSE 20mV 3.3S_5A 3.3G_ 10A BIAS, REFERENCES, AND UVLO CONTROL LOGIC MAIN-CHANNEL CONTROL LOGIC MAIN-CHANNEL 150A 150mA CONTROL LOGIC AUX-CHANNEL VREF CONTROL LOGIC AUX-CHANNEL + - CHARGE PUMP UVLO 100A 3.3AUXO INPUT COMPARATOR AND CHIP CONTROL LOGIC ON_ AUXON_ FON_ PRES-DET_ Figure 1. Single-Channel Internal Block Diagram ______________________________________________________________________________________ 15 MAX5959/MAX5960 RTIM MAX5959/MAX5960 Quad PCI Express, Hot-Plug Controllers At power-up, the MAX5959/MAX5960 keep all the external MOSFETs off until all supplies rise above their respective UVLO thresholds. These devices keep the internal MOSFETs off only until the 3.3VAUXIN supply rises above its UVLO threshold. Upon a turn-on command, the MAX5959/MAX5960 enhance the external and internal MOSFETs slowly with a constant gate current to limit the power-supply inrush current. The MAX5959/MAX5960 actively limit the current of all outputs at all times and shut down the corresponding channel if an overcurrent condition persists for longer than a resistor-programmable overcurrent timeout (see the Fault Management section). Thermal protection circuitry also shuts down all outputs if the die temperature exceeds +150C. After an overcurrent or overtemperature fault condition, the MAX5959/MAX5960 latch off or automatically restart depending on the version, after a restart time delay. The power requirement for PCIe connectors is defined by the PCIe card specification and summarized in Table 1. Startup The main supply outputs can become active only after all the following events have occurred: * V3.3AUXIN is above its UVLO threshold. * V 12VIN and V 3.3SA+ are both above their UVLO threshold. * ON_ is driven high. * PRES-DET_ is low for more than 4ms. The auxiliary supply output is made available only after the following events have occurred: * V3.3AUXIN is above its UVLO threshold. * AUXON_ is driven high. * PRES-DET_ is low for more than 4ms. The FON_ input overrides all other control signals and turns on the respective slot when driven low, as long as the UVLO thresholds have been reached. Table 2 summarizes the logic conditions required for startup. The auxiliary supply input powers the internal control logic and analog references of the MAX5959/MAX5960, so the main supplies cannot be enabled, if V3.3VAUXIN is not present. When an output is enabled, a programmable startup timer (tSU) begins to count the startup time duration. The value of tSU is set to 2x the fault timeout period (tFAULT). RTIM externally connected from TIM to GND sets the duration of tFAULT. Table 1. Power Requirement for PCIe Connectors POWER FAIL X1 CONNECTOR X4/8 CONNECTOR X16 CONNECTOR Voltage Tolerance 9% (max) 9% (max) 9% (max) Supply Current 3.0A (max) 3.0A (max) 3.0A (max) 1000F (max) 1000F (max) 1000F (max) Voltage Tolerance 8% (max) 8% (max) 8% (max) Supply Current 0.5A (max) 2.1A (max) 5.5A (max) 300F (max) 1000F (max) 2000F (max) 9% (max) 9% (max) 9% (max) Supply Current, Wake Enabled 375mA (max) 375mA (max) 375mA (max) Supply Current, Nonwake Enabled 20mA (max) 20mA (max) 20mA (max) Capacitive Load 150F (max) 150F (max) 150F (max) 3.3V Capacitive Load 12V Capacitive Load 3.3V AUXILIARY Voltage Tolerance 16 ______________________________________________________________________________________ Quad PCI Express, Hot-Plug Controllers ON_ AUXON_ X X X X PRES-DET 12V_ AND 3.3V_ OUTPUTS 3.3VAUXO_AUXILIARY OUTPUTS Low X On On High High Off Off Off FON_ Low Low High Low* Off High Low High Low* On Off Low High High Low* Off On High High High Low* On On *PRES-DET_ high-to-low transition has a 4ms delay (tDEG). ON_ ON_, AUXON_ VON_,TH VPGTH12 VPGTH3.3 12G_, 3.3G_ VON_,TH 12VO_, 3.3VO_ V12ILIM,TH RSENSE 12G_ 12V OUTPUT CURRENT 3.3VAUXO_ 3.3VAUXO_ VPGTH3.3AUX PWRGD_ tPOR_HL PWRGD_ 3.3AUXIN RISING EDGE FAULT_ PWRGD_ IS PULLED UP TO 3.3. FAULT_ IS PULLED UP TO 3.3AUXIN. Figure 2. Power-Up Timing, No Fault 3.3VAUXIN RISING EDGE 2 x tFAULT FAULT_ PWRGD_ IS PULLED UP TO 3.3VAUXO_. FAULT_ IS PULLED UP TO 3.3VAUXIN. A FAULT ON THE 3.3V OUTPUT OR 3.3VAUXO_ OUTPUT PRODUCES SIMILAR RESULTS. Figure 3. 12V Power-Up Timing (Turn-On into Output Overcurrent/Short Circuit) ______________________________________________________________________________________ 17 MAX5959/MAX5960 Table 2. Control Logic Truth Table Quad PCI Express, Hot-Plug Controllers MAX5959/MAX5960 fault on any of the channel's main output does not affect the auxiliary channel (V3.3AUXIN). Power-Good (PWRGD_) 12G_ V12ILIM,TH RSENSE 12V OUTPUT CURRENT PWRGD_ Thermal Shutdown tFAULT FAULT_ PWRGD_ IS PULLED UP TO 3.3VAUXO_. FAULT_ IS PULLED UP TO 3.3VAUXIN. A FAULT ON THE 3.3V OUTPUT OR 3.3VAUXO_ OUTPUT PRODUCES SIMILAR RESULTS. Figure 4. 12 Output Overcurrent/Short Circuit During Normal Operation 12V and 3.3V Outputs Normal Operation The MAX5959/MAX5960 monitor and actively limit the current of the 12V and 3.3V outputs after the startup period. Each output has its own overcurrent threshold. If any of the monitored output currents rise above the overcurrent threshold for a period t FAULT , FAULT_ asserts and the controller disengages both the 12V and 3.3V outputs for the particular slot (see the Fault Management section). 3.3V Auxiliary Output Normal Operation The auxiliary output current is internally monitored and actively limited to the maximum current-limit value. An overcurrent fault condition occurs when the output current exceeds the overcurrent threshold for longer than tFAULT. A fault on an auxiliary channel causes all supplies of the affected channel to be disabled after a programmable time period tFAULT. A fault condition on a main channel (V12VIN or V3.3VIN) causes all the channel's main outputs to shut down after the tFAULT period and then either latch off or automatically restart after the tRESTART (tRESTART = 64 x tFAUALT) period, depending on the device version. A 18 Power-good (PWRGD_) is an open-drain output that pulls low a time (tPOR_HL) after all the outputs of the respective slot are fully on. All outputs are considered fully on when 3.3G_ has risen to VPGTH3.3, 12G_ has risen to V PGTH12 , and V 3.3AUXO_ is less than VPGTH3.3AUX. tPOR_HL is adjustable from 2.4ms to 1.5s by connecting a resistor from PORADJ to GND. See the Setting the Power-On Reset and Timeout Period (tPOR_HL) sections. Connect PORADJ to GND to completely skip the POR time delay for PWRGD_ assertion. When the die temperature goes above (TSD) +150C, an overtemperature fault occurs and the MAX5959/ MAX5960 shut down all outputs. The device waits for the junction temperature to decrease below TSD - hysteresis before entering fault management (see the Fault Management section): Fault Management A fault occurs when an overcurrent or 12G_ or 3.3G_ below their power-good threshold lasts longer than tFAULT or when the device experiences an overtemperature condition: * A fault on a main output (12V or 3.3V) shuts down both main outputs of the respective slot. The 3.3V auxiliary is not affected. * A fault on the 3.3V auxiliary output shuts down all three outputs of the respective slot. The MAX5959A/MAX5960A automatically restart from a fault shutdown after the t RESTART period while the MAX5959L/MAX5960L latch off. If an overcurrent fault occurred on a main output, bring ON_ low for at least tRESET (100s) and high again to reset the fault and restart the outputs. If the overcurrent fault occurred on an auxiliary output or an overtemperature fault occurred, bring both ON_ and AUXON_ low for a minimum of tRESET to reset the fault. Toggle ON_ or only AUXON_ to reset the fault condition. If ON_ and AUXON are toggled before tRESTART time counting has elapsed, the MAX5959L/MAX5960L store the information and restart when the delay is finished. The MAX5959A/MAX5960A (autoretry versions) restart all channels automatically after tRESTART. ______________________________________________________________________________________ Quad PCI Express, Hot-Plug Controllers INPUT1, INPUT2, and INPUT3 accept inputs from mechanical switches. The corresponding outputs are OUTPUT1, OUTPUT2, OUTPUT3, and OUTPUT4. OUTPUT_ is debounced for 4ms. When INPUT_ goes from high to low, OUTPUT_ goes low immediately and stays low for at least 4ms. After the debounce time, OUTPUT_ follows INPUT_. If INPUT_ goes from low to high, OUTPUT_ goes high immediately and stays high for at least 4ms. After the debounce time, OUTPUT_ follows INPUT_. Figure 5 shows the timing diagram describing the INPUT_/OUTPUT_ debounced feature. Present-Detect and Forced-On Inputs (PRES-DET_, FON_) PRES-DET_ input detects the PRSNT_# pin on a PCIe connector. When the card is plugged in, PRES-DET_ goes low and allows the turn-on of the outputs of the respective slot after a 4ms debounced time. When the card is removed, an internal 50k pullup resistor forces PRES-DET_ high and the respective slot is shut down with no delay. PRES-DET_ works in conjunction with ON_ and AUXON_ and only enables the device when ON_ and AUXON_ are high. A logic-low on FON_ forces the respective slot (main supplies and auxiliary) to turn on regardless of the status of the other logic inputs, provided the UVLO thresholds are exceeded on all the inputs. INPUT tDBC tDBC tDBC DEBOUNCED OUTPUT Figure 5. INPUT_ AND OUTPUT_ Debounced Feature Active Current Limits Active current limits are provided for all three outputs of the four slots (slot A, slot B, slot C, and slot D). Connect a current-sense resistor between 12S_+ and 12S_- to set the current limit for the 12V outputs. The current limit is set to 54mV / RSENSE12. Connect a currentsense resistor between 3.3S_+ and 3.3S_- to set the current limit for the 3.3V main outputs to 20mV / RSENSE3.3. For the auxiliary output (3.3VAUXO_) the current limit is fixed at 450mA in the MAX5959 and 700mA in the case of the MAX5960. When the voltage across R SENSE12 or R SENSE3.3 reaches the current-limit threshold voltage, the MAX5959/MAX5960 regulate the gate voltage to maintain the current-limit threshold voltage across the sense resistor. If the current limit lasts for tFAULT, then an overcurrent fault occurs. The MAX5959/MAX5960 shut down both the 12V and 3.3V outputs and assert the FAULT_ output of the respective slot. When the auxiliary output reaches the current limit 450mA (MAX5959) or 700mA (MAX5960) for longer than tFAULT, a fault occurs and the device shuts down all outputs and asserts FAULT of the respective slot. UVLO Threshold The UVLO thresholds prevent the internal auxiliary MOSFETs and the external main channel MOSFETs from turning on if V12VIN, V3.3VIN, and V3.3VAUXIN are not present. Internal comparators monitor the main supplies and the auxiliary supply and keep the gatedrive outputs (12GA, 12GB, 12GC, 12GD, 3.3GA, 3.3GB, 3.3GC, and 3.3GD) low until the supplies rise above their UVLO threshold. The 12V main supply is monitored at 12VIN and has a UVLO threshold of 10V. The 3.3V main supply is monitored at 3.3SA+ and has a UVLO threshold of 2.65V. The auxiliary supply is monitored at 3.3AUXIN and has a 2.65V UVLO threshold. For either main channels to operate, V3.3AUXIN must be above its UVLO threshold. ______________________________________________________________________________________ 19 MAX5959/MAX5960 Debounced Logic Gate (INPUT_ and OUTPUT_) MAX5959/MAX5960 Quad PCI Express, Hot-Plug Controllers SHUT DOWN 12V AND 3.3V OUTPUTS. ASSERT FAULT_ STAY WAITING FOR tRESTART N LATCH-OFF OPTION? N FAULT STILL PRESENT? Y Y RESET tFAULT COUNTER N N N ON_ TOGGLED HIGH LOW HIGH Y Y START COUNTING tFAULT tFAULT ELAPSED? Y N RESET FAULT_ 3.3VAUXIN IS OK, AUXON_ IS HIGH, PRES_DET IS LOW ARE ALL MAIN OUTPUTS OK? NO FAULT DETECTED Y FAULT ON 12V OR 3.3V OUTPUTS Y ENABLE CHARGE ON 3.3G_ AND 12G_. START COUNTING tSU Y MAIN INPUTS ARE OK, ON_ IS HIGH tSU ELAPSED? N N N ON_ AND AUXON_ TOGGLED HIGH LOW HIGH ALL PGOOD THRESHOLDS REACHED? START PGOOD THRESHOLD MONITORING N ASSERT PWRGD_ AFTER tPOR_HL DELAY Y Y RESET PWRGD_ RESET FAULT_ POWER ON AUXILIARY OUTPUT. FAULT_ AND PWRGD_ ARE HIGH IMPEDANCE ENABLE CHARGE ON INTERNAL AUXILIARY MOSFET DRIVING 3.3AUXO_. START COUNTING tSU tSU ELAPSED? Y AUX OUTPUT OK? NO FAULT DETECTED Y N N N Y LATCH-OFF OPTION? SHUT DOWN ALL OUTPUTS. ASSERT FAULT_. STAY WAITING FOR tRESTART Y N START COUNTING tFAULT tFAULT ELAPSED? Y N FAULT STILL PRESENT? N Y RESET tFAULT COUNTER Figure 6. Fault Management Flowchart 20 FAULT ON 3.3AUXO_? ______________________________________________________________________________________ Quad PCI Express, Hot-Plug Controllers The gate drive for the external MOSFETs is provided at 12GA, 12GB, 12GC, 12GD, 3.3GA, 3.3GB, 3.3GC, and 3.3GD. 12G_ is the gate drive for the 12V main supply and is boosted to 5.3V above V12VIN by its internal charge pump. During turn-on, 12G_ sources 5A into the external gate capacitance to control the turn-on time of the external MOSFET. During turn-off, 12G_ sinks 150A from the external gate capacitance to quickly turn off the external MOSFET. During short-circuit events, an internal 120mA current sink activates to rapidly bring the load current into the regulation limits. 3.3G_ is the gate drive for the 3.3V main supply's MOSFET and is driven to 5.5V above the 3.3V main supply. The power for 3.3G_ is supplied from 12VIN and has no internal charge pump. During turn-on, 3.3G_ sources 5A into the external gate capacitance to control the turn-on time of the external MOSFET. During turn-off, 3.3G_ sinks 150A to quickly turn off the external MOSFET. During short-circuit events, an internal 120mA current sink activates to rapidly turn off the appropriate external MOSFET. Auxiliary Supply (3.3VAUXIN) 3.3VAUXIN provides power to the auxiliary outputs as well as the internal logic and references. The drains of the internal auxiliary MOSFETs connect to 3.3AUXIN through internal sense resistors and the sources connect to the auxiliary outputs (3.3VAUXO_). Both MOSFETs have typical on-resistance of 0.2. Each channel's internal charge pump boosts the gate-drive voltage to fully turn on the internal n-channel MOSFETs. The auxiliary supplies have an internal current limit set to 450mA (MAX5959) or 700mA (MAX5960). Applications Information Setting the Power-On Reset tFAULT is the time an overcurrent or overtemperature fault must remain for the MAX5959/MAX5960 to disable the main or auxiliary channels of a particular slot. Program the fault timeout period (tFAULT) by connecting a resistor (RTIM) from TIM to GND. tFAULT can be calculated by the following equation: tFAULT = (166ns / ) x RTIM The tFAULT programmed time duration must be chosen according to the total capacitance load connected to the 12G_ and 3.3G_ pins. To properly power up the main supply outputs, the following constraints need to be taken: tSU (VGATE x CLOAD) / ICHG where tSU = 2 x tFAULT and where: * ICHG = 5A. * VGATE = 4.8V +V12VIN for 12G_ and VGATE = 6.8V +V3.3VIN for 3.3G_. * CLOAD is the total capacitance load at the gate. Maximum and minimum values for RTIM are 500 and 500k, respectively. Leave TIM floating for a default tFAULT of 10ms. Timeout Period (tPOR_HL) tPOR_HL is the time from when the gate voltages of all outputs of a slot reach their power-good threshold to when PWRGD_ pulls low. Program the POR timeout period (tPOR) by connecting a resistor (RPORADJ) from PORADJ to GND. tPOR_HL can be calculated by the following equation: tPOR_HL = (2.5s / ) x RPORADJ Maximum and minimum values for RPORADJ are 500 and 500k, respectively. Leave PORADJ floating for a default tPOR of 150ms. Connect PORADJ to GND in order to completely skip the power-on delay time prior to the PWRGD_ assertion. Component Selection Select the external n-channel MOSFET according to the applications current requirement. Limit the switch power dissipation by choosing a MOSFET with an RDS_ON low enough to have a minimum voltage drop at full load. High RDS_ON causes larger output ripple if there are pulsed loads. High RDS_ON can also trigger an external undervoltage fault at full load. Determine the MOSFET's power-rating requirement to accommodate a short-circuit condition on the board during startup. Table 3 lists the MOSFETs and sense resistor manufacturers. ______________________________________________________________________________________ 21 MAX5959/MAX5960 External MOSFET Gate Drivers (12G_ and 3.3G_) MAX5959/MAX5960 Quad PCI Express, Hot-Plug Controllers Table 3. Component Manufacturers COMPONENT Sense Resistor MOSFETs PHONE WEBSITE Vishay-Date MANUFACTURER 402-564-3131 www.vishay.com IRC 704-264-8861 www.irctt.com Fairchild 888-522-5372 www.fairchildsemi.com International Rectifier 310-322-3331 www.irf.com Motorola 602-244-3576 www.mot-sps.com/ppd -- www.vishay.com Vishay-Siliconix Additional External Gate Capacitance Input Transients External capacitance can be added from the gate of the external MOSFETs to GND to slow down the dV/dt of the 12V and 3.3V outputs. The maximum gate capacitance load at 12G_ and 3.3G_ must be consistent with the conditions described in the Setting the Power-On Reset section. The 12V input (12VIN), the 3.3V input (3.3SA+), and the 3.3V auxiliary (3.3AUXIN) must be above their UVLO thresholds before startup can occur. Input transients can cause the input voltage to sag below the UVLO threshold. The MAX5959/MAX5960 reject transients on the input supplies that are shorter than 4s (typ). Because some load fault conditions can cause voltage transients to propagate to the supply inputs with duration of greater than 4s, it is recommended that a small Schottky diode be placed in series with the 12VIN pin connection, upstream of the 1F bypass capacitor. This provides a hold-up supply that will prevent the 12VIN input from dropping below V12UVLO during severe transients. See the Typical Application Circuit. Maximum Load Capacitance Large capacitive loads at the 12V output, the 3.3V output, and the 3.3V auxiliary output can cause a problem when inserting discharged PCI cards into live backplanes. A fault occurs if the time needed to charge the capacitance of the board is greater than the typical startup time (2 x tFAULT). The MAX5959/MAX5960 withstand large capacitive loads due to their adjustable startup times and adjustable current-limit thresholds. Calculate the maximum load capacitance as follows: CLOAD < (tSU x ILIM) / VOUT VOUT is either the 3.3V output, the 12V output, or the 3.3V auxiliary output for slot A, slot B, slot C, or slot D. 22 ______________________________________________________________________________________ Quad PCI Express, Hot-Plug Controllers ONE OF FOUR SLOTS SHOWN PCI EXPRESS SLOT_ V12VMAIN V3.3VAUX PRSNT1# R1 8m +12V 0.1F 2.2F IN5819 RTIM = OPEN RPORADJ = OPEN 12G_ GND 12S_+ 12S_- 3.3VAUXIN TIM PWRGD_ PWRGD MAX5959 MAX5960 10k 3.3VAUX PORADJ 12VIN 3.3VAUXO_ GND 3.3G_ 3.3S_- 3.3S_+ PRES-DET_ FAULT_ FON_ AUXON_ ON_ INPUT_ OUTPUT_ V3.3VMAIN 0.1F R2 5m +3.3V ATTENTION SWITCH V3.3VAUXIN 10k PRSNT2# MRL MAX7313ATG LEDs 16-BIT I/O EXPANDER 2 SMBus 2 AO-A2 INT ______________________________________________________________________________________ 23 MAX5959/MAX5960 Typical Application Circuit Quad PCI Express, Hot-Plug Controllers 61 N.C. 62 3.3SA- 63 3.3GA 64 FAULTA 65 PWRGDA 66 PGND 67 3.3AUXOA 68 3.3AUXOA 69 3.3AUXIN 70 3.3AUXIN 71 3.3AUXIN 72 3.3AUXOB 73 3.3AUXOB 75 FAULTB 76 3.3GB 77 3.3SB- 78 3.3SB+ 60 3.3SA+ 2 59 12GA AUXONB 3 58 12SA- ONB 4 57 12SA+ INPUT1 5 56 AUXONA OUTPUT1 6 55 ONA INPUT2 7 54 INPUT3 OUTPUT2 8 53 OUTPUT3 N.C. 9 52 INPUT4 FOND 10 51 OUTPUT4 PRES-DETD 11 50 FONA OND 12 49 PRES-DETA AUXOND 13 48 FONB GND 14 47 PRES-DETB FONC 15 46 3.3SD+ PRES-DETC 16 45 3.3SD- ONC 17 44 3.3GD AUXONC 18 43 12SD+ 12SC+ 19 42 12SD- 12SC- 20 41 12GD 37 38 TIM PORADJ 40 36 FAULTD 12VIN 35 PWRGDD 39 34 PGND GND 33 29 3.3AUXIN 3.3AUXOD 28 3.3AUXOC 32 27 3.3AUXOC 3.3AUXOD 26 PWRGDC 31 25 FAULTC 3.3AUXIN 24 3.3GC 30 23 3.3SC- 3.3AUXIN 22 MAX5959 MAX5960 3.3SC+ 12SB+ + 21 1 12GC 12SB- 79 12GB 80 N.C. TOP VIEW 74 PWRGDB MAX5959/MAX5960 Pin Configuration TQFP Chip Information PROCESS: BiCMOS 24 ______________________________________________________________________________________ Quad PCI Express, Hot-Plug Controllers TQFP12x12mm.EPS PACKAGE OUTLINE, 80L TQFP, 12x12x1.0mm 21-0072 C 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 25 (c) 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. MAX5959/MAX5960 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 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