IRF130 - Intersil Corporation

File Number

1566.4

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

IRF130

14A, 100V, 0.160 Ohm, N-Channel

Power MOSFET

This N-Channel enhancement mode silicon gate power ﬁeld

effect transistor is an advanced power MOSFET designed,

tested, and guaranteed to withstand a speciﬁed level of

energy in the breakdown avalanche mode of operation. All of

these power MOSFETs are designed for applications such

as switching regulators, switching convertors, motor drivers,

relay drivers, and drivers for high power bipolar switching

transistors requiring high speed and low gate drive power.

These types can be operated directly from integrated

circuits.

Formerly developmental type TA17411.

Features

• 14A, 100V

•r

DS(ON) = 0.160Ω

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Packaging

JEDEC TO-204AA

Ordering Information

PART NUMBER PACKAGE BRAND

IRF130 TO-204AA IRF130

NO TE: When ordering, use the entire part number . G

DRAIN

(FLANGE)

SOURCE (PIN 2)

GATE (PIN 1)

Data Sheet March 1999

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Speciﬁed

IRF130 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 100 V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 100 V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID

TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID14

9.9 A

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM 56 A

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

GS ±20 V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD79 W

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.53 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 50 mJ

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 175 oC

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300

260

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. TJ= 25oC to 150oC.

Electrical Speciﬁcations TC = 25oC, Unless Otherwise Speciﬁed

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 10) 100 - - V

Gate Threshold Voltage VGS(TH) VDS = VGS, ID = 250µA 2.0 - 4.0 V

Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA

VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 150oC - - 250 µA

On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V 14 - - A

Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA

Drain to Source On Resistance (Note 2) rDS(ON) ID = 8.3A, VGS = 10V (Figures 8, 9) - 0.12 0.16 Ω

Forward Transconductance (Note 2) gts VDS ≥ 50V, ID = 8.3A (Figure 12) 4.6 6.9 - S

Turn-On Delay Time td(ON) VDD = 50V, ID≈14A, RG = 12Ω, RL = 3.5Ω

(Figures 17, 18) MOSFET Switching Times are

Essentially Independent of Operating Temperature

- - 30 ns

Rise Time tr- - 75 ns

Turn-Off Delay Time td(OFF) - - 40 ns

Fall Time tf- - 45 ns

Total Gate Charge

(Gate to Source + Gate to Drain) Qg(TOT) VGS = 10V, ID = 14A, VDS = 0.8 x Rated BVDSS,

Ig(REF) = 1.5mA (Figures 14, 19, 20) Gate Charge is

Essentially Independent of Operating Temperature

-1826nC

Gate to Source Charge Qgs - 5.5 - nC

Gate to Drain “Miller” Charge Qgd -11-nC

Input Capacitance CISS VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - 600 - pF

Output Capacitance COSS - 300 - pF

Reverse Transfer Capacitance CRSS - 100 - pF

Internal Drain Inductance LDMeasured between the

Contact Screw on the

Flange that is Closer to

Source and Gate Pins and

the Center of Die

Modified MOSFET

Symbol Showing the

Internal Device

Inductances

- 5.0 - nH

Internal Source Inductance LSMeasured from the Source

Lead, 6mm (0.25in) from

the Flange and the Source

Bonding Pad

- 12.5 - nH

Thermal Resistance, Junction to Case RθJC - - 1.9 oC/W

Thermal Resistance, Junction to Ambient RθJA Free Air Operation - - 30 oC/W

IRF130

Source to Drain Diode Speciﬁcations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current ISD Modified MOSFET

Symbol Showing the

Integral Reverse P-N

Junction Diode

- - 14 A

Pulse Source to Drain Current (Note 3) ISDM - - 56 A

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 14A, VGS = 0V (Figure 13) - - 2.5 V

Reverse Recovery Time trr TJ = 25oC, ISD = 14A, dISD/dt = 100A/µs 55 120 250 ns

Reverse Recovery Charge QRR TJ = 25oC, ISD = 5.5A, dISD/dt = 100A/µs 0.26 0.58 1.3 µC

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤2%.

3. Repetitive rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 50V, starting TJ = 25oC, L = 380µH, RG = 25Ω, peak IAS = 14A. See Figures 15, 16.

Typical Performance Curves

Unless Otherwise Speciﬁed

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

TC, CASE TEMPERATURE (oC)

25 50 75 100 125 150 1750

POWER DISSIPATION MULTIPLIER

0.2

0.4

0.6

0.8

1.0

1.2 15

ID, DRAIN CURRENT (A)

25 50 75 100 125 150 175

TC, CASE TEMPERATURE (oC)

t1, RECTANGULAR PULSE DURATION (s)

ZθJC, THERMAL IMPEDANCE (oC)

10-3 10-2 0.1 1

10-5 10-4

1.0

10-2

0.1

NOTES:

DUTY FACTOR: D = t1/t2

PEAK TJ = PDM x ZθJC + TC

PDM

t1t2

SINGLE PULSE

0.1

0.02

0.2

0.5

0.01

0.05

IRF130

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

LIMITED BY rDS(ON)

AREA MAY BE

OPERATION IN THIS

TJ = MAX RATED

TC = 25oC

103

102

0.1

ID, DRAIN CURRENT (A)

110102103

VDS, DRAIN TO SOURCE VOLTAGE (V)

10µs

100µs

1ms

10ms

VDS, DRAIN TO SOURCE VOLTAGE (V)

ID, DRAIN CURRENT (A)

0010203040

VGS = 7V

10V

80µs PULSE TEST

ID, DRAIN CURRENT (A)

0.0 1.0 2.0 3.0 4.0 5.0

VDS, DRAIN TO SOURCE VOLTAGE (V)

80µs PULSE TEST

VGS = 7V

VGS = 6V

VGS = 5V

VGS = 4V

VGS = 8V

VGS = 10V

102

0.1

ID, DRAIN CURRENT (A)

0246810

VGS, GATE TO SOURCE VOLTAGE (V)

VDS ≥50V

80µs PULSE TEST

TJ = 175oC

TJ = 25oC

1.5

1.2

0.9

0.6

0.3

0.0

DRAIN TO SOURCE ON RESISTANCE

01224364860

ID, DRAIN CURRENT (A)

80µs PULSE TEST

VGS = 10V

VGS = 20V

3.0

2.4

1.8

1.2

0.6

0.0

NORMALIZED DRAIN TO SOURCE

ON RESISTANCE

-60 0 60 120 180

TJ, JUNCTION TEMPERATURE (oC)

ID = 14A

VGS = 10V

IRF130

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

1.25

1.15

1.05

0.95

0.85

0.75

NORMALIZED DRAIN TO SOURCE

BREAKDOWN VOLTAGE

-60 0 60 120 180

TJ, JUNCTION TEMPERATURE (oC)

ID = 250µA1500

1200

900

600

300

VDS, DRAIN TO SOURCE VOLTAGE (V)

110

102

25 25

C, CAPACITANCE (pF)

CISS

COSS

CRSS

VGS = 0V, f = 1MHz

CISS = CGS + CGD

CRSS = CGD

COSS ≈ CDS + CGD

VDS 50V

80µs PULSE TEST

05101520250

gfs, TRANSCONDUCTANCE (S)

ID, DRAIN CURRENT (A)

TJ = 175oC

TJ = 25oC

0.4 1.2 1.6 2.00.8

103

ISD, DRAIN CURRENT (A)

VSD, SOURCE TO DRAIN VOLTAGE (V)

0.1

102

TJ = 175oC

TJ = 25oC

00 6 12 18 24 30

VGS, GATE TO SOURCE VOLTAGE (V)

Qg(TOT), TOTAL GATE CHARGE (nC)

ID = 14A

FOR TEST CIRCUIT

SEE FIGURE 18 VDS = 20V

VDS = 50V VDS = 80V

IRF130

Test Circuits and Waveforms

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

VGS

0.01Ω

IAS

VDS

VDD

DUT

VARY tP TO OBTAIN

REQUIRED PEAK IAS

VDD

VDS

BVDSS

IAS

tAV

VGS

DUT

-VDD

tON

td(ON)

90%

10%

VDS 90%

10%

td(OFF)

tOFF

90%

50%

10% PULSE WIDTH

VGS

0.3µF

12V

BATTERY 50kΩ

VDS

DUT

Ig(REF)

(ISOLATED

VDS

0.2µF

CURRENT

REGULATOR

ID CURRENT

SAMPLING

IG CURRENT

SAMPLING

SUPPLY)

RESISTOR RESISTOR

SAME TYPE

AS DUT Qg(TOT)

Qgd

Qgs

VDS

VGS

VDD

IG(REF)

IRF130

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certiﬁcation.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see w eb site http://www.intersil.com

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IRF130