PRODUCT PREVIEW MOSTEI. 2K x 8 STATIC RAM MK4802(P/J/N) Series FEATURES O High performance D Static operation Part No. A Ti Cc ootin O Organization: 2K x 8 bit RAM JEDEC pinout ccess Time 6 MK4802-70 70 nsec 70/80 nsec 0 Pin compatible with Mosteks BYTEWYDE memory family MK4802-90 90 nsec 90/100 nsec O Double density version of the MK4118 1K x8 static RAM O 24/28 pin ROM/PROM compatible pin configuration Q CE and OE functions facilitate bus control DESCRIPTION The MK4802 uses Mosteks Scaled POLY 5 process and advanced circuit design techniques to package 16,384 bits of static RAM on a single chip. Static operation is achieved with high performance and low power dissipation by utilizing Address Activated circuit design techniques. BLOCK DIAGRAM DATA INPUTS OUTPUTS oao pa? Yee GNO a A71q+ ~~ f24Vveg 2 po . | 9 musrea Ag 2c [23 Ag haan * conan As 30 22 Ag as Agad [21 WE A350 120 OE = ete atte 426d 19 Aag ms 4470 is sion Aosd 117 Daz DQ 30 1116 Dag : mitts PO1107 H15 DO5 " DQa117J 1114004 2 sem Vssi20 1113DQ3 The MK4802 excels in high speed memory applications where the organization requires relatively shallow depth with a wide word format. The MK4802 presents the user a high density cost effective alternative to bipolar and previous generation N-MOS fast memory. The slower MK4802-3* provides even greater economies with perfor- mance suitable for microprocessor memory requirements. PIN CONNECTIONS TRUTH TABLE *See MK4802-3 Supplement Data Sheet cE OE WE Mode pa - PIN NAMES VIH x x Deselect High Z VIL x Vit Write Din Ao-Aio Address Inputs Vcc Power (+5V) y CE Chip Enable WE Write Enable mo} Mey MH Read Pout Vgs Ground OE Output Enable Vit | VIR Vin Read High Z DQo-DQ7 Data In/Data Out * = Don't Care Vi--19