PD - 60086B International TOR Rectitier IR2110E4 HIGH AND LOW SIDE DRIVER Features Product Summary m@ Floating channel designed for bootstrap operation VOFFSET 400V max. Fully operational to +400V LC Tolerant to negative transient voltage lo+/ 2A/2A dV/dt immune VouT 10-20V m@ Gate drive supply range from 10 to 20V @ Undervoltage lockout for both channels ton/off (typ.) 120 &94ns H Separate logic supply range from 5 to 20V Logic and power ground +5V offset Delay Matching 10 ns CMOS Schmitt-triggered inputs with pull-down Description Cycle by cycle edge-triggered shutdown logic cy g 99 g The 1R2110E4 is a high voltage, high speed power MOSFET Matched propagation delay for both channels and IGBT driver with independent high and low side refer- H Outputs in phase with inputs enced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construc- tion. Logic inputs are compatible with standard CMOS or LSTTL outputs. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-con- duction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 400 volts. Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissi- pation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 28 through 35. Symbol Parameter Min. Max. Units VB High Side Floating Supply Absolute Voltage -0.5 Vs +20 Vs High Side Floating Supply Offset Voltage _ 400 VHO High Side Output Voltage Vs -0.5 Ve + 0.5 V Voc Low Side Fixed Supply Voltage -0.5 20 VLo Low Side Output Voltage -0.5 Voc +0.5 Vpp Logic Supply Voltage -0.5 Vss + 20 Vss Logic Supply Offset Voltage Voc - 20 Voc + 0.5 VIN Logic Input Voltage (HIN, LIN & SD) Vss - 0.5 Vpp + 0.5 dVs/dt Allowable Offset Supply Voltage Transient (Fig. 16) _ 50 Vins Pp Package Power Dissipation @ Ta < = 25C (Fig. 19) _ 1.6 WwW RthJA Thermal Resistance, Junction to Ambient _ 125 CAN Tj Junction Temperature -55 125 Ts Storage Temperature -55 150 ae) TL Package Mounting Surface Temperature 300 (for 5 seconds) Weight 0.45 (typical) g www.irf.com 1 4/19/99IR21 Recommended Operating Conditions 10E4 International TOR Rectifier The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The Vs and Vsg offset ratings are tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figures 36 and 37. Symbol Parameter Min. Max. Units VB High Side Floating Supply Absolute Voltage Vs+10 Vs + 20 Vs High Side Floating Supply Offset Voltage -4 400 VHO High Side Output Voltage Vs VB Voc Low Side Fixed Supply Voltage 10 20 Vv VLO Low Side Output Voltage 0 Voc VDD Logic Supply Voltage Vss+5 Vss +20 Vss Logic Supply Offset Voltage -5 5 VIN Logic Input Voltage (HIN, LIN & SD) Vss VDD Dynamic Electrical Characteristics VBIAS (VGC, VBS, VDD) = 15V, CL = 1000 pF, TA = 25C and VSs = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3. Tj = 25C Tj = -55 to 125C Symbol| Parameter Min | Typ.| Max.| Min. | Max | Units Test Conditions ton Turn-On Propagation Delay | 120} 150} | 260 Vs=0V loft Turn-Off Propagation Delay | 94) 125] | 220 Vs = 400V tsd Shutdown Propagation Delay | 110] 140} | 235 Ss Vs = 400V tr Turn-On Rise Time | 25] 35 | ] 50 n CL = 1000pf tf Turn-Off Fall Time | 17] 25] ] 40 CL = 1000pf Mt Delay Matching, HS & LS Turn-On/Off| | }] 10 | }] | Hton-Lton|/| Htott-Lto##| Typical Connection up to 400V TO LOAD 2 www.irf.comInternational TOR Rectifier Static Electrical Characteristics VBIAS (VGC, VBS, VDD) = 15V, TA = 25C and Vss = COM unless otherwise specified. The VIN, VTH and lIN parameters are referenced to Vss and are applicable to all three logic input leads: HIN, LIN and SD. The Vo and Io parameters are referenced to COM and are applicable to the respective output leads: HO or IR2110E4 LO. ; 5 Tj = -55 to Tj = 25C 125C Symbol Parameter Min | Typ. | Max.] Min. | Max | Units Test Conditions VIH Logic 1 Input Voltage 95; ]}] 10} Vpp = 15V VIL Logic O Input Voltage -|- 6 | 57 Vpp = 15V VoH High Level Output Voltage, VBias - Vo | | 0.7 | 1.2) | 1.5 Vv Vin = ViH, lo=0A VoL Low Level Output Voltage, VO |]01}] | 01 Vin =Vit, lo =0A ILK Offset Supply Leakage Current }| | 50} | 250 Vp =Vs = 400V laps Quiescent Ves Supply Current | 125 | 230} | 500 Vin = Vio or VIL lace Quiescent Vcc Supply Current | 180 | 340} | 600 WA Vin = Vio or VIL lapp Quiescent Vpp Supply Current _ 5 30 | | 60 Vin = VIH or VIL LIN Logic 1 Input Bias Current _ 15} 40} | 70 Vin = 15V lIN- Logic O Input Bias Current }] 1 | 10 Vin = OV Veasuv+| Vas Supply Undervoltage Positive 7.5) 87) 97) |] Going Threshold Vesuv- | VBs Supply Undervoltage Negative 7.0) 83)}94])/ ] Going Threshold Vv Vocuv+| Vcc Supply Undervoltage Positive 74) 86) 96} |] Going Threshold Vocuv. | Vcc Supply Undervoltage Negative 7.0} 82)94}/ ] Going Threshold lo+ Output High Short Circuit Pulsed 2 !/-|]-|f- VouT = OV, Vin = 15V Current A PW <= 10pS lo- Output Low Short Circuit Pulsed 2 !/-|]-|f- Vout = 15V, Vin = OV Current PW <= 10HS www.irf.comIR2110E4 HIN LIN SD HO LO To To. = Figure 1. Input/Output Timing Diagram Vog = 15V \p 15V Vg (0 to400V) 10 HIN SD HF LIN Figure 3. Switching Time Test Circuit SD 50% tsd HO 90% LO Figure 3. Shutdown Waveform Definitions | 0.1 HF 200 wH International TOR Rectifier HV =10 to 400V + HOKES 100 yF MONITOR 0 HO | tI 2 1OKF6 p> OUTPUT IRF820 >50 V/ns dt Figure 2. Floating Supply Voltage Transient Test Circuit 90% 90% 10% MT 90% LO MT HO Figure 6. Delay Matching Waveform Definitions www.irf.comInternational IGR Rectifier 250 200 - - a _ - 2 150 77 Leer E -_- on al 3 Mex n/m al 2 = 5 100 +e 5 50 0 -50 -25 0 25 50 75 100 125 250 200 a o Q 3 Turn-Off Delay Time (ns) 50 250 200 a o Q 3 Shutdown Delay Time (ns) 50 Temperature (C) Figure 7A. Turn-On Time vs. Temperature aan 7 =s ne | Moe le _" _ TYP canner -50 -25 0 25 50 75 100-125 Temperature (C) Figure 8A. Turn-Off Time vs. Temperature _4 _ 7 _ 7 == oon) 7 | erent) Mex _ -_ a] TYP et -50 -25 0 25 50 75 100-125 Temperature (C) Figure 9A. Shutdown Time vs. Temperature www.irf.com Turn-On Delay Time (ns) Turn-Off Delay Time (ns) Shutdown Delay time (ns) 250 200 a o Q 3 50 250 200 a o Q 3 50 250 200 a o Q 3 50 IR2110E4 Max yp 7 = ao ee =~ ree] 10 12 14 16 18 20 Voias Supply Voltage (V) Figure 7B. Turn-On Time vs. Voltage Max Typ TT reer = ae ~~ | 10 12 14 16 18 20 Voias Supply Voltage (V) Figure 8B. Turn-Off Time vs. Voltage Max be tee ~~ Typ [~~~ reo ~~ ee ee a ~ ree] 10 12 14 16 18 20 Voias Supply Voltage (V) Figure 9B. Shutdown Time vs. VoltageIR2110E4 International TeR Rectifier 100 100 80 80 a a = = 2 60 2 60 Ee Ee 2 & fe oc Max 6 40 + 6 4o->= == Mox, ee en ee = ~+__t = --|-- _| e Typ Te Typ | 20 20 0 0 -50 25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (C) Voias Supply Voltage (V) Figure 10A. Turn-On Rise Time vs. Temperature Figure 10B. Turn-On Rise Time vs. Voltage 50 50 40 40 4 z 2 Lem @ 30 @ 30 = e ~_ooortT -"| e - = o oO = = vex le lo =z a7 nn 5 20 5 20 - mmm E 7 a Pope 10 10 +e 0 0 -50 25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (C) Veias Supply Voltage (V) Figure 11A. Turn-Off Fall Time vs. Temperature Figure 11B. Turn-Off Fall Time vs. Voltage 15.0 15.0 | 12.0 12.0 = = = - ae = Min = 7 3 9.0 3 9.0 A 4 e e - 3 3 2 2 a = 60 = 60 F 2 2 gee 3.0 3.0 0.0 0.0 -50 25 0 25 50 75 100 125 5 75 10 12.5 15 17.5 20 Temperature (C) Vpp Logic Supply Voltage (V) Figure 12A. Logic 1 Input Threshold vs. Temperature Figure 12B. Logic 1 Input Threshold vs. Voltage 6 www.irf.comInternational TOR Rectifier 15.0 12.0 9.0 6.0 Logic "0 Input Threshold (VV) 3.0 0.0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 13A. Logic O Input Threshold vs. Temperature 5.00 4.00 3.00 2.00 High Level Output Voltage (V) 1.00 0.00 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 14A. High Level Output vs. Temperature 1.00 0.80 0.60 0.40 Low Level Output Voltage (/) 0.20 Max 0.00 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 15A. Low Level Output vs. Temperature www.irf.com IR2110E4 15.0 12.0 9.0 6.0 Logic "0 Input Threshold (VV) \ \ \ 3.0 Max | ie 0.0 5 7.5 10 12.5 15 17.5 20 Vpp Logic Supply Voltage (V) Figure 13B. Logic O Input Threshold vs. Voltage 5.00 4.00 = > g % 3.00 z = Oo B 2.00 > z Mo LL LL LL a 1.00 0.00 10 12 14 16 18 20 Veias Supply Voltage (V) Figure 14B. High Level Output vs. Voltage 15.0 | 12.0 = on = -7 3 on % 90 SF -= - 3 ~ 2 a = 60 SF 2 ge pee 3.0 0.0 5 75 10 12.5 15 17.5 20 Vpp Logic Supply Voltage (V) Figure 15B. Low Level Output vs. VoltageIR2110E4 500 Bb Q 3 wo 3 3 Ny S 3 Offset Supply Leakage Current (WA) -50 -25 0 25 50 75 100 125 Temperature (C) Figure 16A. Offset Supply Current vs. Temperature 500 400 = = = 300 2 5 eo 3 ater = Max ee ee ee = 200 }=== an 8 > Typ 100 0 -50 25 0 25 50 75 100 125 Temperature (C) Figure 17A. Vas Supply Current vs. Temperature 625 500 = aon 375 == eee 5 a7 2 Max en |e a & 250 SI || [nr AT ee 125 0 -50 25 0 25 50 75 100 125 Temperature (C) Figure 18A. Vcc Supply Current vs. Temperature 8 Vas Supply Current (WA) Offset Supply Leakage Current (yA) Vcc Supply Current (uA) International TOR Rectifier 500 400 300 200 100 Max 0 100 200 300 400 500 Vp Boost Voltage (V) Figure 16B. Offset Supply Current vs. Voltage 500 400 4 = 300 =e - _ - - a ~ | ca - [ern ennnnn 100 9 0 10 12 14 16 18 20 Vag Floating Supply Voltage (V) Figure 17B. Vas Supply Current vs. Voltage 625 500 oo - - - - - 375 = - i - 250 - = __] a+ M eo _ 125 Typ 0 10 12 14 16 18 20 Voc Fixed Supply Voltage (V) Figure 18B. Vcc Supply Current vs. Voltage www.irf.comInternational TOR Rectifier 100 80 60 40 == LL Voo Supply Current (uA) 20 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 19A. Vpp Supply Current vs. Temperature 100 80 = = 5 4 60 = 2 - 8 -_- a -7 3 a7 2 40 = = -_ 2 Max -\- - Le 4 Lpanerenennrn) 20 a el 0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 20A. Logic 1 Input Current vs. Temperature 5.00 & 36 9 Q 6 N Q 6 Logic "0" Input Bias Current (WA) 36 0.00 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 21A. Logic O Input Current vs. Temperature www.irf.com Logic "1 Input Bias Current (WA) Voo Supply Current (uA) Logic "0" Input Bias Current (WA) IR2110E4 100 80 Q 3 Bb -_ = Max L_ ee ot 20 Typ | 5 7.5 10 12.5 15 17.5 20 Vop Logic Supply Voltage (V) Figure 19B. Vpp Supply Current vs. Voltage 100 2 3 Q 3 Bb 8 F Loe 5 7.5 10 12.5 15 Vop Logic Supply Voltage (V) 17.5 20 Figure 20B. Logic 1 Input Current vs. Voltage 5.00 & 36 9 Q 6 N Q 6 36 0.00 5 7.5 10 12.5 15 17.5 20 Vop Logic Supply Voltage (V) Figure 21B. Logic O Input Current vs. VoltageIR2110E4 International TeR Rectifier 11.0 11.0 10.0 Lose 10.0 = Max ees erat TT = z a 2 Mex OT 90 3 ool 8 a a o Typ eee o 2 _ 2 $< = = Typ fa 2 8.0 2 30}. 2 Lee +e-rrT 2 3 Mn ee 3 _- > > fae ee 7.0 7.0 +9 } 4 6.0 6.0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Temperature (C) Temperature (C) Figure 22. Vas Undervoltage (+) vs. Temperature Figure 23. Vas Undervoltage (-) vs. Temperature 11.0 11.0 10.0 10.0 = Max ~4--4--T TTT = eee + _| aot Max eee ee oer a a -_ 9.0 4 9.0 a a a 2 typ [arnt g | 2 8.0 2 80 {Pe 2 Li 2 a] _ ee oe a] g Min eaes-c tT g La > _ > _e_oc7 70 7.0 ta =a= => 6.0 6.0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Temperature (C) Temperature (C) Figure 24. Vcc Undervoltage (+) vs. Temperature Figure 25. Vcc Undervoltage (-) vs. Temperature 5.00 5.00 4.00 4.00 = = 3.00 {i B 3.00 | 5 5 | 3 ee 3 2 Min rc 2 a 8 ~~ i ee s | -"7 8 2.00 = 8 2.00 es 3 ~ L Qt Ks = Typ Leow o ~ o aon 4 i 1.00 1.00 Min 0.00 0.00 -50 25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (C) Voias Supply Voltage (V) Figure 26A. Output Source Current vs. Temperature Figure 26B. Output Source Current vs. Voltage 10 www.irf.comInternational IR2110E4 TOR Rectifier 5.00 5.00 4.00 4.00 & 3.00 -e 5 3.00 x 5 re 5 ad 3 | 3 - = Me P+ __| = | en ~~ a. an a 3 2.00 =sS 3 2.00 = g T7-4-~4 6 |eTl--- - - 1.00 1.00 1 0.00 0.00 -50 25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (C) Voias Supply Voltage (V) Figure 27A. Output Sink Current vs. Temperature Figure 27B. Output Sink Current vs. Voltage 150 S20V 150 320 125 125 140V 2 100 4ov 5 100 2 2 z 75 B 75 2 / V 2 10V 3 50 < LA 3 50 LALA 5 J y 5 YVv > | Lf > | re ee | ere a 25 fet 25 a 0 0 1E42 1E43 1E4 1E45 1E46 1E42 1E43 1E44 1E45 1E46 Frequency (Hz) Frequency (Hz) Figure 28. IR2110 Ty vs. Frequency (IRFBC20) Figure 29. IR2110 Ty vs. Frequency (IRFBC30) RaatTe = 33W, Vcc = 15V Raate = 22W, Voc = 15V 320V 140V 320V 140V 150 150 125 125 100 100 iw s 10V s g g 5 5 EB 75 j EB 75 5 / 5 AL 3B 50 3B 50 J 5 Y | s Y/. 3 LU | ee Tet | att | aeons ae 25 25 0 0 1E42 1E43 1E4 1E45 1E46 1E42 1E43 1E4 1E45 1E46 Frequency (Hz) Frequency (Hz) Figure 30. IR2110 Ty vs. Frequency (IRFBC40) Figure 31. IR2110 Ty vs. Frequency (IRFPE50) Raate = 15W, Voc = 15V Raeate = 10W, Voc = 15V www.irf.com 11IR2110E4 International TeR Rectifier 150 320V 140V 150 320 140V 125 125 100 100 2 2 tov 2 75 10V 2 75 7 2 2 B so L/L \f Bo LL / 3 Ue) 5 YY L et | eirrT| ee 25 TH 25 1 0 0 1E42 1E43 1E4 1E45 1E46 1E42 1E43 1E4 1E45 1E46 Frequency (Hz) Frequency (Hz) Figure 32. IR2110S Ty vs. Frequency (IRFBC20) Figure 33. IR2110S Ty vs. Frequency (IRFBC30) Raate = 33W, Voc = 15V 320V 140V Raate = 22W, Voc = 15V 320V 140V 10V 150 125 Se 100 2 2 75 2 2 5 Be Y'/ 5 5 7 3 3 real a 25 0 1E42 1E4+3 1E4 1E45 1E46 1E42 1E4+3 1E4 1E45 1E46 Frequency (Hz) Frequency (Hz) Figure 34. IR2110S Ty vs. Frequency (IRFBC40) Figure 35. IR2110S Ty vs. Frequency (IRFPE50) Raate = 15W, Voc = 15V Raeate = 10W, Voc = 15V 0.0 20.0 -2.0 16.0 = = Ra 3 40 2 120 | > a % 60 a 8.0 + 5 e > a -8.0 2 40 -10.0 0.0 10 12 14 16 18 20 10 12 14 16 18 20 Vag Floating Supply Voltage (V) Voc Fixed Supply Voltage (V) Figure 36. Maximum Vs Negative Offset vs. Figure 37. Maximum Vss Positive Offset vs. Ves Supply Voltage Vec Supply Voltage 12 www.irf.comInternational IR2110E4 TOR Rectifier Functional Block Diagram FILTER Lead Definitions Lead Symbol | Description Vppb Logic supply HIN Logic input for high side gate driver output (HO), in phase SD Logic input for shutdown LIN Logic input for low side gate driver output (LO), in phase Vss Logic ground VB High side floating supply HO High side gate drive output Vs High side floating supply return Voc Low side supply LO Low side gate drive output COM Low side return www.irf.com 13IR2110E4 International TOR Rectifier Case Outline and Dimensions Leadless Chip Carrier (LCC) Package 9.14 [.360] 8.77 [.345] a 7.49 [.295] 7.12 [.280]} TOP VIEW [4.27 L050) |= = 3.22 [.127] 14x rc 1.96 [(.077] | 0.76 [.030] p k 5 16X54 [-020] p | & 0.25 L010} (wc [BS)[A GS) tsx 1-21 L048) 2.74 [.108] 0.82 [.032] 2.34 [.092} van BOTTOM VIEW PAD ASSIGNMENTS LIN NC | 8D 74 r NC NOTES: 1. DIMENSIONING & TOLERANCING PER ANSI Y14.5M-1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. International TER Rectifier WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: +4 44 1883 732020 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-I|kKebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 221 8371 IR TAIWAN:16 FI. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936 hittp://www.irf.com/ Data and specifications subject to change without notice. 4/99 14 www.irf.com