NTHD4502N Power MOSFET 30 V, 3.9 A, Dual N-Channel ChipFETt Features * Planar Technology Device Offers Low RDS(on) and Fast Switching Speed * Leadless ChipFET Package has 40% Smaller Footprint than TSOP-6. * * Ideal Device for Applications Where Board Space is at a Premium. ChipFET Package Exhibits Excellent Thermal Capabilities. Ideal for Applications Where Heat Transfer is Required. These Devices are Pb-Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(on) TYP ID MAX 80 mW @ 10 V 30 V 3.9 A 110 mW @ 4.5 V Applications * DC-DC Buck or Boost Converters * Low Side Switching * Optimized for Battery and Low Side Switching Applications in Computing and Portable Equipment MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Parameter Symbol Value Unit Drain-to-Source Voltage VDSS 30 V Gate-to-Source Voltage VGS 20 V ID 2.9 A Continuous Drain Current (Note 1) Steady State TA = 25C t5s TA = 25C Power Dissipation (Note 1) Steady State TA = 85C 1.13 TA = 25C 2.1 0.64 W tp = 10 ms IDM 12 A C = 100 pF, RS = 1500 W ESD- HBM 125 V TJ, TSTG -55 to 150 C Source Current (Body Diode) IS 2.5 A Lead Temperature for Soldering Purposes (1/8" from case for 10 s) TL 260 C Pulsed Drain Current ESD Capability (Note 3) Operating Junction and Storage Temperature A 1.6 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 2. Surface Mounted on FR4 Board using the minimum recommended pad size (Cu area = 0.214 in sq). 3. ESD Rating Information: HBM Class 0. (c) Semiconductor Components Industries, LLC, 2012 June, 2012 - Rev. 6 (4) S1 (1) S2 (3) N-Channel MOSFET ChipFET CASE 1206A STYLE 2 1 1 PIN CONNECTIONS MARKING DIAGRAM D1 8 1 S1 1 8 D1 7 2 G1 2 7 D2 6 3 S2 3 D2 5 4 G2 4 C5 M G PD TA = 85C TA = 25C (2) W 2.2 Steady State G2 8 ID Power Dissipation (Note 2) G1 3.9 PD TA = 25C D2 (5, 6) 2.1 t5s Continuous Drain Current (Note 2) D1 (7, 8) 6 5 C5 = Specific Device Code M = Month Code G = Pb-Free Package ORDERING INFORMATION Device Package Shipping NTHD4502NT1G ChipFET (Pb-Free) 3000/Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NTHD4502N/D NTHD4502N THERMAL RESISTANCE RATINGS Symbol Max Unit Junction-to-Ambient - Steady State (Note 4) Parameter RqJA 110 C/W Junction-to-Ambient - t 5 s (Note 4) RqJA 60 Junction-to-Ambient - Steady State (Note 5) RqJA 195 Junction-to-Foot - Steady State (Note 5) RqJF 40 4. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 5. Surface Mounted on FR4 Board using the minimum recommended pad size (Cu area = 0.214 in sq). ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) Parameter Symbol Test Conditions Min Typ Max Units V(BR)DSS VGS = 0 V, ID = 250 mA 30 36 Zero Gate Voltage Drain Current IDSS VGS = 0 V, VDS = 24 V VGS = 0 V, VDS = 24 V, TJ = 125C 10 Gate-to-Source Leakage Current IGSS VDS = 0 V, VGS = "20 V "100 nA Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 mA 1.65 3.0 V Drain-to-Source On-Resistance RDS(on) VGS = 10 V, ID = 2.9 A 78 85 mW VGS = 4.5 V, ID = 2.2 A 105 140 VDS = 15 V, ID = 2.9 A 3.8 S 140 pF OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage V 1.0 mA ON CHARACTERISTICS (Note 6) Forward Transconductance gFS 1.0 CHARGES AND CAPACITANCES Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS Input Capacitance CISS Output Capacitance Reverse Transfer Capacitance COSS CRSS VGS = 0 V, f = 1.0 MHz, VDS = 15 V VGS = 0 V, f = 1.0 MHz, VDS = 24 V 53 16 135 250 42 75 13 25 3.6 7.0 Total Gate Charge QG(TOT) Threshold Gate Charge QG(TH) Gate-to-Source Charge QGS Gate-to-Drain Charge QGD 0.7 Total Gate Charge QG(TOT) 1.9 Threshold Gate Charge QG(TH) Gate-to-Source Charge QGS Gate-to-Drain Charge QGD VGS = 10 V, VDS = 15 V, ID = 2.9 A VGS = 4.5 V, VDS = 24 V, ID = 2.9 A http://onsemi.com 2 nC 0.3 0.6 0.3 0.6 0.9 6. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. pF nC NTHD4502N ELECTRICAL CHARACTERISTICS (continued) (TJ = 25C unless otherwise noted) Parameter Symbol Test Conditions Min Typ Max Units 1.2 V DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = 2.5 A 0.85 Reverse Recovery Time tRR 8.6 ns Reverse Recovery Charge QRR VGS = 0 V, IS = 2.9 A, dIS/dt = 100 A/ms 4.0 nC Reverse Recovery Time tRR 8.4 ns Reverse Recovery Charge QRR VGS = 0 V, IS = 1.0 A, dIS/dt = 100 A/ms 4.0 nC SWITCHING CHARACTERISTICS (Note 7) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(ON) 6.5 12 5.4 10 14.9 25 tf 1.8 5.0 td(ON) 7.8 tr td(OFF) tr td(OFF) VGS = 10 V, VDD = 24 V, ID = 1 A, RG = 6 W VGS = 4.5 V, VDD = 24 V, ID = 2.9 A, RG = 2.5 W tf 12.6 9.6 2.8 7. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 ns ns NTHD4502N TYPICAL PERFORMANCE CURVES 10 ID, DRAIN CURRENT (AMPS) 3.8 V 3.6 V 6 3.4 V 4 3.2 V TJ = 25C 3V 2 2.8 V 2.6 V 0 0 RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) VDS 10 V 2 1 3 4 5 5 4 3 2 6 TJ = -55C 3 4 5 2 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics ID = 2.9 A TJ = 25C 0.25 0.2 0.15 0.1 0.05 0 5 7 3 4 6 8 9 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 2 10 1 6 0.12 TJ = 25C 0.11 VGS = 4.5 V 0.10 0.09 VGS = 10 V 0.08 0.07 2 3 6 5 4 ID, DRAIN CURRENT (AMPS) Figure 4. On-Resistance vs. Drain Current and Gate Voltage Figure 3. On-Resistance vs. Gate-to-Source Voltage 1.8 1000 VGS = 0 V ID = 2.9 A VGS = 10 V IDSS, LEAKAGE (nA) RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 25C VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 0.3 1.6 100C 1 0 RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) ID, DRAIN CURRENT (AMPS) 8 6 4V VGS = 10, 6, 5, 4.5 & 4.2 V resp. 1.4 1.2 1.0 TJ = 150C 100 10 TJ = 100C 1 0.8 0.6 -50 -25 0 25 50 75 100 125 150 0.1 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Voltage http://onsemi.com 4 30 NTHD4502N VGS = 0 V VDS = 0 V TJ = 25C C, CAPACITANCE (pF) QG 10 CISS 200 CRSS 100 COSS 0 10 24 12 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 300 5 VGS 0 VDS 5 10 15 20 25 30 VDS 8 VGS 4 QGS 0 0.1 1 10 t, TIME (ns) VGS = 0 V TJ = 25C 2 1 0 0.3 100 4 Figure 8. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge IS, SOURCE CURRENT (AMPS) VDD = 24 V ID = 1.0 A VGS = 10 V 4 0 3 1 2 QG, TOTAL GATE CHARGE (nC) 0 3 tf 8 ID = 2.9 A TJ = 25C 100 1 12 QGD 2 Figure 7. Capacitance Variation td(off) td(on) tr 16 6 GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS) 10 20 0.4 0.5 0.6 0.7 0.8 0.9 RG, GATE RESISTANCE (OHMS) VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current http://onsemi.com 5 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) TYPICAL PERFORMANCE CURVES 1 NTHD4502N PACKAGE DIMENSIONS ChipFET] CASE 1206A-03 ISSUE K D 8 7 6 L 5 HE 5 6 7 8 4 3 2 1 E 1 e1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE. 4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL AND VERTICAL SHALL NOT EXCEED 0.08 MM. 5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS. 6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD SURFACE. q 2 3 e 4 b DIM A b c D E e e1 L HE q c A 0.05 (0.002) STYLE 2: PIN 1. 2. 3. 4. 5. 6. 7. 8. SOURCE 1 GATE 1 SOURCE 2 GATE 2 DRAIN 2 DRAIN 2 DRAIN 1 DRAIN 1 MILLIMETERS NOM MAX 1.05 1.10 0.30 0.35 0.15 0.20 3.05 3.10 1.65 1.70 0.65 BSC 0.55 BSC 0.28 0.35 0.42 1.80 1.90 2.00 5 NOM MIN 1.00 0.25 0.10 2.95 1.55 INCHES NOM 0.041 0.012 0.006 0.120 0.065 0.025 BSC 0.022 BSC 0.014 0.011 0.071 0.075 5 NOM MIN 0.039 0.010 0.004 0.116 0.061 MAX 0.043 0.014 0.008 0.122 0.067 0.017 0.079 SOLDERING FOOTPRINT 1 2.032 0.08 2.362 0.093 0.65 0.025 PITCH 8X 8X 0.66 0.026 0.457 0.018 mm inches ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. 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