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Data Sheet BTS555
Infineon Technologies AG 2 2010-June-01
Pin Symbol Function
1 OUT
Output to the load. The pins 1 and 5 must be shorted with each other
especially in high current applications!3)
2 IN Input, activates the power switch in case of short to ground
3 Vbb Positive power supply voltage, the tab is electrically connected to this pin.
In high current applications the tab should be used for the Vbb connection
instead of this pin4).
4 IS
Diagnostic feedback providing a sense current proportional to the load
current; zero current on failure (see Truth Table on page 7)
5 OUT
Output to the load. The pins 1 and 5 must be shorted with each other
especially in high current applications!3)
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter Symbol Values Unit
Supply voltage (see page 4 and 5) Vbb 40 V
Supply voltage for full short circuit protection,
(EAS limitation see diagram on page 10) Tj,start=-40°C…+150°C:
Vbb 34 V
Load current (short circuit current, see page 5) IL self-limited A
Load dump protection VLoadDump = UA + Vs, UA = 13.5 V
RI5) = 2 Ω, RL = 0.1 Ω, td = 200 ms,
IN, IS = open or grounded
VLoad dump6) 80 V
Operating temperature range
Storage temperature range
Tj
Tstg
-40 ...+150
-55 ...+150
°C
Power dissipation (DC), TC ≤ 25 °C Ptot 360 W
Inductive load switch-off energy dissipation, single pulse
Vbb = 12V, T
j,start = 150°C, T
C = 150°C const.,
IL = 20 A, ZL = 15 mH, 0 Ω, see diagram on page 10
EAS 3J
Electrostatic discharge capability (ESD)
Human Body Model acc. MIL-STD883D, method 3015.7 and ESD
assn. std. S5.1-1993, C = 100 pF, R = 1.5 kΩ
VESD 4.0 kV
Current through input pin (DC)
Current through current sense status pin (DC)
see internal circuit diagrams on page 8 and 9
IIN
IIS
+15 , -250
+15 , -250
mA
3) Not shorting all outputs will considerably increase the on-state resistance, reduce the peak current capability
and decrease the current sense accuracy
4) Otherwise add up to 0.5 mΩ (depending on used length of the pin) to the RON if the pin is used instead of the
tab.
5) RI = internal resistance of the load dump test pulse generator.
6) VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839.