The RF MOSFET Line
   
N–Channel Enhancement–Mode
. . . designed for wideband large–signal amplifier and oscillator applications up
to 400 MHz range.
Guaranteed 28 Volt, 150 MHz Performance
Output Power = 5.0 Watts
Minimum Gain = 11 dB
Efficiency — 55% (Typical)
Small–Signal and Large–Signal Characterization
Typical Performance at 400 MHz, 28 Vdc, 5.0 W
Output = 10.6 dB Gain
100% Tested For Load Mismatch At All Phase Angles
With 30:1 VSWR
Low Noise Figure — 2.0 dB (Typ) at 200 mA, 150 MHz
Excellent Thermal Stability, Ideally Suited For Class A
Operation
MAXIMUM RATINGS
Rating Symbol Value Unit
Drain–Source Voltage VDSS 65 Vdc
Drain–Gate Voltage
(RGS = 1.0 M)VDGR 65 Vdc
Gate–Source Voltage VGS ±40 Vdc
Drain Current — Continuous ID0.9 Adc
Total Device Dissipation @ TC = 25°C
Derate above 25°CPD17.5
0.1 Watts
W/°C
Storage Temperature Range Tstg –65 to +150 °C
THERMAL CHARACTERISTICS
Rating Symbol Value Unit
Thermal Resistance, Junction to Case RθJC 10 °C/W
Handling and Packaging — MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.

5.0 W, to 400 MHz
N–CHANNEL MOS
BROADBAND RF POWER
FET
CASE 211–07, STYLE 2
Order this document
by MRF134/D
SEMICONDUCTOR TECHNICAL DATA
1
REV 6
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage (VGS = 0, ID = 5.0 mA) V(BR)DSS 65 Vdc
Zero Gate Voltage Drain Current (VDS = 28 V, VGS = 0) IDSS 1.0 mAdc
Gate–Source Leakage Current (VGS = 20 V, VDS = 0) IGSS 1.0 µAdc
ON CHARACTERISTICS
Gate Threshold Voltage (ID = 10 mA, VDS = 10 V) VGS(th) 1.0 3.5 6.0 Vdc
Forward Transconductance (VDS = 10 V, ID = 100 mA) gfs 80 110 mmhos
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 28 V, VGS = 0, f = 1.0 MHz) Ciss 7.0 pF
Output Capacitance
(VDS = 28 V, VGS = 0, f = 1.0 MHz) Coss 9.7 pF
Reverse Transfer Capacitance
(VDS = 28 V, VGS = 0, f = 1.0 MHz) Crss 2.3 pF
FUNCTIONAL CHARACTERISTICS
Noise Figure
(VDS = 28 Vdc, ID = 200 mA, f = 150 MHz) NF 2.0 dB
Common Source Power Gain
(VDD = 28 Vdc, Pout = 5.0 W, IDQ = 50 mA)f = 150 MHz (Fig. 1)
f = 400 MHz (Fig. 14)
Gps
11
14
10.6
dB
Drain Efficiency (Fig. 1)
(VDD = 28 Vdc, Pout = 5.0 W, f = 150 MHz, IDQ = 50 mA) η50 55 %
Electrical Ruggedness (Fig. 1)
(VDD = 28 Vdc, Pout = 5.0 W, f = 150 MHz, IDQ = 50 mA,
VSWR 30:1 at all Phase Angles)
ψNo Degradation in Output Power
Figure 1. 150 MHz Test Circuit
C1, C4 — Arco 406, 15–115 pF
C2 — Arco 403, 3.0–35 pF
C3 — Arco 402, 1.5–20 pF
C5, C6, C7, C8, C12 — 0.1 µF Erie Redcap
C9 — 10 µF, 50 V
C10, C11 — 680 pF Feedthru
D1 — 1N5925A Motorola Zener
L1 — 3 Turns, 0.310 ID, #18 AWG Enamel, 0.2 Long
L2 — 3–1/2 Turns, 0.310 ID, #18 AWG Enamel, 0.25Long
L3 — 20 Turns, #20 AWG Enamel Wound on R5
L4 — Ferroxcube VK–200 — 19/4B
R1 — 68 , 1.0 W Thin Film
R2 — 10 k, 1/4 W
R3 — 10 Turns, 10 k Beckman Instruments 8108
R4 — 1.8 k, 1/2 W
R5 — 1.0 M, 2.0 W Carbon
Board — G10, 62 mils
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*Bias Adjust
2
REV 6
Figure 2. Output Power versus Input Power Figure 3. Output Power versus Input Power
Figure 4. Output Power versus Supply Voltage Figure 5. Output Power versus Supply Voltage
Figure 6. Output Power versus Supply Voltage Figure 7. Output Power versus Supply Voltage

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3
REV 6
Figure 8. Output Power versus Gate Voltage Figure 9. Drain Current versus Gate Voltage
(Transfer Characteristics)
Figure 10. Gate–Source Voltage versus
Case Temperature Figure 11. Maximum Available Gain
versus Frequency
Figure 12. Capacitance versus Voltage Figure 13. Maximum Rated Forward Biased
Safe Operating Area

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1
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°
4
REV 6
Figure 14. 400 MHz Test Circuit
C1, C6 — 270 pF, ATC 100 mils
C2, C3, C4, C5 — 0–20 pF Johanson
C7, C9, C10, C14 — 0.1 µF Erie Redcap, 50 V
C8 — 0.001 µF
C11 — 10 µF, 50 V
C12, C13 — 680 pF Feedthru
D1 — 1N5925A Motorola Zener
L1 — 6 Turns, 1/4 ID, #20 AWG Enamel
L2 — Ferroxcube VK–200 — 19/4B
R1 — 68 , 1.0 W Thin Film
R2 — 10 k, 1/4 W
R3 — 10 Turns, 10 k Beckman Instruments 8108
R4 — 1.8 k, 1/2 W
Z1 — 1.4 x 0.166 Microstrip
Z2 — 1.1 x 0.166 Microstrip
Z3 — 0.95 x 0.166 Microstrip
Z4 — 2.2 x 0.166 Microstrip
Z5 — 0.85 x 0.166Microstrip
Board — Glass Teflon, 62 mils
Figure 15. Large–Signal Series Equivalent
Input/Output Impedances, Zin, ZOL*
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

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   
 
*Bias Adjust
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 
 
 
 
 
 
 
 
5
REV 6
f
S11 S21 S12 S22
f
(MHz) |S11|φ|S21|φ|S12|φ|S22|φ
1.0 0.989 1.0 11.27 179 0.0014 89 0.954 –1.0
2.0 0.989 2.0 11.27 179 0.0028 89 0.954 –2.0
5.0 0.988 5.0 11.26 176 0.0069 86 0.954 –4.0
10 0.985 –10 11.20 173 0.014 83 0.951 9.0
20 0.977 –20 10.99 166 0.027 76 0.938 –18
30 0.965 –30 10.66 159 0.039 69 0.918 –26
40 0.950 –39 10.25 153 0.051 63 0.895 –34
50 0.931 –47 9.777 147 0.060 57 0.867 –42
60 0.912 –53 9.359 142 0.069 53 0.846 –49
70 0.892 –58 8.960 138 0.077 49 0.828 –56
80 0.874 –62 8.583 135 0.085 46 0.815 –62
90 0.855 –66 8.190 131 0.091 43 0.801 –68
100 0.833 –70 7.808 128 0.096 40 0.785 –74
110 0.827 –73 7.661 125 0.101 38 0.784 –77
120 0.821 –76 7.515 122 0.107 36 0.784 –82
130 0.814 –79 7.368 119 0.113 34 0.784 –85
140 0.808 –82 7.222 116 0.119 32 0.783 –88
150 0.802 –86 7.075 114 0.125 31 0.783 –90
160 0.788 –89 6.810 112 0.127 30 0.780 –92
170 0.774 –92 6.540 110 0.128 28 0.774 –94
180 0.763 –94 6.220 108 0.130 26 0.762 –98
190 0.751 –97 5.903 106 0.132 24 0.760 100
200 0.740 –100 5.784 104 0.134 23 0.758 –103
225 0.719 –104 5.334 100 0.136 20 0.757 –107
250 0.704 –108 4.904 97 0.139 19 0.758 –110
275 0.687 –113 4.551 92 0.141 16 0.757 –114
300 0.673 –117 4.219 89 0.141 14 0.750 –117
325 0.668 –120 3.978 86 0.142 12 0.757 –120
350 0.669 –123 3.737 83 0.142 10 0.766 –121
375 0.662 –125 3.519 80 0.143 9.0 0.768 –123
400 0.654 –127 3.325 77 0.142 8.0 0.772 –124
425 0.650 –129 3.170 75 0.140 7.0 0.772 –125
450 0.638 –131 3.048 72 0.141 6.0 0.783 –125
475 0.614 –132 2.898 71 0.136 6.0 0.786 –126
500 0.641 –133 2.833 68 0.136 5.0 0.795 –127
525 0.638 –135 2.709 66 0.135 5.0 0.801 –127
550 0.633 –137 2.574 64 0.133 4.0 0.802 –128
575 0.628 –138 2.481 62 0.131 5.0 0.805 –128
600 0.625 –140 2.408 60 0.129 5.0 0.814 –128
The Power RF characterization data were measured with a 68 ohm resistor shunting the MRF134 input port. (continued)
The scattering parameters were measured on the MRF134 device alone with no external components.
Table 1. Common Source Scattering Parameters
VDS = 28 V, ID = 100 mA
6
REV 6
f
S11 S21 S12 S22
f
(MHz) |S11|φ|S21|φ|S12|φ|S22|φ
625 0.619 –142 2.334 58 0.128 5.0 0.818 –129
650 0.617 –144 2.259 56 0.125 6.0 0.824 –130
675 0.618 –146 2.192 55 0.123 7.0 0.834 –130
700 0.619 –147 2.124 53 0.122 8.0 0.851 –131
725 0.618 –150 2.061 51 0.120 9.0 0.859 –132
750 0.614 –152 1.983 49 0.118 11 0.857 –133
775 0.609 –154 1.908 48 0.119 13 0.865 133
800 0.562 –155 1.877 49 0.118 15 0.872 133
825 0.587 –156 1.869 46 0.119 16 0.869 134
850 0.593 –158 1.794 44 0.118 18 0.875 135
875 0.597 –160 1.749 43 0.119 18 0.881 135
900 0.598 –162 1.700 41 0.118 18 0.889 136
925 0.592 –164 1.641 40 0.115 18 0.888 138
950 0.588 –166 1.590 39 0.112 20 0.877 138
975 0.586 –168 1.572 39 0.108 23 0.864 –137
1000 0.590 –171 1.551 37 0.107 28 0.863 –137
The Power RF characterization data were measured with a 68 ohm resistor shunting the MRF134 input port. The scattering parameters were
measurd on the MRF134 device alone with no external components.
Table 1. Common Source Scattering Parameters (continued)
VDS = 28 V, ID = 100 mA
7
REV 6
Figure 16. S11, Input Reflection Coefficient
versus Frequency
VDS = 28 V ID = 100 mA
Figure 17. S12, Reverse Transmission Coefficient
versus Frequency
VDS = 28 V ID = 100 mA
Figure 18. S21, Forward Transmission Coefficient
versus Frequency
VDS = 28 V ID = 100 mA
Figure 19. S22, Output Reflection Coefficient
versus Frequency
VDS = 28 V ID = 100 mA
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8
REV 6
DESIGN CONSIDERATIONS
The MRF134 is a RF power N–Channel enhancement
mode field–effect transistor (FET) designed especially for
VHF power amplifier and oscillator applications. M/A-COM RF
MOS FETs feature a vertical structure with a planar design,
thus avoiding the processing difficulties associated with
V–groove vertical power FETs.
M/A-COM Application Note AN–211A, FETs in Theory and
Practice, is suggested reading for those not familiar with the
construction and characteristics of FETs.
The major advantages of RF power FETs include high gain,
low noise, simple bias systems, relative immunity from
thermal runaway, and the ability to withstand severely
mismatched loads without suffering damage. Power output
can be varied over a wide range with a low power dc control
signal, thus facilitating manual gain control, ALC and modula-
tion.
DC BIAS
The MRF134 is an enhancement mode FET and, therefore,
does not conduct when drain voltage is applied. Drain current
flows when a positive voltage is applied to the gate. See Figure
9 for a typical plot of drain current versus gate voltage. RF
power FETs require forward bias for optimum performance.
The value of quiescent drain current (IDQ) is not critical for
many applications. The MRF134 was characterized at IDQ =
50 mA, which is the suggested minimum value of IDQ. For
special applications such as linear amplification, IDQ may
have to be selected to optimize the critical parameters.
The gate is a dc open circuit and draws no current.
Therefore, the gate bias circuit may generally be just a simple
resistive divider network. Some special applications may
require a more elaborate bias system.
GAIN CONTROL
Power output of the MRF134 may be controlled from its
rated value down to zero (negative gain) by varying the dc gate
voltage. This feature facilitates the design of manual gain
control, AGC/ALC and modulation systems. (See Figure 8.)
AMPLIFIER DESIGN
Impedance matching networks similar to those used with
bipolar VHF transistors are suitable for MRF134. See
M/A-COM Application Note AN721, Impedance Matching
Networks Applied to RF Power Transistors. The higher input
impedance o f R F MOS FETs helps ease the task of broadband
network design. Both small signal scattering parameters and
large signal impedances are provided. While the s–parame-
ters will not produce an exact design solution for high power
operation, they do yield a good first approximation. This is an
additional advantage of RF MOS power FETs.
RF power FETs are triode devices and, therefore, not
unilateral. This, coupled with the very high gain of the
MRF134, yields a device capable of self oscillation. Stability
may be achieved by techniques such as drain loading, input
shunt resistive loading, or output to input feedback. The
MRF134 was characterized with a 68–ohm input shunt
loading resistor. Two port parameter stability analysis with the
MRF134 s–parameters provides a useful–tool for selection of
loading or feedback circuitry to assure stable operation. See
MA-COM Application Note AN215A for a discussion of two port
network theory and stability.
Input resistive loading is not feasible in low noise applica-
tions. The MRF134 noise figure data was generated in a circuit
with drain loading and a low loss input network.
9
REV 6
PACKAGE DIMENSIONS
CASE 211–07
ISSUE N
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10
Specifications subject to change without notice.
n North America: Tel. (800) 366-2266, Fax (800) 618-8883
n Asia/Pacific: Tel.+81-44-844-8296, Fax +81-44-844-8298
n Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020
Visit www.macom.com for additional data sheets and product information.
REV 6