@ HARRIS 2N6903 N-Channei Logic Level January 1994 Power MOS Field-Effect Transistors (L2FET) Features Package TO-205AF 0.98A, 200V BOTTOM VIEW * DS(on) = 3.652 GATE * Design Optimized for 5V Gate Drive SOURGE Can be Driven Directly from QMOS, NMOS, TTL Circuits Compatible with Automotive Drive Requirements * SOA is Power-Dissipation Limited * Nanosecond Switching Speeds Linear Transfer Characteristics High Input Impedance T inal Di ermina fagram N-CHANNEL ENHANCEMENT MODE Majority Carrier Device Description D The 2N6903 is an N-channel enhancement-mode silicon~gate power MOS field-effect transistor specifically designed for use with logic level (5V) driving sources in applications such as programma- ble controllers, automotive switching, and solenoid drivers. This per- formance is accomplished through a special gate oxide design G 2 which provides full rated conduction at gate biases in the 3V - 5V id w range, therefore facilitating true on-off power control directly from a 77] logic circuit supply voltages. al 3 $s 9 The 2N6903 is supplied in the JEDEC TO-205AF metal package. So & Os wd Absolute Maximum Ratings (Tc = +25C), Unless Otherwise Specified > 2N6903 UNITS Drain-Source Voltage .... 66. e ccc e cece tener eee en teen ee eee ean tte ee tert e ates Vos 200* v Drain-Gate Voltage (RGS = 1MQ) 0.2... ec rereee ened e bene tt een nanan VDGR 200* v Continuous Drain Current Selah 0 0.98* A Pulsed Drain Current... 4* A Gate-Source Voltage +10* Vv Maximum Power Dissipation To F286 Lecce cen ene tee een nen rete tenner ete nessa tet eeenetae D 8.33* WwW Above Tc = +25C, Derate Linearly 0.0667* W/G Operating and Storage Junction Temperature Range.......-.. cece ence ee cee erence neers Ty. TsTtg -S5 to +150* C Maximum Lead Temperature for Soldering .......... 2 ccc cece cece ce tee eet eect eens een retage TL 260* oC At distance > 1/8 in. (3.17mm) from seating plane for 10s max *JEDEC registered values CAUTION: These devices are sensitive to electrostatic discharge. Proper 1.C. handling procedures should be followed. File Number 1 879.2 Copyright Harris Carporation 1994 6-11Specifications 2N6903 ELECTRICAL CHARACTERISTICS at Case Temperature (Tc) = 25C unless otherwise specified. LIMITS CHARACTERISTIC TEST CONDITIONS Min. |Max. UNITS *! Drain-Source Breakdown Voltage BVoss lo = 1mMA, Ves = 0 200 | Vv *| Gate Threshold Voltage Vas(th) Vas = Vos, Ip = 1 MA 1 2 Vv *! Zero Gate Voltage Drain Current Ipss Vos = 160 V - 1 A To = 125C, Vos = 160 V {50 | * *| Gate-Source Leakage Current lass Ves = 10 V, Vos = 0 | 100 nA *! Drain-Source On Voltage Vos(on) Ip = 0.62 A, Vas = 5 V {2.26 Vv lp = 0.98 A, Vas = 5 V | 6 *| Static Drain-Source On Resistance fps(on)@ to = 0.62 A, Vas = 5 V ~ [3.65 a Te = 125C, Ip = 0.62 A, Ves = 5 V {7.7 *| Forward Transconductance Qre Vos = 5 V, lp = 0.62A 500 |2000| mmho *| Input Capacitance Ciss Vos = 25 V 50 | 200 *! Output Capacitance Coss Vas = OV 15 | 60 pF *| Reverse Transfer Capacitance Crea f= 0.1 MHz 2 | 20 *| Turn-On Delay Time ta(on) Von = 100 V | 25 *| Rise Time tr In = 0.62 A { 30 ns *| Turn-Off Deiay Time ta(off) Roen = Ags = 15 2 | 40 *) Fall Time tr Vas = 5 V | 80 | Thermal Resistance Junction-to-Case Rac 115 | C/W SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS LIMITS CHARACTERISTIC TEST CONDITIONS Min. |Max. UNITS *| Diode Forward Voltage Vsp Isp = 0.98 A 0.8 | 1.6 Vv Reverse Recovery Time te Ie = 1A, die/dt = 50 A/ps ~ | 500 ns "In accordance with JEDEC registration data. 8Pulsed: Pulse duration = 300 ys max., duty cycle = 2%. fees ara a E;OPERATION IN THIS AREA [1S LIMITED BY ol He es e CASE TEMPERATURE (Tc )= 25C (CURVES MUST BE DERATED 6 LINEARLY WITH INCREASE IN TEMPERATURE} gi ~ DRAIN CURRENT (1p) A Nn a et ani pre rd : ttt t 10 100 DRAIN -TO~ SOURCE VOLTAGE (Vpg) V 92CM- 40709 Fig. 1 - Maximum operating areas. 6-122N6903 n a 20 a = Q # = S = a > a 2 x G w x = - w & z G POWER DISSIPATION (Pp) W 3 3 50 100 150 INCT MPI Ty=8 CASE TEMPERATURE (Te)-C sores JUNCTION TEMPERATURE (Ty)o C Fig. 2 - Power dissipation vs. temperature derating curve. Fig. 3 - Typical normalized gate threshold voltage as a function of junction temperature. ps= 5V PULSE TEST PULSE DURATION * 80u35 DUTY CYCLE 52% af Wu Wd up, ~uH ug Te . aad . = Qe oO 1 2 3 4 5 oO JUNCTION TEMPERATURE (Ty }*%C = 92cs-30747 GATE-TO-SOURCE VOLTAGE (gs) - 5 y 9205-40746 Fig. 4 - Typical normalized drain-to-source on resistance to Fig. 5 - Typical transfer characteristics. a 9 junction temperature. FREQUENCY (ft) = 1 MHz Vv PULSE TEST PULSE OURATION=80 us 2% DUTY CYCLE o re a a 2 wd g 2 a Fr 3G < a < o Urpglonio BRAIN-TO-SOURCE ON RESISTANCE DRAIN-TO- SOURCE VOLTAGE (v,.)-V o 4 DS! 3 DRAIN CURRENT(Lp}-A = 9205-27312 925-36090 Fig. 6 - Typical drain-to-source on resistance as a function of Fig. ? - Capacitance as a function of drain-to-source voltage. drain current. 6-132N6903 Vos *!5V PULSE TEST PULSE DURATION: Ops DUTY CYCLE < 2% FORWARD TRANSCONDUCTANCE (gfs}-mho 1 ORAIN CURRENT (Ip)-A 9208-37313 Fig. 8 - Typical forward transconductance as a function of drain current. 1600, 0 TO SCOPE (oovV KELVIN CONTACT aH g2cs-aq7ad Fig. 9 - Switching time test circuit.