Vref
Input VKA
IKA
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
TL43xx Precision Programmable Reference
1 Features 3 Description
The TL431 and TL432 devices are three-terminal
1• Reference Voltage Tolerance at 25°C adjustable shunt regulators, with specified thermal
– 0.5% (B Grade) stability over applicable automotive, commercial, and
– 1% (A Grade) military temperature ranges. The output voltage can
be set to any value between Vref (approximately
– 2% (Standard Grade) 2.5 V) and 36 V, with two external resistors. These
• Adjustable Output Voltage: Vref to 36 V devices have a typical output impedance of 0.2 Ω.
• Operation From −40°C to 125°C Active output circuitry provides a very sharp turn-on
characteristic, making these devices excellent
• Typical Temperature Drift (TL431B) replacements for Zener diodes in many applications,
– 6 mV (C Temp) such as onboard regulation, adjustable power
– 14 mV (I Temp, Q Temp) supplies, and switching power supplies. The TL432
• Low Output Noise device has exactly the same functionality and
electrical specifications as the TL431 device, but has
• 0.2-ΩTypical Output Impedance different pinouts for the DBV, DBZ, and PK packages.
• Sink-Current Capability: 1 mA to 100 mA Both the TL431 and TL432 devices are offered in
•three grades, with initial tolerances (at 25°C) of 0.5%,
2 Applications 1%, and 2%, for the B, A, and standard grade,
• Adjustable Voltage and Current Referencing respectively. In addition, low output drift versus
temperature ensures good stability over the entire
• Secondary Side Regulation in Flyback SMPSs temperature range.
• Zener Replacement The TL43xxC devices are characterized for operation
• Voltage Monitoring from 0°C to 70°C, the TL43xxI devices are
• Comparator with Integrated Reference characterized for operation from –40°C to 85°C, and
the TL43xxQ devices are characterized for operation
from –40°C to 125°C.
Device Information(1)
PART NUMBER PACKAGE (PIN) BODY SIZE (NOM)
SOT-23-3 (3) 2.90 mm x 1.30 mm
SOT-23-5 (5) 2.90 mm x 1.60 mm
TL43xx SOIC (8) 4.90 mm x 3.90 mm
PDIP (8) 9.50 mm x 6.35 mm
SOP (8) 6.20 mm x 5.30 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
4 Simplified Schematic
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
Table of Contents
1 Features.................................................................. 18 Parameter Measurement Information ................ 18
2 Applications ........................................................... 19 Detailed Description............................................ 19
9.1 Overview................................................................. 19
3 Description............................................................. 19.2 Functional Block Diagram....................................... 19
4 Simplified Schematic............................................. 19.3 Feature Description................................................. 20
5 Revision History..................................................... 29.4 Device Functional Modes........................................ 20
6 Pin Configuration and Functions......................... 310 Applications and Implementation...................... 21
7 Specifications......................................................... 410.1 Application Information.......................................... 21
7.1 Absolute Maximum Ratings ...................................... 410.2 Typical Applications .............................................. 21
7.2 ESD Ratings.............................................................. 410.3 System Examples ................................................. 26
7.3 Thermal Information.................................................. 411 Power Supply Recommendations ..................... 29
7.4 Recommended Operating Conditions....................... 412 Layout................................................................... 29
7.5 Electrical Characteristics, TL431C, TL432C............. 512.1 Layout Guidelines ................................................. 29
7.6 Electrical Characteristics, TL431I, TL432I................ 612.2 Layout Example .................................................... 29
7.7 Electrical Characteristics, TL431Q, TL432Q............. 713 Device and Documentation Support................. 30
7.8 Electrical Characteristics, TL431AC, TL432AC........ 813.1 Related Links ........................................................ 30
7.9 Electrical Characteristics, TL431AI, TL432AI ........... 913.2 Trademarks........................................................... 30
7.10 Electrical Characteristics, TL431AQ, TL432AQ.... 10 13.3 Electrostatic Discharge Caution............................ 30
7.11 Electrical Characteristics, TL431BC, TL432BC .... 11 13.4 Glossary................................................................ 30
7.12 Electrical Characteristics, TL431BI, TL432BI ....... 12
7.13 Electrical Characteristics, TL431BQ, TL432BQ.... 13 14 Mechanical, Packaging, and Orderable
Information........................................................... 30
7.14 Typical Characteristics.......................................... 14
5 Revision History
Changes from Revision N (January 2014) to Revision O Page
• Added Applications,Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table, ,
Feature Description section, Device Functional Modes,Application and Implementation section, Power Supply
Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
Packaging, and Orderable Information section. ..................................................................................................................... 1
• Added Applications................................................................................................................................................................. 1
• Moved Typical Characteristics into Specifications section. ................................................................................................. 14
Changes from Revision M (July 2012) to Revision N Page
• Updated document formatting................................................................................................................................................ 1
• Removed Ordering Information table. .................................................................................................................................... 3
• Added Application Note links................................................................................................................................................ 21
Changes from Revision K (June 2010) to Revision L Page
• Deleted TAvalues under TEST CONDITIONS for VI(dev) and II(dev) PARAMETERS in the Electrical Characteristics table. .. 5
2Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
1
2
3
4
8
7
6
5
CATHODE
ANODE
ANODE
NC
REF
ANODE
ANODE
NC
TL431, TL431A, TL431B . . . D (SOIC) PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
CATHODE
NC
NC
NC
REF
NC
ANODE
NC
TL431, TL431A, TL431B . . . P (PDIP), PS (SOP),
OR PW (TSSOP) PACKAGE
(TOP VIEW)
NC − No internal connection
TL431, TL431A, TL431B . . . DBV (SOT-23-5) PACKAGE
(TOP VIEW)
1
2
3
5
4
NC
†
CATHODE
ANODE
REF
TL431, TL431A, TL431B . . . PK (SOT-89) PACKAGE
(TOP VIEW)
REF
ANODE
CATHODE
†Pin 2 is attached to Substrate and must be
connected to ANODE or left open.
NC − No internal connection
TL432, TL432A, TL432B . . . DBV (SOT-23-5) PACKAGE
(TOP VIEW)
1
2
3
5
4
NC
ANODE
NC
REF
CATHODE
NC − No internal connection
TL431, TL431A, TL431B . . . DBZ (SOT-23-3) PACKAGE
(TOP VIEW)
TL432, TL432A, TL432B . . . DBZ (SOT-23-3) PACKAGE
(TOP VIEW)
NC − No internal connection
1
2
3
REF
CATHODE
ANODE
1
2
3
CATHODE
REF
ANODE
ANODE
TL432, TL432A, TL432B . . . PK (SOT-89) PACKAGE
(TOP VIEW)
REF
ANODE
CATHODE
ANODE
CATHODE
ANODE
REF
TL431 . . . KTP (PowerFLEX /TO-252) PACKAGE
(TOP VIEW)
ANODE
TL431A, TL431B . . . DCK (SC-70) PACKAGE
(TOP VIEW)
1
2
3
6
5
4
CATHODE
NC
REF
ANODE
NC
NC
NC − No internal connection
TL431, TL431A, TL431B . . . LP (TO-92/TO-226) PACKAGE
(TOP VIEW)
CATHODE
ANODE
REF
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
6 Pin Configuration and Functions
Pin Functions
PIN
TLV431x TLV432x TYPE DESCRIPTION
NAME P, PS
DBZ DBV PK D LP KTP DCK DBZ DBV PK
PW
CATHODE 1 3 3 1 1 1 1 1 2 4 1 I/O Shunt Current/Voltage input
REF 2 4 1 8 8 3 3 3 1 5 3 I Threshold relative to common anode
2, 3,
ANODE 3 5 2 6 2 2 6 3 2 2 O Common pin, normally connected to ground
6, 7
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VKA Cathode voltage(2) 37 V
IKA Continuous cathode current range –100 150 mA
II(ref) Reference input current range –0.05 10 mA
TJOperating virtual junction temperature 150 °C
Tstg Storage temperature range –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to ANODE, unless otherwise noted.
7.2 ESD Ratings VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000
V(ESD) Electrostatic discharge V
Charged-device model (CDM), per JEDEC specification JESD22- ±1000
C101(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions.
7.3 Thermal Information TL43xx
THERMAL METRIC(1) P PW D PS DCK DBV DBZ LP PK UNIT
8 PINS 6 PINS 5 PINS 3 PINS
RθJA Junction-to-ambient thermal 85 149 97 95 259 206 206 140 52
resistance °C/W
RθJC(top) Junction-to-case (top) thermal 57 65 39 46 87 131 76 55 9
resistance
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953).
7.4 Recommended Operating Conditions
See(1)
MIN MAX UNIT
VKA Cathode voltage Vref 36 V
IKA Cathode current 1 100 mA
TL43xxC 0 70
TAOperating free-air temperature TL43xxI –40 85 °C
TL43xxQ –40 125
(1) Maximum power dissipation is a function of TJ(max),θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD= (TJ(max) – TA)/θJA. Operating at the absolute maximum TJof 150°C can affect reliability.
4Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
R2
R1
|z |
KA
(
1 +
(
∆I
∆V
|z'| =
∆IKA
∆VKA
|z | =
KA
(2) The dynamic impedance is defined as:
When the device is operating with two external resistors (see Figure 21), the total dynamic impedance of the circuit is given by:
which is approximately equal to .
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
7.5 Electrical Characteristics, TL431C, TL432C
over recommended operating conditions, TA= 25°C (unless otherwise noted) TL431C, TL432C
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage See Figure 20 VKA = Vref, IKA = 10 mA 2440 2495 2550 mV
SOT23-3 and TL432
Deviation of reference input 6 16
VKA = Vref,devices
VI(dev) voltage over full temperature See Figure 20 mV
IKA = 10 mA,
range(1) All other devices 4 25
Ratio of change in reference ΔVKA = 10 V – Vref –1.4 –2.7
ΔVref /voltage to the change in See Figure 21 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V – 10 V –1 –2
cathode voltage
Iref Reference input current See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞2 4 µA
Deviation of reference input
II(dev) current over full temperature See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞0.4 1.2 µA
range(1)
Minimum cathode current for
Imin See Figure 20 VKA = Vref 0.4 1 mA
regulation
Ioff Off-state cathode current See Figure 22 VKA = 36 V, Vref = 0 0.1 1 µA
|zKA| Dynamic impedance(2) See Figure 20 VKA = Vref, f ≤1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
R2
R1
|z |
KA
(
1 +
(
∆I
∆V
|z'| =
∆IKA
∆VKA
|z | =
KA
(2) The dynamic impedance is defined as:
When the device is operating with two external resistors (see Figure 21), the total dynamic impedance of the circuit is given by:
which is approximately equal to .
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
7.6 Electrical Characteristics, TL431I, TL432I
over recommended operating conditions, TA= 25°C (unless otherwise noted) TL431I, TL432I
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage See Figure 20 VKA = Vref, IKA = 10 mA 2440 2495 2550 mV
SOT23-3 and TL432
Deviation of reference input 14 34
VKA = Vref,devices
VI(dev) voltage over full temperature See Figure 20 mV
IKA = 10 mA
range(1) All other devices 5 50
Ratio of change in reference ΔVKA = 10 V – Vref –1.4 –2.7
ΔVref /voltage to the change in See Figure 21 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V – 10 V –1 –2
cathode voltage
Iref Reference input current See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞2 4 µA
Deviation of reference input
II(dev) current over full temperature See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞0.8 2.5 µA
range(1)
Minimum cathode current for
Imin See Figure 20 VKA = Vref 0.4 1 mA
regulation
Ioff Off-state cathode current See Figure 22 VKA = 36 V, Vref = 0 0.1 1 µA
|zKA| Dynamic impedance(2) See Figure 20 VKA = Vref, f ≤1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
6Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
R2
R1
|z |
KA
(
1 +
(
∆I
∆V
|z'| =
∆IKA
∆VKA
|z | =
KA
(2) The dynamic impedance is defined as:
When the device is operating with two external resistors (see Figure 21), the total dynamic impedance of the circuit is given by:
which is approximately equal to .
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
7.7 Electrical Characteristics, TL431Q, TL432Q
over recommended operating conditions, TA= 25°C (unless otherwise noted) TL431Q, TL432Q
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage See Figure 20 VKA = Vref, IKA = 10 mA 2440 2495 2550 mV
Deviation of reference input
VI(dev) voltage over full temperature See Figure 20 VKA = Vref, IKA = 10 mA 14 34 mV
range(1)
Ratio of change in reference ΔVKA = 10 V – Vref –1.4 –2.7
ΔVref /voltage to the change in See Figure 21 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V – 10 V –1 –2
cathode voltage
Iref Reference input current See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞2 4 µA
Deviation of reference input
II(dev) current over full temperature See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞0.8 2.5 µA
range(1)
Minimum cathode current for
Imin See Figure 20 VKA = Vref 0.4 1 mA
regulation
Ioff Off-state cathode current See Figure 22 VKA = 36 V, Vref = 0 0.1 1 µA
|zKA| Dynamic impedance(2) See Figure 20 VKA = Vref, f ≤1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
R2
R1
|z |
KA
(
1 +
(
∆I
∆V
|z'| =
∆IKA
∆VKA
|z | =
KA
(2) The dynamic impedance is defined as:
When the device is operating with two external resistors (see Figure 21), the total dynamic impedance of the circuit is given by:
which is approximately equal to .
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
7.8 Electrical Characteristics, TL431AC, TL432AC
over recommended operating conditions, TA= 25°C (unless otherwise noted) TL431AC, TL432AC
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage See Figure 20 VKA = Vref, IKA = 10 mA 2470 2495 2520 mV
SOT23-3 and TL432
Deviation of reference input 6 16
VKA = Vref,devices
VI(dev) voltage over full temperature See Figure 20 mV
IKA = 10 mA
range(1) All other devices 4 25
Ratio of change in reference ΔVKA = 10 V – Vref –1.4 –2.7
ΔVref /voltage to the change in See Figure 21 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V – 10 V –1 –2
cathode voltage
Iref Reference input current See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞2 4 µA
Deviation of reference input
II(dev) current over full temperature See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞0.8 1.2 µA
range(1)
Minimum cathode current for
Imin See Figure 20 VKA = Vref 0.4 0.6 mA
regulation
Ioff Off-state cathode current See Figure 22 VKA = 36 V, Vref = 0 0.1 0.5 µA
|zKA| Dynamic impedance(2) See Figure 20 VKA = Vref, f ≤1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
8Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
R2
R1
|z |
KA
(
1 +
(
∆I
∆V
|z'| =
∆IKA
∆VKA
|z | =
KA
(2) The dynamic impedance is defined as:
When the device is operating with two external resistors (see Figure 21), the total dynamic impedance of the circuit is given by:
which is approximately equal to .
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
7.9 Electrical Characteristics, TL431AI, TL432AI
over recommended operating conditions, TA= 25°C (unless otherwise noted) TL431AI, TL432AI
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage See Figure 20 VKA = Vref, IKA = 10 mA 2470 2495 2520 mV
SOT23-3 and TL432
Deviation of reference input 14 34
VKA = Vref,devices
VI(dev) voltage over full temperature See Figure 20 mV
IKA = 10 mA
range(1) All other devices 5 50
Ratio of change in reference ΔVKA = 10 V – Vref –1.4 –2.7
ΔVref /voltage to the change in See Figure 21 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V – 10 V –1 –2
cathode voltage
Iref Reference input current See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞2 4 µA
Deviation of reference input
II(dev) current over full temperature See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞0.8 2.5 µA
range(1)
Minimum cathode current for
Imin See Figure 20 VKA = Vref 0.4 0.7 mA
regulation
Ioff Off-state cathode current See Figure 22 VKA = 36 V, Vref = 0 0.1 0.5 µA
|zKA| Dynamic impedance(2) See Figure 20 VKA = Vref, f ≤1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
R2
R1
|z |
KA
(
1 +
(
∆I
∆V
|z'| =
∆IKA
∆VKA
|z | =
KA
(2) The dynamic impedance is defined as:
When the device is operating with two external resistors (see Figure 21), the total dynamic impedance of the circuit is given by:
which is approximately equal to .
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
7.10 Electrical Characteristics, TL431AQ, TL432AQ
over recommended operating conditions, TA= 25°C (unless otherwise noted) TL431AQ, TL432AQ
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage See Figure 20 VKA = Vref, IKA = 10 mA 2470 2495 2520 mV
Deviation of reference input
VI(dev) voltage over full temperature See Figure 20 VKA = Vref, IKA = 10 mA 14 34 mV
range(1)
Ratio of change in reference ΔVKA = 10 V – Vref –1.4 –2.7
ΔVref /voltage to the change in See Figure 21 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V – 10 V –1 –2
cathode voltage
Iref Reference input current See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞2 4 µA
Deviation of reference input
II(dev) current over full temperature See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞0.8 2.5 µA
range(1)
Minimum cathode current for
Imin See Figure 20 VKA = Vref 0.4 0.7 mA
regulation
Ioff Off-state cathode current See Figure 22 VKA = 36 V, Vref = 0 0.1 0.5 µA
|zKA| Dynamic impedance(2) See Figure 20 VKA = Vref, f ≤1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
10 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
R2
R1
|z |
KA
(
1 +
(
∆I
∆V
|z'| =
∆IKA
∆VKA
|z | =
KA
(2) The dynamic impedance is defined as:
When the device is operating with two external resistors (see Figure 21), the total dynamic impedance of the circuit is given by:
which is approximately equal to .
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
7.11 Electrical Characteristics, TL431BC, TL432BC
over recommended operating conditions, TA= 25°C (unless otherwise noted) TL431BC, TL432BC
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage See Figure 20 VKA = Vref, IKA = 10 mA 2483 2495 2507 mV
Deviation of reference input
VI(dev) voltage over full temperature See Figure 20 VKA = Vref, IKA = 10 mA 6 16 mV
range(1)
Ratio of change in reference ΔVKA = 10 V – Vref –1.4 –2.7
ΔVref /voltage to the change in See Figure 21 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V – 10 V – –2
cathode voltage
Iref Reference input current See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞2 4 µA
Deviation of reference input
II(dev) current over full temperature See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞0.8 1.2 µA
range(1)
Minimum cathode current for
Imin See Figure 20 VKA = Vref 0.4 0.6 mA
regulation
Ioff Off-state cathode current See Figure 22 VKA = 36 V, Vref = 0 0.1 0.5 µA
|zKA| Dynamic impedance(2) See Figure 20 VKA = Vref, f ≤1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
R2
R1
|z |
KA
(
1 +
(
∆I
∆V
|z'| =
∆IKA
∆VKA
|z | =
KA
(2) The dynamic impedance is defined as:
When the device is operating with two external resistors (see Figure 21), the total dynamic impedance of the circuit is given by:
which is approximately equal to .
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
7.12 Electrical Characteristics, TL431BI, TL432BI
over recommended operating conditions, TA= 25°C (unless otherwise noted) TL431BI, TL432BI
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage See Figure 20 VKA = Vref, IKA = 10 mA 2483 2495 2507 mV
Deviation of reference input
VI(dev) voltage over full temperature See Figure 20 VKA = Vref, IKA = 10 mA 14 34 mV
range(1)
Ratio of change in reference ΔVKA = 10 V – Vref –1.4 –2.7
ΔVref /voltage to the change in See Figure 21 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V – 10 V –1 –2
cathode voltage
Iref Reference input current See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞2 4 µA
Deviation of reference input
II(dev) current over full temperature See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞0.8 2.5 µA
range(1)
Minimum cathode current for
Imin See Figure 20 VKA = Vref 0.4 0.7 mA
regulation
Ioff Off-state cathode current See Figure 22 VKA = 36 V, Vref = 0 0.1 0.5 µA
|zKA| Dynamic impedance(2) See Figure 20 VKA = Vref, f ≤1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
12 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
R2
R1
|z |
KA
(
1 +
(
∆I
∆V
|z'| =
∆IKA
∆VKA
|z | =
KA
(2) The dynamic impedance is defined as:
When the device is operating with two external resistors (see Figure 21), the total dynamic impedance of the circuit is given by:
which is approximately equal to .
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
7.13 Electrical Characteristics, TL431BQ, TL432BQ
over recommended operating conditions, TA= 25°C (unless otherwise noted) TL431BQ, TL432BQ
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage See Figure 20 VKA = Vref, IKA = 10 mA 2483 2495 2507 mV
Deviation of reference input
VI(dev) voltage over full temperature See Figure 20 VKA = Vref, IKA = 10 mA 14 34 mV
range(1)
Ratio of change in reference ΔVKA = 10 V – Vref –1.4 –2.7
ΔVref /voltage to the change in See Figure 21 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V – 10 V –1 –2
cathode voltage
Iref Reference input current See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞2 4 µA
Deviation of reference input
II(dev) current over full temperature See Figure 21 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞0.8 2.5 µA
range(1)
Minimum cathode current for
Imin See Figure 20 VKA = Vref 0.4 0.7 mA
regulation
Ioff Off-state cathode current See Figure 22 VKA = 36 V, Vref = 0 0.1 0.5 µA
|zKA| Dynamic impedance(2) See Figure 20 VKA = Vref, f ≤1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
1.5
1
0.5
0
−75 −25 0 50
− Off-State Cathode Current −
2
2.5
100 125−50 25 75
Ioff µA
TA− Free-Air Temperature − °C
VKA = 36 V
Vref = 0
16
−1.15
−1.25
−1.35
−1.45
−1.05
− 0.95
− 0.85
TA− Free-Air Temperature − °C
−75 −25 0 50 100 125−50 25 75
VKA = 3 V to 36 V
− mV/V
∆Vref ∆VKA
/
16
400
200
0
−200
−1 0 1
600
800
2 3
VKA = Vref
TA= 25°C
VKA − Cathode Voltage − V
Imi n
− Cathode Current −IKA Aµ
25
0
−50
−75
−100
125
−25
−2 −1 0 1
75
50
100
150
2 3
VKA − Cathode Voltage − V
VKA = Vref
TA= 25°C
− Cathode Current − mA
IKA
2500
2480
2420
2400
−75 −50 −25 0 25 50 75
2540
2580
2600
100 125
2460
2560
2520
2440
TA− Free-Air Temperature − °C
Vref = 2495 mV
Vref = 2440 mV
VKA = Vref
IKA = 10 mA
Vref = 2550 mV
− Reference Voltage − mV
Vref
3
2
1
0
−75 −25 0 50
4
5
100 125
−50 25 75
TA− Free-Air Temperature − °C
R1 = 10 kΩ
R2 =∞
IKA = 10 mA
− Reference Current −ref
IµA
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
7.14 Typical Characteristics
Data at high and low temperatures are applicable only within the recommended operating free-air temperature
ranges of the various devices.
Figure 2. Reference Current vs Free-Air Temperature
Figure 1. Reference Voltage vs Free-Air Temperature
Figure 3. Cathode Current vs Cathode Voltage Figure 4. Cathode Current vs Cathode Voltage
Figure 5. Off-State Cathode Current Figure 6. Ratio of Delta Reference Voltage to Delta Cathode
Voltage vs Free-Air Temperature
vs Free-Air Temperature
14 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
9 µF
GND
Output
232 Ω
8.25 kΩ
IKA
15 kΩ
+
−
IKA = 10 mA
TA= 25°C
1 k 10 k 100 k 1 M 10 M
0
10
20
30
50
60
40
f − Frequency − Hz
IKA = 10 mA
TA= 25°C
− Small-Signal V oltage Amplification − dBA V
19.1 V
VCC
TLE2027
TLE2027
AV= 10 V/mV
VEE
0.1 µF
160 kΩ
820 Ω
(DUT)
TL431
16 Ω
910 Ω
2000 µF
1 kΩ
VEE
VCC
1 µF
16 kΩ 16 kΩ
1 µF 33 kΩ
33 kΩ
AV= 2 V/V
22 µF
500 µF
To
Oscilloscope
+
−
+
−
180
140
120
100
10 100 1 k
220
240
f − Frequency − Hz
260
10 k 100 k
200
160
− Equivalent Input Noise V oltage − nV/ Hz
Vn
IO= 10 mA
TA= 25°C
16
−1
−2
−4
−5
−6
3
−3
0 1 2 3 4 5 6
1
0
2
4
7 8 9 10
5
6
t − Time − s
f = 0.1 to 10 Hz
IKA = 10 mA
TA= 25°C
− Equivalent Input Noise V oltage − µV
Vn
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
Typical Characteristics (continued)
Figure 8. Equivalent Input Noise Voltage Over a 10-S Period
Figure 7. Equivalent Input Noise Voltage vs Frequency
Figure 9. Test Circuit for Equivalent Input Noise Voltage Over a 10-S Period
Figure 10. Small-Signal Voltage Amplification
vs Frequency Figure 11. Test Circuit for Voltage Amplification
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
150 Ω
IKA
R1 = 10 kΩ
R2
CL
VBATT
IKA
CLVBATT
150 Ω
TEST CIRCUIT FOR CURVE A
TEST CIRCUIT FOR CURVES B, C, AND D
+
−
+
−
50
40
10
0
0.001 0.01 0.1 1
70
90
100
10
30
80
60
20
TA= 25°C
B
Stable
Stable
A VKA = Vref
B VKA = 5 V
C VKA = 10 V
D VKA = 15 Vf
CL− Load Capacitance − µF
A
C
D
− Cathode Current − mA
IKA
3
2
1
0
−1 0 1 2 3 4
Input and Output V oltage − V
4
5
6
5 6 7
Input
Output
TA= 25°C
t − Time − µs
220 Ω
50 Ω
GND
Output
Pulse
Generator
f = 100 kHz
0.1
1 k 10 k 100 k 1 M 10 M
1
f − Frequency − Hz
10
100
IKA = 10 mA
TA= 25°C
− Reference Impedance −
KA
|z | Ω
1 kΩ
50 Ω
GND
Output
IKA
+
−
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
Typical Characteristics (continued)
Figure 13. Test Circuit for Reference Impedance
Figure 12. Reference Impedance vs Frequency
Figure 15. Test Circuit for Pulse Response
Figure 14. Pulse Response
The areas under the curves represent conditions that may cause the
device to oscillate. For curves B, C, and D, R2 and V+ are adjusted
to establish the initial VKA and IKA conditions, with CL= 0. VBATT and
CLthen are adjusted to determine the ranges of stability.
Figure 16. Stability Boundary Conditions for All TL431 and
TL431A Devices Figure 17. Test Circuits for Stability Boundary Conditions
(Except for SOT23-3, SC-70, and Q-Temp Devices)
16 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
150 Ω
IKA
R1 = 10 kΩ
R2
CL
VBATT
IKA
CLVBATT
150 Ω
TEST CIRCUIT FOR CURVE A
TEST CIRCUIT FOR CURVES B, C, AND D
+
−
+
−
50
40
10
0
0.001 0.01 0.1 1
70
90
100
10
30
80
60
20
Stable
A VKA = Vref
B VKA = 5 V
C VKA = 10 V
D VKA = 15 Vf
CL− Load Capacitance − µF
A
C
D
− Cathode Current − mA
IKA
B
A
TA= 25°C
Stable
B
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
Typical Characteristics (continued)
The areas under the curves represent conditions that may cause the
device to oscillate. For curves B, C, and D, R2 and V+ are adjusted
to establish the initial VKA and IKA conditions, with CL= 0. VBATT and
CLthen are adjusted to determine the ranges of stability. Figure 19. Test Circuit for Stability Boundary Conditions
Figure 18. Stability Boundary Conditions for All TL431B,
TL432, SOT-23, SC-70, and Q-Temp Devices
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
Ioff
VKA
Input
Iref
IKA
VKA
Input
Vref
R1
R2
KA ref ref
R1
V = V 1 + + I × R1
R2
æ ö
ç ÷
è ø
Vref
Input VKA
IKA
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
8 Parameter Measurement Information
Figure 20. Test Circuit for VKA = Vref
Figure 21. Test Circuit for VKA > Vref
Figure 22. Test Circuit for Ioff
18 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
ANODE
REF
CATHODE
2.4 kΩ 7.2 kΩ
3.28 kΩ
20 pF
4 kΩ
1 kΩ
800 Ω
800 Ω 800 Ω
20 pF
150 Ω
10 kΩ
CATHODE
REF
ANODE
+
_
Vref
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
9 Detailed Description
9.1 Overview
This standard device has proven ubiquity and versatility across a wide range of applications, ranging from power
to signal path. This is due to it's key components containing an accurate voltage reference & opamp, which are
very fundamental analog building blocks. TL43xx is used in conjunction with it's key components to behave as a
single voltage reference, error amplifier, voltage clamp or comparator with integrated reference.
TL43xx can be operated and adjusted to cathode voltages from 2.5V to 36V, making this part optimum for a wide
range of end equipments in industrial, auto, telecom & computing. In order for this device to behave as a shunt
regulator or error amplifier, >1mA (Imin(max)) must be supplied in to the cathode pin. Under this condition,
feedback can be applied from the Cathode and Ref pins to create a replica of the internal reference voltage.
Various reference voltage options can be purchased with initial tolerances (at 25°C) of 0.5%, 1%, and 2%. These
reference options are denoted by B (0.5%), A (1.0%) and blank (2.0%) after the TL431 or TL432. TL431 & TL432
are both functionaly, but have separate pinout options.
The TL43xxC devices are characterized for operation from 0°C to 70°C, the TL43xxI devices are characterized
for operation from –40°C to 85°C, and the TL43xxQ devices are characterized for operation from –40°C to
125°C.
9.2 Functional Block Diagram
Figure 23. Equivalent Schematic
Figure 24. Detailed Schematic
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
9.3 Feature Description
TL43xx consists of an internal reference and amplifier that outputs a sink current base on the difference between
the reference pin and the virtual internal pin. The sink current is produced by the internal Darlington pair, shown
in the above schematic (Figure 24). A Darlington pair is used in order for this device to be able to sink a
maximum current of 100 mA.
When operated with enough voltage headroom (≥2.5 V) and cathode current (IKA), TL431 forces the reference
pin to 2.5 V. However, the reference pin can not be left floating, as it needs IREF ≥4 µA (please see Electrical
Characteristics, TL431C, TL432C). This is because the reference pin is driven into an npn, which needs base
current in order operate properly.
When feedback is applied from the Cathode and Reference pins, TL43xx behaves as a Zener diode, regulating
to a constant voltage dependent on current being supplied into the cathode. This is due to the internal amplifier
and reference entering the proper operating regions. The same amount of current needed in the above feedback
situation must be applied to this device in open loop, servo or error amplifying implementations in order for it to
be in the proper linear region giving TL43xx enough gain.
Unlike many linear regulators, TL43xx is internally compensated to be stable without an output capacitor
between the cathode and anode. However, if it is desired to use an output capacitor Figure 24 can be used as a
guide to assist in choosing the correct capacitor to maintain stability.
9.4 Device Functional Modes
9.4.1 Open Loop (Comparator)
When the cathode/output voltage or current of TL43xx is not being fed back to the reference/input pin in any
form, this device is operating in open loop. With proper cathode current (Ika) applied to this device, TL43xx will
have the characteristics shown in Figure 23. With such high gain in this configuration, TL43xx is typically used as
a comparator. With the reference integrated makes TL43xx the prefered choice when users are trying to monitor
a certain level of a single signal.
9.4.2 Closed Loop
When the cathode/output voltage or current of TL43xx is being fed back to the reference/input pin in any form,
this device is operating in closed loop. The majority of applications involving TL43xx use it in this manner to
regulate a fixed voltage or current. The feedback enables this device to behave as an error amplifier, computing
a portion of the output voltage and adjusting it to maintain the desired regulation. This is done by relating the
output voltage back to the reference pin in a manner to make it equal to the internal reference voltage, which can
be accomplished via resistive or direct feedback.
20 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
+
2.5V
CATHODE
ANODE
REF
VIN
Vout
Vsup
Rsup
R1
R2
VL
RIN
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
10 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
As this device has many applications and setups, there are many situations that this datasheet can not
characterize in detail. The linked application notes will help the designer make the best choices when using this
part.
Application note SLVA482 will provide a deeper understanding of this devices stability characteristics and aid the
user in making the right choices when choosing a load capacitor. Application note SLVA445 assists designers in
setting the shunt voltage to achieve optimum accuracy for this device.
10.2 Typical Applications
10.2.1 Comparator With Integrated Reference
Figure 25. Comparator Application Schematic
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
Typical Applications (continued)
10.2.1.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 1. Design Parameters
DESIGN PARAMETER EXAMPLE VALUE
Input Voltage Range 0 V to 5 V
Input Resistance 10 kΩ
Supply Voltage 24 V
Cathode Current (Ik) 5 mA
Output Voltage Level ~2 V – VSUP
Logic Input Thresholds VIH/VIL VL
10.2.1.2 Detailed Design Procedure
When using TL431 as a comparator with reference, determine the following:
• Input Voltage Range
• Reference Voltage Accuracy
• Output logic input high and low level thresholds
• Current Source resistance
10.2.1.2.1 Basic Operation
In the configuration shown in Figure 25 TL431 will behave as a comparator, comparing the VREF pin voltage to
the internal virtual reference voltage. When provided a proper cathode current (IK), TL43xx will have enough
open loop gain to provide a quick response. This can be seen in Figure 26, where the RSUP=10 kΩ(IKA=500 µA)
situation responds much slower than RSUP=1 kΩ(IKA=5 mA). With the TL43xx's max Operating Current (IMIN)
being 1 mA, operation below that could result in low gain, leading to a slow response.
10.2.1.2.1.1 Overdrive
Slow or inaccurate responses can also occur when the reference pin is not provided enough overdrive voltage.
This is the amount of voltage that is higher than the internal virtual reference. The internal virtual reference
voltage will be within the range of 2.5 V ±(0.5%, 1.0% or 1.5%) depending on which version is being used. The
more overdrive voltage provided, the faster the TL431 will respond.
For applications where TL431 is being used as a comparator, it is best to set the trip point to greater than the
positive expected error (i.e. +1.0% for the A version). For fast response, setting the trip point to >10% of the
internal VREF should suffice.
For minimal voltage drop or difference from Vin to the ref pin, it is recommended to use an input resistor <10kΩ
to provide Iref.
22 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
Time (s)
Voltage (V)
-0.001 -0.0006 -0.0002 0.0002 0.0006 0.001
-0.5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
D001
Vin
Vka(Rsup=10k:)
Vka(Rsup=1k:)
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
10.2.1.2.2 Output Voltage and Logic Input Level
In order for TL431 to properly be used as a comparator, the logic output must be readable by the receiving logic
device. This is accomplished by knowing the input high and low level threshold voltage levels, typically denoted
by VIH & VIL.
As seen in Figure 26, TL431's output low level voltage in open-loop/comparator mode is ~2 V, which is typically
sufficient for 5V supplied logic. However, would not work for 3.3 V & 1.8 V supplied logic. In order to accomodate
this a resistive divider can be tied to the output to attenuate the output voltage to a voltage legible to the
receiving low voltage logic device.
TL431's output high voltage is equal to VSUP due to TL431 being open-collector. If VSUP is much higher than the
receiving logic's maximum input voltage tolerance, the output must be attenuated to accomadate the outgoing
logic's reliability.
When using a resistive divider on the output, be sure to make the sum of the resistive divider (R1 & R2 in
Figure 25) is much greater than RSUP in order to not interfere with TL431's ability to pull close to VSUP when
turning off.
10.2.1.2.2.1 Input Resistance
TL431 requires an input resistance in this application in order to source the reference current (IREF) needed from
this device to be in the proper operating regions while turing on. The actual voltage seen at the ref pin will be
VREF=VIN-IREF*RIN. Since IREF can be as high as 4 µA it is recommended to use a resistance small enough that
will mitigate the error that IREF creates from VIN.
10.2.1.3 Application Curves
Figure 26. Output Response With Various Cathode Currents
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
REF
CATHODE
ANODE
R2
V
SUP
RSUP
R1
VO(R1
Vr ef
0.1%
R2
0.1%
TL431
= 1 + V
ref
)
CL
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
10.2.2 Shunt Regulator/Reference
Figure 27. Shunt Regulator Schematic
10.2.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 2. Design Parameters
DESIGN PARAMETER EXAMPLE VALUE
Reference Initial Accuracy 1.0 %
Supply Voltage 24 V
Cathode Current (Ik) 5 mA
Output Voltage Level 2.5 V - 36 V
Load Capacitance 100 nF
Feedback Resistor Values and Accuracy (R1 & R2) 10 kΩ
10.2.2.2 Detailed Design Procedure
When using TL431 as a Shunt Regulator, determine the following:
• Input Voltage Range
• Temperature Range
• Total Accuracy
• Cathode Current
• Reference Initial Accuracy
• Output Capacitance
10.2.2.2.1 Programming Output/Cathode Voltage
In order to program the cathode voltage to a regulated voltage a resistive bridge must be shunted between the
cathode and anode pins with the mid point tied to the reference pin. This can be seen in Figure 27, with R1 & R2
being the resistive bridge. The cathode/output voltage in the shunt regulator configuration can be approximated
by the equation shown in Figure 27. The cathode voltage can be more accuratel determined by taking in to
account the cathode current:
Vo=(1+R1/R2)*VREF-IREF*R1
In order for this equation to be valid, TL43xx must be fully biased so that it has enough open loop gain to mitigate
any gain error. This can be done by meeting the Imin spec denoted in Electrical Characteristics, TL431C,
TL432C.
24 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
Time (s)
Voltage (V)
-5E-6 -3E-6 -1E-6 1E-6 3E-6 5E-6
-6
-3
0
3
6
9
12
15
18
21
24
27
D001
Vsup
Vka=Vref
R1=10k: & R2=10k:
R1=38k: & R2=10k:
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
10.2.2.2.2 Total Accuracy
When programming the output above unity gain (VKA=VREF), TL43xx is susceptible to other errors that may effect
the overall accuracy beyond VREF. These errors include:
• R1 and R2 accuracies
• VI(dev) - Change in reference voltage over temperature
•ΔVREF /ΔVKA - Change in reference voltage to the change in cathode voltage
• |zKA| - Dynamic impedance, causing a change in cathode voltage with cathode current
Worst case cathode voltage can be determined taking all of the variables in to account. Application note
SLVA445 assists designers in setting the shunt voltage to achieve optimum accuracy for this device.
10.2.2.2.3 Stability
Though TL43xx is stable with no capacitive load, the device that receives the shunt regulator's output voltage
could present a capacitive load that is within the TL43xx region of stability, shown inFigure 16 and Figure 18.
Also, designers may use capacitive loads to improve the transient response or for power supply decoupling.
When using additional capacitance between Cathode and Anode, refer to Figure 16 and Figure 18. Also,
application note SLVA482 will provide a deeper understanding of this devices stability characteristics and aid the
user in making the right choices when choosing a load capacitor.
10.2.2.2.4 Start-up Time
As shown in Figure 28, TL43xx has a fast response up to ~2 V and then slowly charges to it's programmed
value. This is due to the compensation capacitance (shown in Figure 24) the TL43xx has to meet it's stability
criteria. Despite the secondary delay, TL43xx still has a fast response suitable for many clamp applications.
10.2.2.3 Application Curves
Figure 28. TL43xx Start-up Response
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 25
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
VO
TL431
VI(BATT)
R1
R2
C
(see Note A)
VO
TL431
VI(BATT)
R1
R2
VO1R1
R2 Vref
=+
(
(
VO
TL431
VI(BATT)
uA7805
IN
OUT
Common R1
R2
VO1R1
R2 Vref
Minimum VOVref 5 V
=+
=+
(
(
R
(see Note A)
VO
TL431
VI(BATT)
2N222
2N222
4.7 kΩ
R1
0.1%
R2
0.1%
0.01 µF
30 Ω
O ref
R1
V = 1 + V
R2
æ ö
ç ÷
è ø
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
10.3 System Examples
A. R should provide cathode current ≥1 mA to the TL431 at minimum V(BATT).
Figure 29. Precision High-Current Series Regulator
Figure 30. Output Control of a Three-Terminal Fixed Regulator
Figure 31. High-Current Shunt Regulator
A. Refer to the stability boundary conditions in Figure 16 and Figure 18 to determine allowable values for C.
Figure 32. Crowbar Circuit
26 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
TL431
12 V
VCC
5 V
6.8 kΩ
10 kΩ
10 kΩ
0.1%
10 kΩ
0.1%
X
Not
Used
Feedback
TL598
+
−
VO≈5 V
TL431
VI(BATT)
27.4 kΩ
0.1%
Rb
(see Note A)
27.4 kΩ
0.1%
VO≈5 V, 1.5 A
TL431
VI(BATT) LM317
IN OUT
Adjust
243 Ω
0.1%
243 Ω
0.1%
8.2 kΩ
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
System Examples (continued)
Figure 33. Precision 5-V, 1.5-A Regulator
A. Rbshould provide cathode current ≥1 mA to the TL431.
Figure 34. Efficient 5-V Precision Regulator
Figure 35. PWM Converter With Reference
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 27
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
TL431
IO
RCL
0.1%
R1
VI(BATT) Iout
Vref
RCL
IKA
R1 VI(BATT)
IO
hFE
IKA
+
+
=
=
TL431
650 Ω
2 kΩ
C
On
Off
R
12 V
nref
12 V
Delay = R × C × I 12 V – V
æ ö
ç ÷
ç ÷
è ø
TL431
VI(BATT)
R3
(see Note A)
R1A R4
(see Note A)
R2BR2A
R1B
Low Limit = 1 + R1B
R2B Vref
High Limit = 1 + R1A
R2A Vref
LED on When Low Limit < VI(BATT) < High Limit
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
System Examples (continued)
A. Select R3 and R4 to provide the desired LED intensity and cathode current ≥1 mA to the TL431 at the available
VI(BATT).
Figure 36. Voltage Monitor
Figure 37. Delay Timer
Figure 38. Precision Current Limiter
28 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
TL432 - DBZ
(TOP VIEW)
REF
1
CATHODE
2
3
ANODE
Rsup
Rref
Vsup
CL
Vin
GND
GND
TL431
RS
0.1%
IO
VI(BATT)
IO
Vref
RS
=
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
www.ti.com
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
System Examples (continued)
Figure 39. Precision Constant-Current Sink
11 Power Supply Recommendations
When using TL43xx as a Linear Regulator to supply a load, designers will typically use a bypass capacitor on the
output/cathode pin. When doing this, be sure that the capacitance is within the stability criteria shown in
Figure 16 and Figure 18.
In order to not exceed the maximum cathode current, be sure that the supply voltage is current limited. Also, be
sure to limit the current being driven into the Ref pin, as not to exceed it's absolute maximum rating.
For applications shunting high currents, pay attention to the cathode and anode trace lengths, adjusting the width
of the traces to have the proper current density.
12 Layout
12.1 Layout Guidelines
Bypass capacitors should be placed as close to the part as possible. Current-carrying traces need to have widths
appropriate for the amount of current they are carrying; in the case of the TL43xx, these currents will be low.
12.2 Layout Example
Figure 40. DBZ Layout example
Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 29
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
TL431
,
TL431A
,
TL431B
TL432
,
TL432A
,
TL432B
SLVS543O –AUGUST 2004–REVISED JANUARY 2015
www.ti.com
13 Device and Documentation Support
13.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 3. Related Links
TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY DOCUMENTS SOFTWARE COMMUNITY
TL431 Click here Click here Click here Click here Click here
TL431A Click here Click here Click here Click here Click here
TL431B Click here Click here Click here Click here Click here
TL432 Click here Click here Click here Click here Click here
TL432A Click here Click here Click here Click here Click here
TL432B Click here Click here Click here Click here Click here
13.2 Trademarks
All trademarks are the property of their respective owners.
13.3 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.4 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
30 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TL431 TL431A TL431B TL432 TL432A TL432B
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL431ACD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 431AC
TL431ACDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 (TACG, TACS)
TL431ACDBVRE4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TACG
TL431ACDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TACG
TL431ACDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 (TACG, TACU)
TL431ACDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (TAC3, TACS, TACU)
TL431ACDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (TAC3, TACS, TACU)
TL431ACDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (TAC3, TACS, TACU)
TL431ACDBZTG4 ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (TAC3, TACS, TACU)
TL431ACDCKR ACTIVE SC70 DCK 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (T4S, T4U)
TL431ACDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 431AC
TL431ACDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 431AC
TL431ACDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 431AC
TL431ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 431AC
TL431ACLP ACTIVE TO-92 LP 3 1000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 TL431AC
TL431ACLPE3 ACTIVE TO-92 LP 3 1000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 TL431AC
TL431ACLPM ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 TL431AC
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL431ACLPME3 ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 TL431AC
TL431ACLPR ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 TL431AC
TL431ACLPRE3 ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 TL431AC
TL431ACP ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type 0 to 70 TL431ACP
TL431ACPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR 0 to 70 4A
TL431ACPKG3 ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR 0 to 70 4A
TL431ACPSR ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T431A
TL431ACPW ACTIVE TSSOP PW 8 150 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T431A
TL431ACPWR ACTIVE TSSOP PW 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T431A
TL431AID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 431AI
TL431AIDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 (TAIG, TAIS)
TL431AIDBVRE4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TAIG
TL431AIDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TAIG
TL431AIDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 (TAIG, TAIU)
TL431AIDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TAIG
TL431AIDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (TAI3, TAIS, TAIU)
TL431AIDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (TAI3, TAIS, TAIU)
TL431AIDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (TAI3, TAIS, TAIU)
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 3
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL431AIDBZTG4 ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (TAI3, TAIS, TAIU)
TL431AIDCKR ACTIVE SC70 DCK 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 T5U
TL431AIDCKRE4 ACTIVE SC70 DCK 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 T5U
TL431AIDCKT ACTIVE SC70 DCK 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 T5U
TL431AIDCKTG4 ACTIVE SC70 DCK 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 T5U
TL431AIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 431AI
TL431AIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 431AI
TL431AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 431AI
TL431AILP ACTIVE TO-92 LP 3 1000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 TL431AI
TL431AILPE3 ACTIVE TO-92 LP 3 1000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 TL431AI
TL431AILPM ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 TL431AI
TL431AILPME3 ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 TL431AI
TL431AILPR ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 TL431AI
TL431AILPRE3 ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 TL431AI
TL431AIP ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 TL431AIP
TL431AIPE4 ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 TL431AIP
TL431AIPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 85 4B
TL431AIPKG3 ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 85 4B
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 4
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL431AQDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (TAQG, TAQU)
TL431AQDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (TAQG, TAQU)
TL431AQDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (TAQ3, TAQS, TAQU)
TL431AQDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (TAQ3, TAQS, TAQU)
TL431AQDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (TAQS, TAQU)
TL431AQDBZTG4 ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (TAQS, TAQU)
TL431AQDCKR ACTIVE SC70 DCK 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T7U
TL431AQDCKT ACTIVE SC70 DCK 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T7U
TL431AQPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 4D
TL431AQPKG3 ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 4D
TL431BCD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T431B
TL431BCDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 (T3GG, T3GU)
TL431BCDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 (T3GG, T3GU)
TL431BCDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T3GG
TL431BCDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (T3G3, T3GS, T3GU)
TL431BCDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (T3G3, T3GS, T3GU)
TL431BCDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (T3G3, T3GS, T3GU)
TL431BCDBZTG4 ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (T3G3, T3GS, T3GU)
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 5
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL431BCDCKR ACTIVE SC70 DCK 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T2U
TL431BCDCKT ACTIVE SC70 DCK 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T2U
TL431BCDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T431B
TL431BCDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T431B
TL431BCDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T431B
TL431BCLP ACTIVE TO-92 LP 3 1000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 T431B
TL431BCLPE3 ACTIVE TO-92 LP 3 1000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 T431B
TL431BCLPR ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 T431B
TL431BCP ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type 0 to 70 TL431BCP
TL431BCPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR 0 to 70 4C
TL431BCPKG3 ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR 0 to 70 4C
TL431BCPSR ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T431B
TL431BCPWR ACTIVE TSSOP PW 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T431B
TL431BID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 Z431B
TL431BIDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 (T3FG, T3FU)
TL431BIDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 (T3FG, T3FU)
TL431BIDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 T3FG
TL431BIDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T3F3, T3FS, T3FU)
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 6
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL431BIDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T3F3, T3FS, T3FU)
TL431BIDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T3F3, T3FS, T3FU)
TL431BIDBZTG4 ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T3F3, T3FS, T3FU)
TL431BIDCKR ACTIVE SC70 DCK 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 T3U
TL431BIDCKT ACTIVE SC70 DCK 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 T3U
TL431BIDCKTE4 ACTIVE SC70 DCK 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 T3U
TL431BIDCKTG4 ACTIVE SC70 DCK 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 T3U
TL431BIDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 Z431B
TL431BIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 Z431B
TL431BIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 Z431B
TL431BIDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 Z431B
TL431BIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 Z431B
TL431BILP ACTIVE TO-92 LP 3 1000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 Z431B
TL431BILPE3 ACTIVE TO-92 LP 3 1000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 Z431B
TL431BILPR ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 Z431B
TL431BILPRE3 ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 Z431B
TL431BIP ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 TL431BIP
TL431BIPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 85 4I
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 7
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL431BIPKG3 ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 85 4I
TL431BQD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T431BQ
TL431BQDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T3HU
TL431BQDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T3HU
TL431BQDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T3HU
TL431BQDBVTE4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T3HU
TL431BQDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T3H3, T3HS, T3HU)
TL431BQDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T3H3, T3HS, T3HU)
TL431BQDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T3HS, T3HU)
TL431BQDBZTG4 ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T3HS, T3HU)
TL431BQDCKR ACTIVE SC70 DCK 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T8U
TL431BQDCKT ACTIVE SC70 DCK 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T8U
TL431BQDCKTE4 ACTIVE SC70 DCK 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T8U
TL431BQDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T431BQ
TL431BQDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T431BQ
TL431BQDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T431BQ
TL431BQLP ACTIVE TO-92 LP 3 1000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 125 T431BQ
TL431BQLPM ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 125 T431BQ
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 8
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL431BQLPME3 ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 125 T431BQ
TL431BQLPR ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 125 T431BQ
TL431BQLPRE3 ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 125 T431BQ
TL431BQPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 3H
TL431BQPKG3 ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 3H
TL431BQPSR PREVIEW SO PS 8 2000 TBD Call TI Call TI -40 to 125
TL431CD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL431C
TL431CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 (T3CG, T3CS)
TL431CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 (T3CG, T3CS)
TL431CDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T3CG
TL431CDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (T3C3, T3CS, T3CU)
TL431CDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (T3C3, T3CS, T3CU)
TL431CDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (T3CS, T3CU)
TL431CDBZTG4 ACTIVE SOT-23 DBZ 3 250 TBD Call TI Call TI 0 to 70 (T3CS, T3CU)
TL431CDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL431C
TL431CDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL431C
TL431CDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 TL431C
TL431CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL431C
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 9
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL431CLP ACTIVE TO-92 LP 3 1000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 TL431C
TL431CLPE3 ACTIVE TO-92 LP 3 1000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 TL431C
TL431CLPM ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 TL431C
TL431CLPME3 ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 TL431C
TL431CLPR ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 TL431C
TL431CLPRE3 ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type 0 to 70 TL431C
TL431CP ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type 0 to 70 TL431CP
TL431CPE4 ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type 0 to 70 TL431CP
TL431CPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR 0 to 70 43
TL431CPKG3 ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR 0 to 70 43
TL431CPSR ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T431
TL431CPSRG4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T431
TL431CPWR ACTIVE TSSOP PW 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T431
TL431ID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL431I
TL431IDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 (T3IG, T3IS)
TL431IDBVRE4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 T3IG
TL431IDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 T3IG
TL431IDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 (T3IG, T3IU)
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 10
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL431IDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T3I3, T3IS, T3IU)
TL431IDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T3I3, T3IS, T3IU)
TL431IDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T3IS, T3IU)
TL431IDBZTG4 ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T3IS, T3IU)
TL431IDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL431I
TL431IDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 TL431I
TL431IDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL431I
TL431IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL431I
TL431ILP ACTIVE TO-92 LP 3 1000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 TL431I
TL431ILPE3 ACTIVE TO-92 LP 3 1000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 TL431I
TL431ILPR ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 TL431I
TL431ILPRE3 ACTIVE TO-92 LP 3 2000 Pb-Free
(RoHS) CU SN N / A for Pkg Type -40 to 85 TL431I
TL431IP ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 TL431IP
TL431IPE4 ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 TL431IP
TL431IPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 85 3I
TL431IPKG3 ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 85 3I
TL431QD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T431Q
TL431QDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 125 (T3QG, T3QU)
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 11
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL431QDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T3QG
TL431QDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 125 (T3QG, T3QU)
TL431QDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T3Q3, T3QS, T3QU)
TL431QDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T3Q3, T3QS, T3QU)
TL431QDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T3QS, T3QU)
TL431QDBZTG4 ACTIVE SOT-23 DBZ 3 250 TBD Call TI Call TI -40 to 125 (T3QS, T3QU)
TL431QDCKR ACTIVE SC70 DCK 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T6U
TL431QDCKT ACTIVE SC70 DCK 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T6U
TL431QDCKTG4 ACTIVE SC70 DCK 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T6U
TL431QDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T431Q
TL431QPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 3Q
TL431QPKG3 ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 3Q
TL432ACDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 (T4BG, T4BU)
TL432ACDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (T4B3, T4BS, T4BU)
TL432ACDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (T4B3, T4BS, T4BU)
TL432ACDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (T4BS, T4BU)
TL432ACDBZTG4 ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (T4BS, T4BU)
TL432AIDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 (T4AG, T4AU)
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 12
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL432AIDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T4A3, T4AS, T4AU)
TL432AIDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T4A3, T4AS, T4AU)
TL432AIDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T4A3, T4AS, T4AU)
TL432AIDBZTG4 ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T4A3, T4AS, T4AU)
TL432AIPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 85 2E
TL432AQDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T4DU
TL432AQDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T4DU
TL432AQDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 T4DU
TL432AQDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T4D3, T4DS, T4DU)
TL432AQDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T4D3, T4DS, T4DU)
TL432AQDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T4DS, T4DU)
TL432AQDBZTG4 ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T4DS, T4DU)
TL432AQPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 2F
TL432AQPKG3 ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 2F
TL432BCDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TBCU
TL432BCDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (TBCS, TBCU)
TL432BCDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (TBCS, TBCU)
TL432BCDBZTG4 ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (TBCS, TBCU)
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 13
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL432BCPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR 0 to 70 2G
TL432BIDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T4F3, T4FS, T4FU)
TL432BIDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T4F3, T4FS, T4FU)
TL432BIDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T4F3, T4FS, T4FU)
TL432BIDBZTG4 ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T4F3, T4FS, T4FU)
TL432BIPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 85 2H
TL432BQDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T4H3, T4HS, T4HU)
TL432BQDBZRG4 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T4H3, T4HS, T4HU)
TL432BQPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 2J
TL432CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 (T4CG, T4CU)
TL432CDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 (T4CS, T4CU)
TL432CPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR 0 to 70 2A
TL432IDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 (T4IG, T4IU)
TL432IDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T4IS, T4IU)
TL432IDBZT ACTIVE SOT-23 DBZ 3 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (T4IS, T4IU)
TL432IPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 85 2B
TL432QDBZR ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (T4QS, T4QU)
TL432QPK ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 2C
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 14
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL432QPKG3 ACTIVE SOT-89 PK 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 2C
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TL431A, TL431B, TL432A, TL432B :
•Automotive: TL431A-Q1, TL431B-Q1, TL432A-Q1, TL432B-Q1
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 15
NOTE: Qualified Version Definitions:
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TL431ACDBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
TL431ACDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TL431ACDBVRG4 SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TL431ACDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431ACDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431ACDBZR SOT-23 DBZ 3 3000 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL431ACDBZT SOT-23 DBZ 3 250 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL431ACDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431ACDCKR SC70 DCK 6 3000 180.0 8.4 2.41 2.41 1.2 4.0 8.0 Q3
TL431ACDR SOIC D 8 2500 330.0 12.8 6.4 5.2 2.1 8.0 12.0 Q1
TL431ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL431ACDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL431ACPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL431ACPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
TL431ACPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1
TL431AIDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431AIDBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
TL431AIDBVRG4 SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Aug-2018
Pack Materials-Page 1
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TL431AIDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431AIDBVTG4 SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431AIDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431AIDBZR SOT-23 DBZ 3 3000 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL431AIDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431AIDBZT SOT-23 DBZ 3 250 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL431AIDCKR SC70 DCK 6 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TL431AIDCKT SC70 DCK 6 250 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TL431AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL431AIDR SOIC D 8 2500 330.0 12.8 6.4 5.2 2.1 8.0 12.0 Q1
TL431AIDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL431AIPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL431AQDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431AQDBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TL431AQDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431AQDBZRG4 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431AQDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431AQDBZTG4 SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431AQDCKR SC70 DCK 6 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TL431AQDCKT SC70 DCK 6 250 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TL431AQPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL431BCDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431BCDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431BCDBVTG4 SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431BCDBZR SOT-23 DBZ 3 3000 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL431BCDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431BCDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431BCDBZT SOT-23 DBZ 3 250 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL431BCDCKR SC70 DCK 6 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TL431BCDCKT SC70 DCK 6 250 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TL431BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL431BCPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL431BCPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
TL431BCPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1
TL431BIDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431BIDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431BIDBVTG4 SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431BIDBZR SOT-23 DBZ 3 3000 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL431BIDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431BIDBZT SOT-23 DBZ 3 250 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL431BIDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431BIDCKR SC70 DCK 6 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TL431BIDCKT SC70 DCK 6 250 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Aug-2018
Pack Materials-Page 2
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TL431BIDR SOIC D 8 2500 330.0 12.8 6.4 5.2 2.1 8.0 12.0 Q1
TL431BIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL431BIDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL431BIPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL431BQDBVR SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TL431BQDBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TL431BQDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431BQDBZR SOT-23 DBZ 3 3000 179.0 8.4 3.15 2.95 1.22 4.0 8.0 Q3
TL431BQDBZRG4 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431BQDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431BQDBZTG4 SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431BQDCKR SC70 DCK 6 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TL431BQDCKT SC70 DCK 6 250 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TL431BQDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL431CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431CDBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
TL431CDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431CDBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
TL431CDBVTG4 SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431CDBZR SOT-23 DBZ 3 3000 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL431CDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431CDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL431CDR SOIC D 8 2500 330.0 12.8 6.4 5.2 2.1 8.0 12.0 Q1
TL431CDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL431CPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL431CPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
TL431CPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1
TL431IDBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
TL431IDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431IDBVRG4 SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431IDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431IDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431IDBZR SOT-23 DBZ 3 3000 179.0 8.4 3.15 2.95 1.22 4.0 8.0 Q3
TL431IDBZRG4 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431IDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431IDBZTG4 SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL431IDR SOIC D 8 2500 330.0 12.8 6.4 5.2 2.1 8.0 12.0 Q1
TL431IDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL431IPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL431QDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431QDBVRG4 SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Aug-2018
Pack Materials-Page 3
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TL431QDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL431QDBZR SOT-23 DBZ 3 3000 179.0 8.4 3.15 2.95 1.22 4.0 8.0 Q3
TL431QDBZRG4 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431QDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL431QDCKR SC70 DCK 6 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TL431QDCKT SC70 DCK 6 250 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TL431QDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL432ACDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL432ACDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432ACDBZRG4 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432ACDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432ACDBZTG4 SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432AIDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL432AIDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432AIDBZR SOT-23 DBZ 3 3000 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL432AIDBZT SOT-23 DBZ 3 250 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL432AIDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432AIPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL432AQDBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TL432AQDBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TL432AQDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432AQDBZRG4 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432AQDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432AQDBZTG4 SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432AQPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL432BCDBVR SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TL432BCDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432BCDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432BCDBZTG4 SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432BCPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL432BIDBZR SOT-23 DBZ 3 3000 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL432BIDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432BIDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432BIDBZT SOT-23 DBZ 3 250 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL432BIPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL432BQDBZR SOT-23 DBZ 3 3000 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TL432BQDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432BQPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL432CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL432CDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432CPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL432IDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TL432IDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Aug-2018
Pack Materials-Page 4
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TL432IDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432IPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TL432QDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TL432QPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL431ACDBVR SOT-23 DBV 5 3000 183.0 183.0 20.0
TL431ACDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431ACDBVRG4 SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431ACDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431ACDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL431ACDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL431ACDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
TL431ACDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL431ACDCKR SC70 DCK 6 3000 183.0 183.0 20.0
TL431ACDR SOIC D 8 2500 364.0 364.0 27.0
TL431ACDR SOIC D 8 2500 340.5 338.1 20.6
TL431ACDRG4 SOIC D 8 2500 340.5 338.1 20.6
TL431ACPK SOT-89 PK 3 1000 340.0 340.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Aug-2018
Pack Materials-Page 5
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL431ACPSR SO PS 8 2000 367.0 367.0 38.0
TL431ACPWR TSSOP PW 8 2000 367.0 367.0 35.0
TL431AIDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431AIDBVR SOT-23 DBV 5 3000 183.0 183.0 20.0
TL431AIDBVRG4 SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431AIDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431AIDBVTG4 SOT-23 DBV 5 250 180.0 180.0 18.0
TL431AIDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL431AIDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL431AIDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL431AIDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
TL431AIDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TL431AIDCKT SC70 DCK 6 250 203.0 203.0 35.0
TL431AIDR SOIC D 8 2500 340.5 338.1 20.6
TL431AIDR SOIC D 8 2500 364.0 364.0 27.0
TL431AIDRG4 SOIC D 8 2500 340.5 338.1 20.6
TL431AIPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL431AQDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431AQDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431AQDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL431AQDBZRG4 SOT-23 DBZ 3 3000 202.0 201.0 28.0
TL431AQDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL431AQDBZTG4 SOT-23 DBZ 3 250 183.0 183.0 20.0
TL431AQDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TL431AQDCKT SC70 DCK 6 250 203.0 203.0 35.0
TL431AQPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL431BCDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431BCDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431BCDBVTG4 SOT-23 DBV 5 250 180.0 180.0 18.0
TL431BCDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL431BCDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL431BCDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL431BCDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
TL431BCDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TL431BCDCKT SC70 DCK 6 250 203.0 203.0 35.0
TL431BCDR SOIC D 8 2500 340.5 338.1 20.6
TL431BCPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL431BCPSR SO PS 8 2000 367.0 367.0 38.0
TL431BCPWR TSSOP PW 8 2000 367.0 367.0 35.0
TL431BIDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431BIDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431BIDBVTG4 SOT-23 DBV 5 250 180.0 180.0 18.0
TL431BIDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL431BIDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Aug-2018
Pack Materials-Page 6
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL431BIDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
TL431BIDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL431BIDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TL431BIDCKT SC70 DCK 6 250 203.0 203.0 35.0
TL431BIDR SOIC D 8 2500 364.0 364.0 27.0
TL431BIDR SOIC D 8 2500 340.5 338.1 20.6
TL431BIDRG4 SOIC D 8 2500 340.5 338.1 20.6
TL431BIPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL431BQDBVR SOT-23 DBV 5 3000 203.0 203.0 35.0
TL431BQDBVT SOT-23 DBV 5 250 203.0 203.0 35.0
TL431BQDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL431BQDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL431BQDBZRG4 SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL431BQDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL431BQDBZTG4 SOT-23 DBZ 3 250 183.0 183.0 20.0
TL431BQDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TL431BQDCKT SC70 DCK 6 250 203.0 203.0 35.0
TL431BQDR SOIC D 8 2500 340.5 338.1 20.6
TL431CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431CDBVR SOT-23 DBV 5 3000 183.0 183.0 20.0
TL431CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431CDBVT SOT-23 DBV 5 250 183.0 183.0 20.0
TL431CDBVTG4 SOT-23 DBV 5 250 180.0 180.0 18.0
TL431CDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL431CDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL431CDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL431CDR SOIC D 8 2500 340.5 338.1 20.6
TL431CDR SOIC D 8 2500 364.0 364.0 27.0
TL431CDRG4 SOIC D 8 2500 340.5 338.1 20.6
TL431CPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL431CPSR SO PS 8 2000 367.0 367.0 38.0
TL431CPWR TSSOP PW 8 2000 367.0 367.0 35.0
TL431IDBVR SOT-23 DBV 5 3000 183.0 183.0 20.0
TL431IDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431IDBVRG4 SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431IDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431IDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL431IDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL431IDBZRG4 SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL431IDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL431IDBZTG4 SOT-23 DBZ 3 250 183.0 183.0 20.0
TL431IDR SOIC D 8 2500 340.5 338.1 20.6
TL431IDR SOIC D 8 2500 364.0 364.0 27.0
TL431IDRG4 SOIC D 8 2500 340.5 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Aug-2018
Pack Materials-Page 7
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL431IPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL431QDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431QDBVRG4 SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431QDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431QDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL431QDBZRG4 SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL431QDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL431QDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TL431QDCKT SC70 DCK 6 250 203.0 203.0 35.0
TL431QDR SOIC D 8 2500 340.5 338.1 20.6
TL432ACDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL432ACDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL432ACDBZRG4 SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL432ACDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL432ACDBZTG4 SOT-23 DBZ 3 250 183.0 183.0 20.0
TL432AIDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL432AIDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL432AIDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL432AIDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
TL432AIDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL432AIPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL432AQDBVR SOT-23 DBV 5 3000 203.0 203.0 35.0
TL432AQDBVT SOT-23 DBV 5 250 203.0 203.0 35.0
TL432AQDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL432AQDBZRG4 SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL432AQDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL432AQDBZTG4 SOT-23 DBZ 3 250 183.0 183.0 20.0
TL432AQPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL432BCDBVR SOT-23 DBV 5 3000 203.0 203.0 35.0
TL432BCDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL432BCDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL432BCDBZTG4 SOT-23 DBZ 3 250 183.0 183.0 20.0
TL432BCPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL432BIDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL432BIDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL432BIDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL432BIDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
TL432BIPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL432BQDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL432BQDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL432BQPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL432CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL432CDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL432CPK SOT-89 PK 3 1000 340.0 340.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Aug-2018
Pack Materials-Page 8
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL432IDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL432IDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL432IDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TL432IPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL432QDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TL432QPK SOT-89 PK 3 1000 340.0 340.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Aug-2018
Pack Materials-Page 9
www.ti.com
PACKAGE OUTLINE
C
TYP
0.22
0.08
0.25
3.0
2.6
2X 0.95
1.9
1.45 MAX
TYP
0.15
0.00
5X 0.5
0.3
TYP
0.6
0.3
TYP
8
0
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/C 04/2017
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
www.ti.com
PACKAGE OUTLINE
C
TYP
0.22
0.08
0.25
3.0
2.6
2X 0.95
1.9
1.45 MAX
TYP
0.15
0.00
5X 0.5
0.3
TYP
0.6
0.3
TYP
8
0
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/C 04/2017
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
4203227/C
www.ti.com
PACKAGE OUTLINE
C
TYP
0.20
0.08
0.25
2.64
2.10 1.12 MAX
TYP
0.10
0.01
3X 0.5
0.3
TYP
0.6
0.2
1.9
0.95
TYP-80
A
3.04
2.80
B
1.4
1.2
(0.95)
SOT-23 - 1.12 mm max heightDBZ0003A
SMALL OUTLINE TRANSISTOR
4214838/C 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-236, except minimum foot length.
0.2 C A B
1
3
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ALL AROUND 0.07 MIN
ALL AROUND
3X (1.3)
3X (0.6)
(2.1)
2X (0.95)
(R0.05) TYP
4214838/C 04/2017
SOT-23 - 1.12 mm max heightDBZ0003A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
SCALE:15X
PKG
1
3
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
www.ti.com
EXAMPLE STENCIL DESIGN
(2.1)
2X(0.95)
3X (1.3)
3X (0.6)
(R0.05) TYP
SOT-23 - 1.12 mm max heightDBZ0003A
SMALL OUTLINE TRANSISTOR
4214838/C 04/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
SYMM
PKG
1
3
2
www.ti.com
PACKAGE OUTLINE
C
TYP
6.6
6.2
1.2 MAX
6X 0.65
8X 0.30
0.19
2X
1.95
0.15
0.05
(0.15) TYP
0 - 8
0.25
GAGE PLANE
0.75
0.50
A
NOTE 3
3.1
2.9
B
NOTE 4
4.5
4.3
4221848/A 02/2015
TSSOP - 1.2 mm max heightPW0008A
SMALL OUTLINE PACKAGE
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153, variation AA.
18
0.1 C A B
5
4
PIN 1 ID
AREA
SEATING PLANE
0.1 C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 2.800
www.ti.com
EXAMPLE BOARD LAYOUT
(5.8)
0.05 MAX
ALL AROUND 0.05 MIN
ALL AROUND
8X (1.5)
8X (0.45)
6X (0.65)
(R )
TYP
0.05
4221848/A 02/2015
TSSOP - 1.2 mm max heightPW0008A
SMALL OUTLINE PACKAGE
SYMM
SYMM
LAND PATTERN EXAMPLE
SCALE:10X
1
45
8
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
www.ti.com
EXAMPLE STENCIL DESIGN
(5.8)
6X (0.65)
8X (0.45)
8X (1.5)
(R ) TYP0.05
4221848/A 02/2015
TSSOP - 1.2 mm max heightPW0008A
SMALL OUTLINE PACKAGE
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SYMM
SYMM
1
45
8
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
www.ti.com
PACKAGE OUTLINE
3X 2.67
2.03
5.21
4.44
5.34
4.32
3X
12.7 MIN
2X 1.27 0.13
3X 0.55
0.38
4.19
3.17
3.43 MIN
3X 0.43
0.35
(2.54)
NOTE 3
2X
2.6 0.2
2X
4 MAX
SEATING
PLANE
6X
0.076 MAX
(0.51) TYP
(1.5) TYP
TO-92 - 5.34 mm max heightLP0003A
TO-92
4215214/B 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Lead dimensions are not controlled within this area.
4. Reference JEDEC TO-226, variation AA.
5. Shipping method:
a. Straight lead option available in bulk pack only.
b. Formed lead option available in tape and reel or ammo pack.
c. Specific products can be offered in limited combinations of shipping medium and lead options.
d. Consult product folder for more information on available options.
EJECTOR PIN
OPTIONAL
PLANE
SEATING
STRAIGHT LEAD OPTION
321
SCALE 1.200
FORMED LEAD OPTION
OTHER DIMENSIONS IDENTICAL
TO STRAIGHT LEAD OPTION
SCALE 1.200
www.ti.com
EXAMPLE BOARD LAYOUT
0.05 MAX
ALL AROUND
TYP
(1.07)
(1.5) 2X (1.5)
2X (1.07)
(1.27)
(2.54)
FULL R
TYP
( 1.4)0.05 MAX
ALL AROUND
TYP
(2.6)
(5.2)
(R0.05) TYP
3X ( 0.9) HOLE
2X ( 1.4)
METAL
3X ( 0.85) HOLE
(R0.05) TYP
4215214/B 04/2017
TO-92 - 5.34 mm max heightLP0003A
TO-92
LAND PATTERN EXAMPLE
FORMED LEAD OPTION
NON-SOLDER MASK DEFINED
SCALE:15X
SOLDER MASK
OPENING
METAL
2X
SOLDER MASK
OPENING
123
LAND PATTERN EXAMPLE
STRAIGHT LEAD OPTION
NON-SOLDER MASK DEFINED
SCALE:15X
METAL
TYP
SOLDER MASK
OPENING
2X
SOLDER MASK
OPENING
2X
METAL
12 3
www.ti.com
TAPE SPECIFICATIONS
19.0
17.5
13.7
11.7
11.0
8.5
0.5 MIN
TYP-4.33.7
9.75
8.50
TYP
2.9
2.4 6.75
5.95
13.0
12.4
(2.5) TYP
16.5
15.5
32
23
4215214/B 04/2017
TO-92 - 5.34 mm max heightLP0003A
TO-92
FOR FORMED LEAD OPTION PACKAGE
IMPORTANT NOTICE
Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its
semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers
should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated
circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and
services.
Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced
documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements
different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the
associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Buyers and others who are developing systems that incorporate TI products (collectively, “Designers”) understand and agree that Designers
remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have
full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products
used in or for Designers’ applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with
respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous
consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and
take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will
thoroughly test such applications and the functionality of such TI products as used in such applications.
TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information,
including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to
assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any
way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource
solely for this purpose and subject to the terms of this Notice.
TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically
described in the published documentation for a particular TI Resource.
Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that
include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE
TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or
endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO
ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM,
INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF
PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL,
DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN
CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949
and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.
Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such
products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards
and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must
ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in
life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.
Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life
support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all
medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.
TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).
Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory
requirements in connection with such selection.
Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-
compliance with the terms and provisions of this Notice.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2018, Texas Instruments Incorporated
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Texas Instruments:
TL431BQLPME3 TL431BQLPR TL431BQLPRE3 TL431BQPK TL431BQPKG3 TL431BCDBVRG4
TL431BCDBVTG4 TL431BCPSRG4 TL431BIDBVRG4 TL431BIDBVTG4 TL431BQDBVRG4 TL431BQDBVTG4
TL431BCDCKRG4 TL431BCDCKTG4 TL431BCDG4 TL431BCDRG4 TL431BCPWG4 TL431BCPWRG4
TL431BIDCKRG4 TL431BIDCKTG4 TL431BIDG4 TL431BIDRG4 TL431BQDCKRG4 TL431BQDCKTG4
TL431BQDG4 TL431BQDRG4 TL431BCD TL431BCDBVR TL431BCDBVRE4 TL431BCDBVT TL431BCDBVTE4
TL431BCDBZR TL431BCDBZRG4 TL431BCDBZT TL431BCDBZTG4 TL431BCDCKR TL431BCDCKRE4
TL431BCDCKT TL431BCDCKTE4 TL431BCDE4 TL431BCDR TL431BCDRE4 TL431BCLP TL431BCLPE3
TL431BCLPM TL431BCLPME3 TL431BCLPR TL431BCLPRE3 TL431BCP TL431BCPE4 TL431BCPK
TL431BCPKG3 TL431BCPSR TL431BCPSRE4 TL431BCPW TL431BCPWE4 TL431BCPWR TL431BCPWRE4
TL431BID TL431BIDBVR TL431BIDBVRE4 TL431BIDBVT TL431BIDBVTE4 TL431BIDBZR TL431BIDBZRG4
TL431BIDBZT TL431BIDBZTG4 TL431BIDCKR TL431BIDCKRE4 TL431BIDCKT TL431BIDCKTE4 TL431BIDE4
TL431BIDR TL431BIDRE4 TL431BILP TL431BILPE3 TL431BILPR TL431BILPRE3 TL431BIP TL431BIPE4
TL431BIPK TL431BIPKG3 TL431BQD TL431BQDBVR TL431BQDBVRE4 TL431BQDBVT TL431BQDBVTE4
TL431BQDBZR TL431BQDBZRG4 TL431BQDBZT TL431BQDBZTG4 TL431BQDCKR TL431BQDCKRE4
TL431BQDCKT TL431BQDCKTE4 TL431BQDE4 TL431BQDR TL431BQDRE4 TL431BQLP TL431BQLPE3
