MB88151A
Spread Spectrum Clock Generator
Cypress Semiconductor Corporation • 198 Champion Court • San Jose,CA 95134-1709 • 408-943-2600
Document Number: 002-08311 Rev. *A Revised December 30, 2016
MB88151A is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary radiation noise (EMI) can
be attenuated by making the oscillation frequency slightly modulate periodically with the internal modulator. It corresponds to both of
the center spread which modulates frequency in modulation off as Middle Centered and down spread which modulates so as not to
exceed frequency in modulation off.
Features
■Modulation rate : 0.5, 1.5 (Center spread), 1.0, 3.0 (Down spread)
■Equipped with oscillation circuit : Range of oscillation 8.3 MHz to 33.4 MHz
■Modulation clock output Duty : 40 to 60
■Low current consumption by CMOS process : 5 mA (24 MHz : Typ-sample, no load)
■Power supply voltage : 3.3 V 0.3 V
■Operating temperature : 40 C to 85 C
■Package : SOP 8-pin
MB88151A-
100/101
(multiply-by-1)
MB88151A-
200/201
(multiply-by-2)
MB88151A-
400/401
(multiply-by-4)
MB88151A-
500/501
(multiply-by-1/2)
MB88151A-
800/801
(multiply-by-8)
Input
frequency/
Output
frequency
16.6 MHz to 33.4
MHz/
16.6 MHz to 33.4
MHz
16.6 MHz to 33.4
MHz/
33.2 MHz to 66.8
MHz
16.6 MHz to 33.4
MHz/
66.4 MHz to 133.6
MHz
16.6 MHz to 33.4
MHz/
8.3 MHz to 16.7 MHz
8.3 MHz to 16.7 MHz
66.4 MHz to 133.6
MHz
Modulation
clock
cycle-cycle
jitter
Less than100 ps Less than 100 ps Less than 150 ps Less than 200 ps Less than 150 ps
Document Number: 002-08311 Rev. *A Page 2 of 26
MB88151A
Contents
Product Lineup .................................................................3
Pin Assignment ................................................................3
Pin Description .................................................................3
I/O Circuit Type .................................................................4
Handling Devices .............................................................. 6
Preventing Latch-up ....................................................6
Handling unused pins .................................................. 6
The attention when the external clock is used ............6
Power supply pins .......................................................6
Oscillation circuit ......................................................... 6
Block Diagram .................................................................. 7
Pin Setting .........................................................................8
Absolute Maximum Ratings .......................................... 10
Recommended Operating Conditions ..........................11
Electrical Characteristics ............................................... 12
Output Clock Duty Cycle (tdcc tb/ta) ....................... 15
Input Frequency (fin 1/tin) ......................................... 15
Output Slew Rate (SR) .................................................. 15
Cycle-cycle Jitter (tjc | tn tn1 |) ........................... 16
Modulation Waveform .................................................... 17
Lock-up Time .................................................................. 18
Oscillation Circuit ........................................................... 20
Interconnection Circuit Example .................................. 21
Spectrum Example Characteristics .............................. 22
Ordering Information ............................. 23
Package Dimension ........................................................ 24
Document History ........................................................... 25
Sales, Solutions, and Legal Information .......................26
Document Number: 002-08311 Rev. *A Page 3 of 26
MB88151A
1. Product Lineup
MB88151A has five kinds of multiplication type.
2. Pin Assignment
3. Pin Description
* : XPD 800 k pull-up resistor at “L”
Product Input frequency range Multiplier ratio Output frequency range
MB88151A-100/101
16.6 MHz to 33.4 MHz
Multiply-by-1 16.6 MHz to 33.4 MHz
MB88151A-200/201 Multiply-by-2 33.2 MHz to 66.8 MHz
MB88151A-400/401 Multiply-by-4 66.4 MHz to 133.6 MHz
MB88151A-500/501 Multiply-by-1/2 8.3 MHz to 16.7 MHz
MB88151A-800/801 8.3 MHz to 16.7 MHz Multiply-by-8 66.4 MHz to 133.6 MHz
Pin name I/O Pin no. Description
XIN I 1 Resonator connection pin/clock input pin
VSS 2GND pin
SEL0 I 3 Modulation rate setting pin
SEL1 I 4 Modulation rate setting pin
CKOUT O 5 Modulated clock output pin
ENS/XPD I 6 Modulation enable setting pin (with pull-up resistance)/
Power down pin (with pull-up resistor)*
VDD 7 Power supply voltage pin
XOUT O 8 Resonator connection pin
1
2
3
4
8
7
6
5
XIN
V
SS
SEL0
SEL1
XOUT
V
DD
ENS/XPD
CKOUT
MB88151A
TOP VIEW
FPT-8P-M02
Document Number: 002-08311 Rev. *A Page 4 of 26
MB88151A
4. I/O Circuit Type
(Continued)
Pin Circuit type Remarks
SEL0,
SEL1
CMOS hysteresis input
ENS ■With 50 k pull-up resistors
■CMOS hysteresis input
XPD ■With 50 k 800 k pull-up
resistors
Note : If “L” is input to XPD, 50 k
pull-up resistor is disconnected.
■CMOS hysteresis input
50 kΩ
800 kΩ
50 kΩ
Document Number: 002-08311 Rev. *A Page 5 of 26
MB88151A
(Continued)
Note : For XIN and XOUT pins, refer to “Oscillation Circuit”.
Pin Circuit type Remarks
CKOUT ■CMOS output
■IOL 4 mA
Document Number: 002-08311 Rev. *A Page 6 of 26
MB88151A
5. Handling Devices
5.1 Preventing Latch-up
A latch-up can occur if, on this device, (a) a voltage higher than VDD or a voltage lower than VSS is applied to an input or output pin or
(b) a voltage higher than the rating is applied between VDD pin and VSS pin. The latch-up, if it occurs, significantly increases the power
supply current and may cause thermal destruction of an element. When you use this device, be very careful not to exceed the
maximum rating.
5.2 Handling unused pins
Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or
pull-down resistor.
Unused output pin should be opened.
5.3 The attention when the external clock is used
Input the clock to XIN pin, and XOUT pin should be opened when you use the external clock.
Please pay attention so that an overshoot and an undershoot do not occur to an input clock of XIN pin.
5.4 Power supply pins
Please design connecting the power supply pin of this device by as low impedance as possible from the current supply source.
We recommend connecting electrolytic capacitor (about 10 F) and the ceramic capacitor (about 0.01 F) in parallel between VSS
pin and VDD pin near the device, as a bypass capacitor.
5.5 Oscillation circuit
Noise near the XIN and XOUT pins may cause the device to malfunction. Design printed circuit boards so that electric wiring of XIN
or XOUT pin and the resonator do not intersect other wiring.
Design the printed circuit board that surrounds the XIN and XOUT pins with ground.
Document Number: 002-08311 Rev. *A Page 7 of 26
MB88151A
6. Block Diagram
1
−
M
1
−
N
1
−
L
IDAC ICO
V
DD
CKOUT
V
SS
R
f
= 1 MΩ
SEL1
XOUT
XIN
SEL0
ENS/XPD
Modulation
clock output
Modulation rate
setting
Modulation rate
setting
Modulation enable setting/
Power down setting
Reference clock
PLL block
Reference clock
Phase
compare
V/I
conversion
Modulation logic Modulation
rate setting/
Modulation
enable setting
Loop filter
Modulation clock
output
MB88151A PLL block
Charge
pump
A glitchless IDAC (current output D/A converter) provides precise modulation, thereby
dramatically reducing EMI.
Document Number: 002-08311 Rev. *A Page 8 of 26
MB88151A
7. Pin Setting
When changing the pin setting, the stabilization wait time for the modulation clock is required. The stabilization wait time for the
modulation clock take the maximum value of “Electrical Characteristics AC Characteristics Lock-up time”.
ENS modulation enable setting (MB88151A-100/200/400/500/800)
Note : Spectrum does not spread when “L” is set to ENS. The clock with low jitter can be obtained. Because of ENS has Pull-up
resistance, spectrum spread when “H” is set to it or open the terminal.
XPD Power down setting (MB88151A-101/201/401/501/801)
Note : CKOUT of output pins are fixed to “L” output during power down.
SEL0, SEL1 Modulation rate setting
Note : The modulation rate can be changed at the level of the terminal.
ENS Modulation
L No modulation
H Modulation
XPD Status
L Power down Status
H Operating status
SEL1 SEL0 Modulation rate Modulation type
LL 1.5Center spread
LH 0.5Center spread
HL 1.0Down spread
HH 3.0Down spread
Document Number: 002-08311 Rev. *A Page 9 of 26
MB88151A
■ Center spread
Spectrum is spread (modulated) by centering on the frequency in modulation off.
■ Down spread
Spectrum is spread (modulated) below the frequency in modulation off.
Radiation level
Frequency
Frequency in modulation off
Center spread example of 1.5 modulation rate
Modulation width 3.0
−3.0%
Frequency in modulation off
Frequency
Radiation level
Down spread example of 3.0 modulation rate
Modulation width 3.0
Document Number: 002-08311 Rev. *A Page 10 of 26
MB88151A
8. Absolute Maximum Ratings
* : The parameter is based on VSS 0.0 V.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Parameter Symbol Rating Unit
Min Max
Power supply voltage* VDD 0.5 4.0 V
Input voltage* VIVSS 0.5 VDD 0.5 V
Output voltage* VOVSS 0.5 VDD 0.5 V
Storage temperature TST 55 125 C
Operation junction temperature TJ 40 125 C
Output current IO 14 14 mA
Overshoot VIOVER VDD 1.0 (tOVER 50 ns) V
Undershoot VIUNDER VSS1.0 (tUNDER 50 ns) V
VDD
VSS
Input pin
Overshoot/Undershoot
tUNDER 50 ns
tOVER 50 ns
VIOVER VDD 1.0 V
VIUNDER VSS 1.0 V
Document Number: 002-08311 Rev. *A Page 11 of 26
MB88151A
9. Recommended Operating Conditions
(VSS 0.0 V)
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconductor device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data sheet. Users considering application outside the listed conditions are advised to contact
their representatives beforehand.
Parameter Symbol Pin Conditions Value Unit
Min Typ Max
Power supply voltage VDD VDD 3.0 3.3 3.6 V
“H” level input voltage VIH XIN,
SEL0,
SEL1,
ENS
VDD × 0.8 VDD 0.3 V
“L” level input voltage VIL VSS VDD × 0.2 V
Input clock
duty cycle tDCI XIN 8.3 MHz to
33.4 MHz 40 50 60
Operating temperature Ta  40 85 C
XIN
ta
tb
1.5 V
Input clock duty cycle (tDCI tb/ta)
Document Number: 002-08311 Rev. *A Page 12 of 26
MB88151A
10. Electrical Characteristics
■DC Characteristics
(Ta 40 °C to 85 °C, VDD 3.3 V 0.3 V, VSS 0.0 V)
Parameter Symbol Pin Conditions Value Unit
Min Typ Max
Power supply current ICC VDD
No load capacitance at
output 24 MHz
MB88151A-100
5.0 7.0 mA
At power down
MB88151A-101 10 A
Output voltage
VOH
CKOUT
“H” level output,
IOH 4 mA VDD 0.5 VDD V
VOL “L” level output,
IOL 4 mA VSS 0.4 V
Output impedance ZOCKOUT 8.3 MHz to 133.6 MHz 45 
Input capacitance CIN
XIN,
SEL0,
SEL1,
ENS
Ta 25 C,
VDD VI 0.0 V,
f 1 MHz
16 pF
Load capacitance CLCKOUT
8.3 MHz to 66.8 MHz 15
pF66.8 MHz to 100 MHz 10
100 MHz to 133.6 MHz  7
Input pull-up resistance RPUE ENS VIL 0.0 V 25 50 200 k
RPUP XPD VIL 0.0 V 500 800 1200
Document Number: 002-08311 Rev. *A Page 13 of 26
MB88151A
■AC Characteristics
(Ta 40 °C to 85 °C, VDD 3.3 V 0.3 V, VSS 0.0 V)
Note : The modulation clock stabilization wait time is required after the power is turned on, the IC recovers from power saving, or after
FREQ (frequency range) or ENS (modulation ON/OFF) setting is changed. For the modulation clock stabilization wait time,
assign the maximum value for lock-up time.
Parameter Symbol Pin Conditions Value Unit
Min Typ Max
Oscillation frequency fxXIN,
XOUT
Fundamental
oscillation 8.3 33.4 MHz
Input frequency fin XIN
External clock input
(multiply-by-1, 2, 4,
divided by 2)
16.6 33.4
MHz
External clock input
(multiply-by-8) 8.3 16.7
Output frequency fOUT CKOUT
MB88151A-100/101
(Multiply by 1) 16.6 33.4
MHz
MB88151A-200/201
(Multiply by 2) 33.2 66.8
MB88151A-400/401
(Multiply by 4) 66.4 133.6
MB88151A-500/501
(2-frequency division) 8.3 16.7
MB88151A-800/801
(multiply-by-8) 66.4 133.6
Output slew rate SR CKOUT 0.4 V to 2.4 V
Load capacitance 15 pF 0.4 4.0 V/ns
Output clock duty cycle tDCC CKOUT 1.5 V 40 60
Modulation period
(Number of input clocks
per modulation)
fMOD
(nMOD) CKOUT
MB88151A-100/101,
MB88151A-200/201,
MB88151A-400/401,
MB88151A-500/501
fin/2200
(2200)
fin/1900
(1900)
fin/1600
(1600)
kHz
(clks)
MB88151A-800/801 fin/880
(880)
fin/760
(760)
fin/640
(640)
kHz
(clks)
Lock-up time tLK CKOUT 8.3 MHz to 80 MHz 25
ms
80 MHz to 133.6 MHz 38
Cycle-cycle jitter tJC CKOUT
MB88151A-100/101,
MB88151A-200/201
No load capacitance,
Ta 25 C, VDD 3.3 V
100
ps-rms
MB88151A-400/401,
MB88151A-800/801
No load capacitance,
Ta 25 C, VDD 3.3 V
150
MB88151A-500/501
No load capacitance,
Ta 25 C, VDD 3.3 V
200
Document Number: 002-08311 Rev. *A Page 14 of 26
MB88151A
<Definition of modulation frequency and number of input clocks per modulation>
MB88151A contains the modulation period to realize the efficient EMI reduction.
The modulation period fMOD depends on the input frequency and changes between fMOD (Min) and fMOD (Max) .
Furthermore, the average value of fMOD equals the typical value of the electrical characteristics.
t
f
MOD
(Min) f
MOD
(Max)
t
Modulation waveform
Clock time
nMOD (Max)
fOUT (Output frequency)
Clock time
nMOD (Min)
Document Number: 002-08311 Rev. *A Page 15 of 26
MB88151A
11. Output Clock Duty Cycle (tDCC tb/ta)
12. Input Frequency (fin 1/tin)
13. Output Slew Rate (SR)
CKOUT
1.5 V
ta
tb
0.8 VDD
tin
XIN
2.4 V
0.4 V
t
f
t
r
CKOUT
Note : SR (2.4 0.4) /tr, SR (2.4 0.4) /tf
Document Number: 002-08311 Rev. *A Page 16 of 26
MB88151A
14. Cycle-cycle Jitter (tJC | tn tn1 |)
tn+1tn
CKOUT
Note : Cycle-cycle jitter is defined the difference between a certain cycle and immediately after
(or, immediately before) .
Document Number: 002-08311 Rev. *A Page 17 of 26
MB88151A
15. Modulation Waveform
fMOD
− 1.5 %
+ 1.5 %
f
MOD
− 1.0 %
− 0.5 %
■ 1.5 modulation rate, Example of center spread
■ 1.0 modulation rate, Example of down spread
CKOUT
Output frequency
CKOUT
Output frequency
Frequency at modulation OFF
Frequency at modulation OFF
Time
Time
Document Number: 002-08311 Rev. *A Page 18 of 26
MB88151A
16. Lock-up Time
If the setting pin is fixed at the “H” or “L” level, the maximum time after the power is turned on until the set clock signal is output from
CKOUT pin is (the stabilization wait time of input clock to XIN pin) (the lock-up time “tLK”). For the input clock stabilization time,
check the characteristics of the resonator or oscillator used.
For modulation enable control using the ENS pin during normal operation, the set clock signal is output from
CKOUT pin at most the lock-up time (tLK) after the level at the ENS pin is determined.
Note : When the pin setting is changed, the CKOUT pin output clock stabilization time is required. Until the output clock signal becomes
stable, the output frequency, output clock duty cycle, modulation period, and cycle-cycle jitter cannot be guaranteed. It is
therefore advisable to perform processing such as cancelling a reset of the device at the succeeding stage after the lock-up time.
3.0 V
VDD
XIN
VIH
CKOUT
Setting pin
SEL0,
SEL1,
ENS
Internal clock
stabilization wait time
tLK
(lock-up time )
VIL
VIH
XIN
ENS
CKOUT
tLK
(lock-up time ) tLK
(lock-up time )
Document Number: 002-08311 Rev. *A Page 19 of 26
MB88151A
When the power down is controlled by XPD pin, the desired clock is obtained after the pin is set to H level until the maximum lock-
up time tLK is elapsed.
XPD
XIN
CKOUT
Internal clock
stabilization wait time
tLK
(lock-up time)
Document Number: 002-08311 Rev. *A Page 20 of 26
MB88151A
17. Oscillation Circuit
The figure below shows the connection example about general resonator. The oscillation circuit has the built-in resistance (Rf). The
value of capacity (C1 and C2) is required adjusting to the most suitable value of individual resonator.
The most suitable value is different by individual resonator. Please refer to the resonator manufacturer which you use for the most
suitable value.
Input the clock to XIN pin, and do not connect anything with XOUT pin if you use the external clock (you do not use the resonator).
C
1
R
f
(1 MΩ)
C
2
XIN Pin
MB88151A LSI Internal
MB88151A LSI External
XOUT Pin
■ When using the resonator
■ When using an external clock
OPEN
R
f
(1 MΩ)
Note : Note that a jitter characteristic of an input clock may cause an affect a cycle-cycle jitter characteristic.
MB88151A LSI Internal
MB88151A LSI External
XOUT Pin
XIN Pin
External clock
Document Number: 002-08311 Rev. *A Page 21 of 26
MB88151A
18. Interconnection Circuit Example
1
2
3
4
8
7
6
5
MB88151A
C
1
C
2
C
4
C
3
R
1
+
SEL0
SEL1
Xtal
ENS
C1, C2 : Oscillation stabilization capacitance (refer to “Oscillation Circuit”.)
C3 : Capacitor of 10 F or higher
C4 : Capacitor about 0.01 F (connect a capacitor of good high frequency
property (ex. laminated ceramic capacitor) to close to this device.)
R1 : Impedance matching resistor for board pattern
Document Number: 002-08311 Rev. *A Page 22 of 26
MB88151A
19. Spectrum Example Characteristics
The condition of the examples of the characteristic is shown as follows : Input frequency 20 MHz (Output frequency 20 MHz :
Using MB88151A-100 (Multiply-by-1)), Power - supply voltage 3.3 V, None load capacity,
Modulation rate 1.5 (center spread).
Spectrum analyzer HP4396B is connected with CKOUT. The result of the measurement with RBW 1 kHz
(ATT use for 6dB).
CH B Spectrum 10 dB /REF 0 dBm
Avg
4
RBW# 1 kHZVBW 1 kHZATT 6 dB
CENTER 20 MHZ
SWP 2.505 s
SPAN 4 MHZ
No modulation
6.54 dBm
1.5 modulation
24.45 dBm
Document Number: 002-08311 Rev. *A Page 23 of 26
MB88151A
20. Ordering Information
Part number Input frequency
range
Multiplier
ratio
Output frequency
range Package Remarks
MB88151APNF-G-100-JNE1
MB88151APNF-G-101-JNE1
16.6 MHz to
33.4 MHz
Multiply-
by-116.6 MHz to 33.4 MHz
8-pin plastic
SOP
(FPT-8P-M02)
MB88151APNF-G-200-JNE1
MB88151APNF-G-201-JNE1
Multiply-
by-233.2 MHz to 66.8 MHz
MB88151APNF-G-400-JNE1
MB88151APNF-G-401-JNE1
Multiply-
by-466.4 MHz to 133.6 MHz
MB88151APNF-G-500-JNE1
MB88151APNF-G-501-JNE1
Multiply-
by-1/2 8.3 MHz to 16.7 MHz
MB88151APNF-G-800-JNE1
MB88151APNF-G-801-JNE1
8.3 MHz to
16.7 MHz
Multiply-
by-866.4 MHz to 133.6 MHz
MB88151APNF-G-100-JNEFE1
MB88151APNF-G-101-JNEFE1
16.6 MHz to
33.4 MHz
Multiply-
by-116.6 MHz to 33.4 MHz
Emboss
taping
(EF type)
MB88151APNF-G-200-JNEFE1
MB88151APNF-G-201-JNEFE1
Multiply-
by-233.2 MHz to 66.8 MHz
MB88151APNF-G-400-JNEFE1
MB88151APNF-G-401-JNEFE1
Multiply-
by-466.4 MHz to 133.6 MHz
MB88151APNF-G-500-JNEFE1
MB88151APNF-G-501-JNEFE1
Multiply-
by-1/2 8.3 MHz to 16.7 MHz
MB88151APNF-G-800-JNEFE1
MB88151APNF-G-801-JNEFE1
8.3 MHz to
16.7 MHz
Multiply-
by-866.4 MHz to 133.6 MHz
MB88151APNF-G-100-JNERE1
MB88151APNF-G-101-JNERE1
16.6 MHz to
33.4 MHz
Multiply-
by-116.6 MHz to 33.4 MHz
Emboss
taping
(ER type)
MB88151APNF-G-200-JNERE1
MB88151APNF-G-201-JNERE1
Multiply-
by-233.2 MHz to 66.8 MHz
MB88151APNF-G-400-JNERE1
MB88151APNF-G-401-JNERE1
Multiply-
by-466.4 MHz to 133.6 MHz
MB88151APNF-G-500-JNERE1
MB88151APNF-G-501-JNERE1
Multiply-
by-1/2 8.3 MHz to 16.7 MHz
MB88151APNF-G-800-JNERE1
MB88151APNF-G-801-JNERE1
8.3 MHz to
16.7 MHz
Multiply-
by-866.4 MHz to 133.6 MHz
Document Number: 002-08311 Rev. *A Page 24 of 26
MB88151A
21. Package Dimension
8-pin plastic SOP Lead pitch 1.27 mm
Package width
×
package length
3.9 × 5.05 mm
Lead shape Gullwing
Sealing method Plastic mold
Mounting height 1.75 mm MAX
Weight 0.06 g
8-pin plastic SOP
(FPT-8P-M02)
(FPT-8P-M02)
C
2002 FUJITSU LIMITED F08004S-c-4-7
1.27(.050)
3.90±0.30 6.00±0.40
.199 –.008
+.010
–0.20
+0.25
5.05
0.13(.005)
M
(.154±.012) (.236±.016)
0.10(.004)
14
58
0.44±0.08
(.017±.003)
–0.07
+0.03
0.22
.009 +.001
–.003
45˚
0.40(.016)
"A" 0~8˚
0.25(.010)
(Mounting height)
Details of "A" part
1.55±0.20
(.061±.008)
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.15±0.10
(.006±.004)
(Stand off)
0.10(.004)
*1
*2
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
©2002-2008 FUJITSU MICROELECTRONICS LIMITED F08004S-c-4-8
Note 1) *1 : These dimensions include resin protrusion.
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
Document Number: 002-08311 Rev. *A Page 25 of 26
MB88151A
Document History
Spansion Publication Number: DS04-29127-3E
Document Title: MB88151A Spread Spectrum Clock Generator
Document Number: 002-08311
Revision ECN Orig. of
Change
Submission
Date Description of Change
** – TAOA 06/29/2009 Initial Release
*A 5569547 TAOA 12/30/2016 Updated to Cypress Template
Document Number: 002-08311 Rev. *A Revised December 30, 2016 Page 26 of 26
MB88151A
© Cypress Semiconductor Corporation, 2007-2016. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC (“Cypress”). This document,
including any software or firmware included or referenced in this document (“Software”), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries
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