MIC3000BMLTR - Micrel

October 2004 1 M9999-101204

MIC3000 Micrel

MIC3000

FOM Management IC

Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

General Description

The MIC3000 enables the implementation of sophisticated,

hot-pluggable fiber optic transceivers with intelligent laser

control and Digital Diagnostic Monitoring Interface per SFF-

8472. It essentially integrates all non-datapath functions of an

SFP transceiver into a tiny 4mm x 4mm MLF® package. It also

works well as a microcontroller peripheral in transponders or

10Gbps transceivers.

A highly configurable automatic power control (APC) circuit

controls laser bias. Bias and modulation are temperature

compensated using dual DACs, an on-chip temperature

sensor, and NVRAM look-up tables. A programmable inter-

nal feedback resistor provides unprecedented dynamic range

for APC. Controlled laser turn-on facilitates hot-plugging.

An analog-to-digital converter converts the measured tem-

perature, voltage, bias current, transmit power, and received

power from analog-to-digital. Each parameter is compared

against user-programmed warning and alarm thresholds.

Analog comparators and DACs provide high-speed monitor-

ing of received power and critical laser operating parameters.

An interrupt output, power-on hour meter, and data-ready bits

add user friendliness beyond SFF-8472. The interrupt output

and data-ready bits reduce overhead in the host system. The

power-on hour meter logs operating hours using an internal

real-time clock and stores the result in NVRAM.

Communication with the MIC3000 is via an industry standard

2-wire serial interface. Nonvolatile memory is provided for

serial ID, configuration, and separate OEM and user

scratchpad spaces. Two-level password protection guards

against data corruption.

Features

• APC or constant-current laser bias

• Supports multiple laser types and bias circuit topologies

• Drives external low-cost BJT for laser bias

• Integrated digital temperature sensor

• Temperature compensation of modulation, bias, and

fault levels via NVRAM look-up tables

• Direct interface to SY88932, SY88982, SY89307 and

other drivers

• NVRAM to support GBIC/SFP serial ID function

• User writable EEPROM scratchpad

• Diagnostic monitoring interface per SFF-8472

– Monitors and reports critical parameters:

temperature, bias current, TX and RX optical power,

and supply voltage

– S/W control and monitoring of TXFAULT, RXLOS,

RATESELECT, and TXDISABLE

– External calibration

• Power-on hour meter

• Interrupt capability

• Extensive test and calibration features

• 2-wire I2C compatible serial interface

• SFP MSA and SFF-8472 compliant

• 3.0V to 3.6V power supply range

• 5V-tolerant I/O

• 4mm x 4mm 24-pin MLF® package

Applications

• SFF/SFP optical transceivers

• SONET/SDH transceivers and transponders

• Fibre channel transceivers

• 10Gbps transceivers

• Free space optical communications

• Proprietary optical links

Ordering Information

Part Number Junction Temp. Range Package

MIC3000BML –45°C to +105°C 24-pin MLF™

MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc.

MIC3000 Micrel

M9999-101204 2 October 2004

Contents

General Description ................................................................................................................................................................................ 1

Features .................................................................................................................................................................................................... 1

Applications ............................................................................................................................................................................................. 1

Ordering Information .............................................................................................................................................................................. 1

Pin Configuration .................................................................................................................................................................................... 5

24-Lead MLF™ ......................................................................................................................................................................................... 5

Pin Descriptions ................................................................................................................................................................................. 5-6

Absolute Maximum Ratings ................................................................................................................................................................... 7

Operating Ratings ................................................................................................................................................................................... 7

Electrical Characteristics ................................................................................................................................................................. 7-11

Timing Diagram ..................................................................................................................................................................................... 11

Serial Interface Timing .......................................................................................................................................................................... 11

Address Map .......................................................................................................................................................................................... 12

Table 1. MIC3000 Address Map, Serial address = A0h ..................................................................................................................... 12

Table 2. MIC3000 Address Map, Serial Address = A2h ..................................................................................................................... 12

Table 3. Temperature Compensation Tables, Serial Address = A4h ................................................................................................. 13

Table 4. OEM Configuration Registers, Serial Address = A6h ........................................................................................................... 13

Block Diagram ....................................................................................................................................................................................... 14

Figure 1. MIC3000 Block Diagram ...................................................................................................................................................... 14

Analog-to-Digital Converter/Signal Monitoring ................................................................................................................................. 14

Figure 2. Analog-to-Digital Converter Block Diagram ......................................................................................................................... 15

Table 5. A/D Input Signal Ranges and Resolutions ........................................................................................................................... 15

Table 6. VAUX Input Signal Ranges and Resolutions ........................................................................................................................ 15

External Calibration .............................................................................................................................................................................. 16

Voltage .................................................................................................................................................................................................... 16

Temperature ........................................................................................................................................................................................... 16

Bias Current ........................................................................................................................................................................................... 16

TX Power ................................................................................................................................................................................................ 16

RX Power ................................................................................................................................................................................................ 16

Laser Diode Bias Control ..................................................................................................................................................................... 17

Figure 3. MIC3000 APC and Modulation Control Block Diagram ...................................................................................................... 17

Figure 4. Programmable Feedback Resistor ...................................................................................................................................... 17

Laser Modulation Control ..................................................................................................................................................................... 17

Figure 5. Transmitter Configurations Supported by MIC3000 ..................................................................................................... 17

Figure 6. VMOD Configured as Voltage Output with Gain ........................................................................................................... 18

Power ON and Laser Start-Up .............................................................................................................................................................. 19

Table 8. Shutdown State of SHDN vs. Configuration Bits .................................................................................................................. 19

Figure 7. MIC3000 Power-On Timing (OE=1) .................................................................................................................................... 19

Table 9. Shutdown State of VBIAS vs. Configuration Bits ................................................................................................................. 19

Table 10. Shutdown state of VMOD vs. Configuration bits ................................................................................................................ 19

Fault Comparators ................................................................................................................................................................................ 20

Figure 8. Fault Comparator Logic ....................................................................................................................................................... 20

Duty-Cycle Limiting ............................................................................................................................................................................... 20

Temperature Measurement .................................................................................................................................................................. 20

Diode Faults ........................................................................................................................................................................................... 20

Figure 9. Saturation Detector .............................................................................................................................................................. 21

Figure 10. RXLOS Comparator Logic ................................................................................................................................................. 21

Temperature Compensation ................................................................................................................................................................ 21

Table 11. Temperature Compensation Look-up Tables, Serial Address I2CADR + 4h .................................................................... 22

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Table 12. APC Temperature Compensation Look-Up Table, Serial Address I2CADR+4h ............................................................... 23

Table 13. VMOD Temperature- Compensation Look-Up Table, Serial Address I2CADR+4h .......................................................... 23

Table 14. IBIAS Comparator Temperature Compensation Look-up Table, Serial Address I2CADR+4h ......................................... 23

Table 15. Bias Current High Alarm Temperature Compensation Table, Serial Address I2CADR+4h .............................................. 23

Table 16. Range of Temperature Compensation Tables vs. LUTOFF .............................................................................................. 24

Figure 11. Examples of LUTOFF Operation ....................................................................................................................................... 24

Figure 12. Temperature Compensation Examples ............................................................................................................................. 25

Alarms and Warning Flags ................................................................................................................................................................... 26

Table 17. MIC3000 Events ................................................................................................................................................................. 26

Control and Status I/O .......................................................................................................................................................................... 26

Figure 13. Control and Status I/O Logic .............................................................................................................................................. 27

System Timing ....................................................................................................................................................................................... 27

Figure 14. Transmitter ON-OFF Timing .............................................................................................................................................. 27

Figure 15. Initialization Timing with TXDISABLE Asserted ................................................................................................................ 27

Figure 16. Initialization Timing, TXDISABLE Not Asserted ................................................................................................................ 28

Figure 17. Loss-of-Signal (LOS) Timing ............................................................................................................................................. 28

Figure 18. Transmit Fault Timing ........................................................................................................................................................ 28

Figure 19. Successfully Clearing a Fault Condition ............................................................................................................................ 29

Figure 20. Unsuccessful Attempt to Clear a Fault .............................................................................................................................. 29

Warm Resets .......................................................................................................................................................................................... 30

Power-On Hour Meter ........................................................................................................................................................................... 30

Table 18. Power-On Hour Meter Result Format ................................................................................................................................. 30

Test and Calibration Features ............................................................................................................................................................. 30

Table 19. Test and Diagnostic Features ............................................................................................................................................. 30

Serial Port Operation ............................................................................................................................................................................ 31

Figure 21. Write Byte Protocol ............................................................................................................................................................ 31

Figure 22. Read Byte Protocol ............................................................................................................................................................ 31

Figure 23. Read_Word Protocol .......................................................................................................................................................... 31

Page Writes ............................................................................................................................................................................................ 31

Figure 24. Four-Byte Page_Write Protocol ......................................................................................................................................... 32

Acknowledge Polling ............................................................................................................................................................................ 32

Write Protection and Data Security ..................................................................................................................................................... 32

User Password ....................................................................................................................................................................................... 32

Detailed Register Descriptions ............................................................................................................................................................ 33

Alarm Threshold Registers .................................................................................................................................................................. 33

Warning Threshold Registers .............................................................................................................................................................. 38

ADC Result Registers ........................................................................................................................................................................... 44

Alarm Flags ............................................................................................................................................................................................ 47

Warning Flags ........................................................................................................................................................................................ 48

Applications Information ...................................................................................................................................................................... 61

Controlling Laser Diode Bias ............................................................................................................................................................... 61

Figure 25. Example APC Circuit for Common-Cathode TOSA .......................................................................................................... 61

Figure 26. Example APC Circuit for Common Anode TOSA .............................................................................................................. 61

Choosing CCOMP ................................................................................................................................................................................. 62

Figure 27. Slew Rate vs. CCOMP Value ............................................................................................................................................ 62

Figure 28. Open Loop Unity-Gain Bandwidth vs. CCOMP ................................................................................................................. 62

Table 20. Typical Values for CCOMP ................................................................................................................................................. 62

Measuring Laser Bias Current ............................................................................................................................................................. 62

Interfacing To Laser Drivers ................................................................................................................................................................ 63

SY88912 3.3V 3.2Gbps SONET/SDH Laser Driver ............................................................................................................................. 63

Figure 29. Controlling the SY88912 Modulation Current .................................................................................................................... 63

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M9999-101204 4 October 2004

Table 21. Control Range of SY88912 Modulation Control Circuit ...................................................................................................... 63

SY88932 3.3V 3.2Gbps SONET/SDH Laser Driver ............................................................................................................................. 63

Figure 30. Controlling the SY88932 Modulation Current .................................................................................................................... 63

SY89307 5.0V/ 3.3V 2.5Gbps VCSEL Driver ....................................................................................................................................... 64

Figure 31. Controlling the SY89307 Modulation Current .................................................................................................................... 64

Laser Drivers Programmed via a Sink Current .................................................................................................................................. 64

Figure 32. Controlling the Modulation Current via a Sink Current ...................................................................................................... 64

Drivers With Monitor Outputs .............................................................................................................................................................. 64

Shutdown Output .................................................................................................................................................................................. 64

Figure 33. Redundant Switch Circuits ................................................................................................................................................. 65

Temperature Sensing ............................................................................................................................................................................ 65

Table 23. Contributors to Self-Heating ................................................................................................................................................ 65

Remote Sensing .................................................................................................................................................................................... 65

Table 22. Transistors Suitable for Use as Remote Diodes ................................................................................................................ 65

Minimizing Errors .................................................................................................................................................................................. 65

Self-Heating ............................................................................................................................................................................................ 65

Series Resistance with External Temperature Sensor ..................................................................................................................... 66

XPN Filter Capacitor Selection ............................................................................................................................................................ 66

XPN Layout Considerations ................................................................................................................................................................. 66

Figure 34. Guard Traces and Kelvin Return for Remote Thermal Diode ........................................................................................... 66

Layout Considerations ......................................................................................................................................................................... 66

Small Form-Factor Pluggable (SFP) Transceivers ............................................................................................................................ 66

Figure 35. Typical SFP Control and Status I/O Signal Routing (not to scale) ................................................................................... 66

Power Supplies ...................................................................................................................................................................................... 67

Figure 36. Power Supply Routing and Bypassing .............................................................................................................................. 67

Using The MIC3000 In a 5V System .................................................................................................................................................... 67

Package Information ............................................................................................................................................................................. 68

24-Pin MLF® (ML) ................................................................................................................................................................................ 68

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Pin Configuration

789101112

24 23 22 21 20 19

VMPD

GNDA

VDDA

VILD–

VILD+

VDDD

GNDD

RSIN

VIN

CLK

SHDN

VRX

XPN

TXFAULT

TXDISABLE

DATA

VMOD+

VMOD–

VBIAS

COMP

RSOUT

RXLOS

24-Pin MLF®

Pin Descriptions

Pin Number Pin Name Pin Function

1 FB Analog Input. Feedback voltage for the APC loop op-amp . Polarity and

scale are programmable via the APC configuration bits. Connect to VBIAS if

APC is not used.

2 VMPD Analog Input. Multiplexed A/D converter input for monitoring transmitted

optical power via a monitor photodiode. In most applications, VMPD will be

connected directly to FB. The input range is 0 - VREF or 0 - VREF/4 depend-

ing on the setting of the APC configuration bits.

3 GNDA Ground return for analog functions.

4 VDDA Power supply input for analog functions.

5 VILD– Analog Input. Reference terminal for the multiplexed pseudo-differential A/D

converter inputs for monitoring laser bias current via a sense resistor (VILD+

is the sensing input). Tie to VDD or GND to reference the voltage sensed on

VILD+ to VDD or GND respectively. Limited common-mode voltage range,

see “Applications Information” section for more details.

6 VILD+ Analog Input. Multiplexed A/D input for monitoring laser bias current via a

sense resistor (signal input); accommodates inputs referenced to VDD or

GND (see pin 5 description). Limited common-mode voltage range, see

“Applications Information” section for more details.

7 SHDN Digital output; Programmable polarity. Asserted at the detection of a fault

condition that can be used to activate a second series transistor in the laser

current path, enhancing protection against single-point failures.

8 VRX Analog Input. Multiplexed A/D converter input for monitoring received optical

power. The input range is 0 to VREF.

9 XPN Analog Input/Output. Optional connection to an external PN junction for

sensing temperature at a remote location. The Zone bit in OEMCFG1

determines whether temperature is measured using the on-chip sensor or

the remote PN junction.

10 TXFAULT Digital Output; Open-Drain. A high level indicates a hardware fault impeding

transmitter operation. The state of this input is always reflected in the TXFLT

bit.

MIC3000 Micrel

M9999-101204 6 October 2004

Pin Descriptions

Pin Number Pin Name Pin Function

11 TXDISABLE Digital Input; Active High. The transmitter is disabled when this line is high or

the STXDIS bit is set. The state of this input is always reflected in the TXDIS

bit.

12 DATA Digital I/O; Open-drain. Bi-directional serial data input/output.

13 CLK Digital Input; Serial bit clock input.

14 VIN If bit 4 (IE) in USRCTL register is set to 0 (default), this pin is configured as

analog input. If IE bit is set to 1, this pin is configured as open-drain output.

Analog Input: Multiplexed A/D input for monitoring supply voltage. 0V to

5.5V input range.

Open-drain output: outputs the internally generated interrupt signal /INT.

15 RSIN Digital Input; Rate select input; ORed with rate select bit to determine the

state of the RSOUT pin. The state of this pin is always reflected in the RSEL

bit.

16 GNDD Ground return for digital functions.

17 NC No connection. This pin is used for test purposes and must be left uncon-

nected.

18 VDDD Power supply input for digital functions.

19 RXLOS Digital Output; Active-High/Open-Drain. Indicates the loss of the received

signal as indicated by a level of received optical power below the pro-

grammed RXLOS comparator threshold; may be wire-ORed with external

signals. Low indicates normal operation. The LOS bit reflects the state of

RXLOS whether driven by the MIC3000 or an external circuit.

20 RSOUT Digital Output. Open-Drain. This output is controlled by the SRSEL bit ORed

with RSIN input and is open drain only.

21 COMP Analog Output, compensation terminal. Connect a capacitor between this pin

and GNDA or VDDA with appropriate value to tune the APC loop time

constant to a desirable value.

22 VBIAS Analog Output. Buffered DAC output capable of sourcing or sinking up to

10mA under control of the APC function to drive an external transistor for

laser diode D.C. bias. The output and feedback polarity are programmable to

accommodate either a NPN or an PNP transistor to drive a common anode

or common-cathode laser diode.

23 VMOD– Analog Input. Inverting terminal of VMOD buffer op-amp. Connect to VMOD+

(gain = 1) or feedback resistors network to set a different gain

24 VMOD+ Analog Output. Buffered DAC output to set the modulation current on the

laser driver IC. Operates with either a 0– VREF or a (VDD–VREF) – VDD

output swing so as to generate either a ground-referenced or a VDD refer-

enced programmed voltage. A simple external circuit can be used to

generate a programmable current for those drivers that require a current

rather than a voltage input. See “Applications Information” section for more

details.

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Absolute Maximum Ratings(1)

Power Supply Voltage, VDD .................................................. +3.8V

Voltage on CLK, DATA, TXFAULT, VIN, RXLOS,

DISABLE, RSIN ....................................... –0.3V to +6.0V

Voltage On Any Other Pin .................... –0.3V to VDD+0.3V

Power Dissipation, TA = 85°C ...................................... 1.5W

Junction Temperature (TJ) ......................................... 150°C

Storage Temperature (TS) ........................ –65°C to +150°C

ESD Ratings(3)

Human Body Model ................................................... 2kV

Machine Model ......................................................... 300V

Soldering (20sec) ....................................................... 260ºC

Operating Ratings(2)

Power Supply Voltage, VDDA/VDDD .................. +3.0V to +3.6V

Ambient Temperature Range (TA) ............ –40°C to +105°C

Package Thermal Resistance

MLF® (θJA) .......................................................... 43°C/W

Electrical Characteristics

For typical values, TA = 25°C, VDDA = VDDD = +3.3V, unless otherwise noted. Bold values are guaranteed for +3.0V - (VDDA = VDDD)

- 3.6V, T(min) - TA - T(max)(8)

Symbol Parameter Condition Min Typ Max Units

Power Supply

IDD Supply Current CLK = DATA = VDDD = VDDA;TXDISABLE low; 2.3 3.5 mA

all DACs at full-scale; all A/D inputs at

full-scale; all other pins open.

CLK = DATA = VDDD = VDDA; TXDISABLE high; 2.3 3.5 mA

FLTDAC at full-scale; all A/D inputs at

full-scale; all other pins open.

VPOR Power-on Reset Voltage All registers reset to default values; 2.9 2.98 V

A/D conversions initiated.

VUVLO Under-Voltage Lockout Threshold Note 5 2.6 2.73 V

VHYST Power-on Reset Hysteresis Voltage 170 mV

tPOR Power-on Reset Time VDD > VPOR(4) 50 µs

VREF Reference Voltage 1.210 1.225 1.240 V

∆VREF/∆VDDA Voltage Reference Line Regulation 1.7 mV/V

Temperature-to-Digital Converter Characteristics

Local Temperature Measurement Error –40°C - TA - +105°C(6) ±1 ±3 °C

Remote Temperature Measurement –40°C - TA - +105°C(6) ±1 ±3 °C

Error

tCONV Conversion Time Note 4 60 ms

tSAMPLE Sample Period 100 ms

Remote Temperature Input, XPN

IFCurrent to External Diode(4) XPN at high level, clamped to 0.6V. 192 400 µA

XPN at low level, clamped to 0.6V. 7 12 µA

MIC3000 Micrel

M9999-101204 8 October 2004

Electrical Characteristics

Symbol Parameter Condition Min Typ Max Units

Voltage-to-Digital Converter Characteristics (VRX, VAUX, VBIAS, VMPD, VILD+/–)

Voltage Measurement Error –40°C - TA - +105°C(6) ±1 ±2.0 % fs

tCONV Conversion Time Note 4 10 ms

tSAMPLE Sample Period Note 4 100 ms

Voltage Input, VIN (Pin 14 used as an ADC Input)

VIN Input Voltage Range –0.3 - VDD - 3.6V GNDA 5.5 V

ILEAK Input Current VIN = VDD or GND; VAUX = VIN 55 µA

CIN Input Capacitance 10 pF

Digital-to-Voltage Converter Characteristics (VMOD, VBIAS)

Accuracy –40°C - TA - +105°C(6) ±1 2.0 % fs

tCONV Conversion Time Note 4 20 ms

DNL Differential Non-linearity Error Note 4 ±0.5 ±1 LSB

Bias Current Sense Inputs, VILD+, VILD–

VILD Differential Input Signal Range, 0 VREF/4 mV

| VILD+ – VILD– |

IIN+ VILD+ Input Current ±1 µA

IIN– VILD– Input Current VILD– referred to VDDA +150 µA

| VILD+ – VILD– | = 0.3V VILD– referred to GND –150 µA

CIN Input Capacitance 10 pF

APC Op Amp, FB, VBIAS, COMP

GBW Gain Bandwidth Product CCOMP = 20pF; Gain = 1 1 MHz

TCVOS Input Offset Voltage Temperature 1 µV/°C

Coefficient(4)

VOUT Output Voltage Swing IOUT = 10mA, SRCE bit = 1 GNDA 1.25 V

IOUT = -10mA, SRCE bit = 0 VDDA–1.25 VDDA V

ISC Output Short-Circuit Current 55 mA

tSC Short Circuit Withstand Time TJ - 150°C(4) sec

PSRR Power Supply Rejection Ratio CCOMP = 20pF; Gain = 1, to GND 55 dB

CCOMP = 20pF; Gain = 1, to VDD 40

AMIN Minimum Stable Gain CCOMP = 20pF, Note 4 1V/V

∆V/∆t Slew Rate CCOMP = 20pF; Gain = 1 3 V/µs

∆RFB Internal Feedback Resistor Tolerance ±20 %

∆RFB/∆t Internal Feedback Resistor 25 ppm/C

Temperature Coefficient

CIN Pin Capacitance 10 pF

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Electrical Characteristics

Symbol Parameter Condition Min Typ Max Units

VMOD Buffer Op-Amp, VMOD+, VMOD–

GBW Gain Bandwidth CCOMP = 20pF; Gain = 1 1 MHz

TCVOS Input Offset Voltage Temperature 1 µV/°C

Coefficient

IBIAS VMOD – Input Current ±0.1 ±1 µA

VOUT Output Voltage Swing IOUT = ±1mA GNDA+75 VDDA–75 mV

ISC Output Short-Circuit Current 35 mA

tSC Short Circuit Withstand Time TJ - 150°C(4) sec

PSRR Power Supply Rejection Ratio CCOMP = 20pF; Gain = 1, to GND 65 dB

CCOMP = 20pF; Gain = 1, to VDD 44 dB

AMIN Minimum Stable Gain CCOMP = 20pF 1V/V

∆V/∆T Slew Rate CCOMP = 20pF; Gain = 1 1 V/µs

CIN Pin Capacitance 10 pF

Control and Status I/O, TXDISABLE, TXFAULT, RSIN, RSOUT, SHDN, RXLOS, /INT

VIL Low Input Voltage 0.8 V

VIH High Input Voltage 2.0 V

VOL Low Output Voltage IOL - 3mA 0.3 V

VOH High Output Voltage IOH - 3mA VDDD–0.3 V

(applies to SHDN only)

ILEAK Input Current ±1 µA

CIN Input Capacitance 10 pF

Transmit Optical Power Input, VMPD

VIN Input Voltage Range Note 4 GNDA VDDA V

VRX Input Signal Range BIASREF=0 0V

REF V

BIASREF=1 VDDA–VREF VDDA V

CIN Input Capacitance Note 4 10 pF

ILEAK Input Current ±1 µA

Received Optical Power Input, VRX, RXPOT

Input Voltage Range Note 4 GNDA VDDA V

VRX Valid Input Signal Range 0V

REF V

(ADC Input Range)

CIN Input Capacitance Note 4 10 pF

ILEAK Input Current ±1 µA

MIC3000 Micrel

M9999-101204 10 October 2004

Electrical Characteristics

Symbol Parameter Condition Min Typ Max Units

Control and Status I/O Timing, TXFAULT, TXDISABLE, RSIN, RSOUT, and RXLOS

tOFF TXDISABLE Assert Time From input asserted to optical output at 10 µs

10% of nominal, CCOMP = 10nF.

tON TXDISABLE De-assert Time From input de-asserted to optical output 1ms

at 90% of nominal, CCOMP = 10nF.

tINIT Initialization Time From power on or transmitter enabled to 300 ms

optical output at 90% of nominal and

TX_FAULT de-asserted.(4)

tINIT2 Power-on Initialization Time From power on to APC loop enabled. 200 ms

tFAULT TXFAULT Assert Time From fault condition to TXFAULT 95 µs

assertion.(4)

tRESET Fault Reset Time Length of time TXDISABLE must be 10 µs

asserted to reset fault condition.

tLOSS_ON RXLOS Assert Time From loss of signal to RXLOS asserted. 95 µs

tLOSS_OFF RXLOS De-assert Time From signal acquisition to LOS 100 µs

de-asserted.

tDATA Analog Parameter Data Ready From power on to valid analog parameter 400 ms

data available.(4)

tPROP_IN TXFAULT, TXDISABLE, RXLOS, Time from input change to corresponding 1µs

RSIN Input Propagation Time internal register bit set or cleared.(4)

tPROP_OUT TXFAULT, RSOUT, /INT Output From an internal register bit set or cleared 1µs

Propagation Time to corresponding output change.(4)

Fault Comparators

φFLTTMR Fault Suppression Timer Clock Note 4 0.475 0.5 0.525 ms

Period

Accuracy -3 +3 %F.S.

tREJECT Glitch Rejection Maximum length pulse that will not cause 4.5 µs

output to change state.(4)

VSAT Saturation Detection Threshold High level 95

%VDDA

Low level 5

%VDDA

Power-On Hour Meter

Timebase Accuracy 0°C - TA - +70°C(4) +5 –5 %

–40°C - TA - +105°C +10 –10 %

Resolution Note 4 10 hours

Non-Volatile (FLASH) Memory

tWR Write Cycle Time(8) From STOP of a one to four-byte write 13 ms

transaction.(4)

Data Retention 100 years

Endurance Minimum Permitted Number Write 10,000 cycles

Cycles

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Electrical Characteristics

Symbol Parameter Condition Min Typ Max Units

Serial Data I/O Pin, DATA

VOL Low Output Voltage IOL = 3mA 0.4 V

IOL = 6mA 0.6 V

VIL Low Input Voltage 0.8 V

VIH High Input Voltage 2.1 V

ILEAK Input Current ±1 µA

CIN Input Capacitance Note 4 10 pF

Serial Clock Input, CLK

VIL Low Input Voltage 2.7V - VDD - 3.6V 0.8 V

VIH High Input Voltage 2.7V - VDD - 3.6V 2.1 V

ILEAK Input Current ±1 µA

CIN Input Capacitance Note 4 10 pF

Serial Interface Timing(4)

t1CLK (clock) Period 2.5 µs

t2Data in Setup Time to CLK High 100 ns

t3Data Out Stable After CLK Low 300 ns

t4DATA Low Setup Time to CLK Low Start Condition 100 ns

t5DATA High Hold Time After CLK High Stop Condition 100 ns

tDATA Data Ready Time From power on to completion of one set of 400 ms

ADC conversions; analog data available via

serial interface.

tTO BUS Timeout CLK Low 25 30 35 ms

Notes:

1. Exceeding the absolute maximum rating may damage the device.

2. The device is not guaranteed to function outside its operating rating.

3. Devices are ESD sensitive. Handling precautions recommended.

4. Guaranteed by design and/or testing of related parameters. Not 100% tested in production.

5. The MIC3000 will attempt to enter its shutdown state when VDD falls below VUVLO. This operation requires time to complete. If the supply voltage falls

too rapidly, the operation may not be completed.

6. Does not include quantization error.

7. Final test on outgoing product is performed at TA = +25°C.

8. The MIC3000 will not respond to serial bus transactions during an EEPROM write-cycle. The host will receive a NACK during tWR.

Timing Diagram

t4 t2 t5

DATA

(Output)

DATA

(Input)

CLK

Serial Interface Timing

MIC3000 Micrel

M9999-101204 12 October 2004

Address Map

Address(s) Field Size (Bytes) Name Description

0 - 95 96 Serial ID defined by G-P NVRAM; R/W under valid OEM password.

SEP MSA

96 - 127 32 Vendor Specific Vendor specific EEPROM

128 - 255 128 Reserved Reserved for future use. G-P NVRAM; R/W under valid OEM

password.

Table 1. MIC3000 Address Map, Serial address = A0h

Address Field Size

HEX DEC (Bytes) Name Description

00–27 0–39 40 Alarm and Warning Thresholds High/low limits for warning and alarms; write-able using OEM p/w;

read-only otherwise.

28–37 40–55 16 Reserved Reserved – do not write; reads undefined.

38–5B 56 –91 36 Calibration Constants Numerical constants for external calibration; writeable using OEM

p/w; read-only otherwise.

5C–5E 92–94 3 Reserved Reserved – do not write; reads undefined.

5F 95 1 Checksum G-P NVRAM; writeable using OEM p/w; read-only otherwise.

60–69 96–105 10 Analog Data Real time analog parameter data.

6A–6D 106–109 4 Reserved Reserved for future definition of digitized analog input– do not write;

reads undefined.

6E 110 1 Control/Status bits Control and status bits.

6F 111 1 Reserved Reserved – do not write; reads undefined.

70–71 112–113 2 Alarm Flags Alarm status bits; read-only.

72–73 114–115 2 Reserved Reserved–do not write; reads undefined.

74–75 116–117 2 Warning Flags Warning status bits; read-only.

76–77 118–119 2 Reserved Reserved – do not write; reads undefined.

78–7B 120–123 4 OEMPW OEM password entry field.

7C–7F 124–127 4 Vendor Specific Vendor specific. Reserved–do not write; reads undefined.

80–F7 128–247 120 User Scratchpad User writable EEPROM. G-P NVRAM; R/W using any valid

password.

F8–F9 248–249 2 Reserved Reserved – do not write; reads undefined.

FA 250 1 USRPWSET User password setting; read/write using any p/w; returns zero

otherwise.

FB 251 1 USRPW Entry field for user password.

FC–FD 252–253 2 POH Power-on hour meter result; read-only.

FE 254 1 Data Ready Flags Data ready bits for each measured parameter; read-only.

FF 255 1 User Control End-user control and status bits.

Table 2. MIC3000 Address Map, Serial Address = A2h

October 2004 13 M9999-101204

MIC3000 Micrel

Address(s) Field Size

HEX DEC (Bytes) Name Description

00–3F 0–63 64 APCLUTn A.P.C. temperature compensation L.U.T.

40–7F 64–127 64 MODLUTn VMOD temperature compensation L.U.T.

80–BF 128–191 64 IFLTLUT Bias current fault threshold temperature compensation L.U.T.

C0–FF 192–255 64 EOLLUTn Bias current high alarm threshold temperature compensation L.U.T.

Table 3. Temperature Compensation Tables, Serial Address = A4h

Address Field Size

HEX DEC (Bytes) Name Description

00 0 1 OEMCFG0 Control/status bits

01 1 1 OEMCFG1 Control/status bits

02 2 1 OEMCFG2 Control/status bits

03 3 1 APCSET0 APC setpoint 0

04 4 1 APCSET1 APC setpoint 1

05 5 1 APCSET2 APC setpoint 2

06 6 1 MODSET Nominal modulation DAC setpoint

07 7 1 IBFLT Bias current fault-comparator threshold

08 8 1 TXPFLT TX power fault threshold

09 9 1 LOSFLT RX LOS fault-comparator threshold

0A 10 1 FLTTMR Fault comparator masking interval timer setting

0B 11 1 FLTMSK Fault source mask bits

0C–0F 12–15 4 OEMPWSET Password for access to OEM areas

10 16 1 OEMCAL0 OEM calibration register 0

11 17 1 OEMCAL1 OEM calibration register 1

12 18 1 LUTINDX Look-up table index read-back

13 19 1 RESERVED Reserved - do not write; reads undefined

14 20 1 APCDAC Reads back current APC DAC setting

15 21 1 MODDAC Reads back current modulation DAC setting

16 22 1 OEMREAD Reads back OEM calibration data

17–1F 23–31 6 RESERVED Reserved - do not write; reads undefined

20–27 32–39 8 POHDATA Power-on hour meter scratchpad

28–7D 40–125 85 RESERVED Reserved–do not write; reads undefined

7E–FD 126–253 128 SCRATCH OEM scratchpad area

FE 254 1 MFG_ID Manufacturer identification (Micrel = 42)

FF 255 1 DEV_ID Device and die revision

Table 4. OEM Configuration Registers, Serial Address = A6h

MIC3000 Micrel

M9999-101204 14 October 2004

Block Diagram

APC

MODULATION

CONTROL

STATE-

MACHINES

TIMING

FAULT DETECTION

A-D CONVERTER

SIGNAL

CONDITIONING

LASER

CONTROL

MEMORY

ARBITRATION

I2C

DATA

XPN

VRX

VIN

VMPD

VILD–

VILD+

SHDN

VMOD

–

VMOD

COMP

VBIAS

CLOCK

INT

RXLOS

RSOUT

RSIN

XDISABLE

TXFAULT

MIC3000

NVRAM

REGISTERS

SERIAL ID

SCRATCH

LUTs

POWER-ON

HOUR METER CLOCK

POR TEMP

SENSOR

Figure 1. MIC3000 Block Diagram

Analog-to-Digital Converter/Signal Monitoring

A block diagram of the monitoring circuit is shown below.

Each of the five analog parameters monitored by the MIC3000

are sampled in sequence. All five parameters are sampled

and the results updated within the tCONV internal given in the

“Electrical Characteristics” section. In OEM Mode, the chan-

nel that is normally used to measure VIN may be assigned to

measure the level of the VDDA pin or one of five other nodes.

This provides a kind of analog loopback for debug and test

purposes. The VAUX bits in OEMCFG0 control which voltage

source is being sampled. The various VAUX channels are

level-shifted differently depending on the signal source, re-

sulting in different LSB values and signal ranges. See Table

October 2004 15 M9999-101204

MIC3000 Micrel

ADC Resolution

Channel (bits) Conditions Input Range (V) LSB(1)

TEMP 8 N/A 1°C

VAUX 8 See Table 6

VMPD 8 GAIN = 0; BIASREF = 0 GNDA – VREF 4.77mV

GAIN = 0; BIASREF = 1 VDDA – (VDDA – VREF)

GAIN = 1; BIASREF = 0 GNDA – VREF/4 1.17mV

GAIN = 1; BIASREF = 1 VDDA – (VDDA – VREF/4)

VILD 8 VILD– = VDDA VDDA – (VDDA – VREF) 4.77mV

VILD– = GNDA GNDA – VREF

VRX 8 n/a 0 – VREF 4.77mV

Table 5. A/D Input Signal Ranges and Resolutions

Note:

1. Assumes typical VREF value of 1.22V.

Channel VAUX[2:0] Input Range (V) LSB(1) (mV)

VIN 000 = 00h0V to 5.5V 25.6mV

VDDA 001 = 01h0V to 5.5V 25.6mV

VBIAS 010 = 02h0V to 5.5V 25.6mV

VMOD 011 = 03h0V to 5.5V 25.6mV

APCDAC 100 = 04h0V to VREF 4.77mV

MODDAC 101 = 05h0V to VREF 4.77mV

FLTDAC 110 = 06h0V to VREF 4.77mV

Table 6. VAUX Input Signal Ranges and Resolutions

Note:

1. Assumes typical VREF value of 1.22V.

VILD–

TEMP

SENSOR

VAUX[2:1]

FLTDAC

ODDAC

APCDAC

VBIAS

VMOD

VDDA

VIN

VILD+

VRX

VMPD

7-CH

MUX

5-CH

MUX TEMP

SENSOR SIGMA-DEL TA ADC

Figure 2. Analog-to-Digital Converter Block Diagram

MIC3000 Micrel

M9999-101204 16 October 2004

External Calibration

The MIC3000 is designed to support the implementation of an

optical transceiver employing external calibration, as de-

scribed by SFF-8472, Digital Monitoring Interface specifica-

tions. The voltage and temperature values returned by the

MIC3000’s A/D converter are internally calibrated. The binary

values of TEMPh:TEMPl and VOLTh:VOLTl are in the format

called for by SFF-8472 under Internal Calibration. However,

since the other parameters are not internally calibrated, an

MIC3000-based transceiver must be labeled as externally

calibrated.

SFF-8472 calls for a set of calibration constants to be stored

by the transceiver OEM at specific non-volatile memory

locations, refer to SFF-8472 specifications for memory map

of calibration coefficient. The MIC3000 provides the non-

volatile memory required for the storage of these constants.

The Digital Diagnostic Monitoring Interface specification

should be consulted for full details. Slopes and offsets are

stored for use with voltage, temperature, bias current, and

transmitted power measurements. Coefficients for a fourth-

order polynomial are provided for use with received power

measurements. The host system can retrieve these con-

stants and use them to process the measured data. Since

voltage and temperature require no calibration, the corre-

sponding slopes should generally be set to unity and the

offsets to zero.

Voltage

The voltage values returned by the MIC3000’s A/D converter

are internally calibrated. The binary values of VOLTh:VOLTl

are in the format called for by SFF-8472 under Internal

Calibration. Since VINh:VINl requires no processing, the

corresponding slope should be set to unity and the offset to

zero.

Temperature

The temperature values returned by the MIC3000’s A/D

converter are internally calibrated. The binary values of

TEMPh:TEMPl are in the format called for by SFF-8472

under Internal Calibration. Since TEMPh:TEMPl requires no

processing, the corresponding slope should be set to unity

and the offset to zero.

Bias Current

Bias current is sensed via an external sense resistor as a

voltage appearing at VILD+ and VILD-. The value returned by

the A/D is therefore a voltage analogous to bias current. Bias

current, IBIAS, is simply VVILD/RSENSE. The binary value in

IBIASh (IBIASl is always zero) is related to bias current by:

0 300V IBIASh

255

BIAS SENSE

⎛

⎝

⎜⎞

⎠

⎟

(. )

(1)

The value of the least significant bit (LSB) of IBIASh is

given by:

SB IBIASh

0 300V

255 R Amps

300mV

255 R mA

1191 4

SENSE SENSE SENSE

()

=×=×=µ

(2)

Per SFF-8472, the value of the bias current LSB is 2µA. The

conversion factor, “slope”, needed is therefore:

Slope 1191 4 A

2A R 595 7 R

SENSE SENS

=µ

µ× =÷

The tolerance of the sense resistor directly impacts the

accuracy of the bias current measurement. It is recom-

mended that the sense resistor chosen maintain accuracy of

1% or better. The offset correction, if needed, can be deter-

mined by shutting down the laser, i.e., asserting TXDISABLE,

and measuring the bias current. Any non-zero result gives the

offset required. The offset will be equal and opposite to the

result of the “zero current” measurement.

TX Power

Transmit power is sensed via an external sense resistor as a

voltage appearing at VMPD. It is assumed that this voltage is

generated by a sense resistor carrying the monitor photo-

diode current. In most applications, the signal at VMPD will be

feedback voltage on FB. The VMPD voltage may be mea-

sured relative to GND or VDDA depending on the setting of the

BIASREF bit in OEMCFG1. The value returned by the A/D is

therefore a voltage analogous to transmit power. The binary

value in TXOPh (TXOPl is always zero) is related to transmit

power by:

mW K VREF TXOPh

255

K 1220mV TXOPh

255

K 4 75656 TXOPh

RmW

TX SENSE SENSE

SENSE

()

×⎛

⎝

⎜⎞

⎠

⎟

()

⎛

⎝

⎜⎞

⎠

⎟

=××

(3)

For a given implementation, the value of RSENSE is known. It

is either the value of the external resistor or the chosen value

of RFB used in the application. The constant, K, will likely

have to be determined through experimentation or closed-

loop calibration, as it depends on the monitoring photodiode

responsivity and coupling efficiency.

It should be noted that the APC circuit acts to hold the

transmitted power constant. The value of transmit power

reported by the circuit should only vary by a small amount as

long as APC is functioning correctly.

RX Power

Received power is sensed as a voltage appearing at VRX. It

is assumed that this voltage is generated by a sense resistor

carrying the receiver photodiode current. The value returned

by the A/D is therefore a voltage analogous to received

power. The binary value in RXOPh (RXOPl is always zero) is

related to received power by:

mW K VREF RXOPh

255

K 1220mV RXOPh

255

RX()=× × =× ×

(4)

For a given implementation, the constant, K, will likely have

to be determined through experimentation or closed-loop

calibration, as it depends on the gain and efficiencies of the

components upstream. In SFF-8472 implementations, the

external calibration constants can describe up to a fourth-

order polynomial in case K is nonlinear.

October 2004 17 M9999-101204

MIC3000 Micrel

Laser Diode Bias Control

The MIC3000 can be configured to generate a constant bias

current using electrical feedback, or regulate average trans-

mitted optical power using a feedback signal from a monitor

photodiode, see Figure 3. An operational amplifier is used to

control laser bias current via the VBIAS output. The VBIAS pin

can drive a maximum of ±10mA. An external bipolar transistor

provides current gain. The polarity of the op amp’s output is

programmable BIASREF in OEMCFG1 in order to accommo-

date either NPN or PNP transistors that drive common anode

and common cathode laser, respectively. Additionally, the

polarity of the feedback signal is programmable for use with

either common-emitter or emitter-follower transistor circuits.

Furthermore, the reference level for the APC circuit is select-

able to accommodate electrical, i.e., current feedback, or

optical feedback via a monitor photodiode. Finally, any one of

seven different internal feedback resistors can be selected.

This internal resistor can be used alone or in parallel with an

external resistor. This wide range of adjustability (50:1)

accommodates a wide range of photodiode current, i.e, wide

range of transmitter output power. The APC operating point

can be kept near the mid-scale value of the APC DAC,

insuring maximum SNR, maximum effective resolution for

digital diagnostics, and the widest possible DAC adjustment

range for temperature compensation, etc. See Figure 4.

The APCCAL bit in OEMCAL0 is used to turn the APC

function on and off. It will be turned off in the MIC3000’s

default state as shipped from the factory. When APC is on,

the value in the selected APCSETx register is added to the

signed value taken from the APC look-up table and loaded

into the VBIAS DAC. When APC is off, the VBIAS DAC may be

written directly via the VBIAS register, bypassing the look-up

table entirely. This provides direct control of the laser diode

bias during setup and calibration. In either case, the VBIAS

DAC setting is reported in the APCDAC register. The APCCFG

bits determine the DACs response to higher or lower numeric

values.

DAC

INV

GAIN

APC

Look-Up

Table

Temp

Sensor

VMOD

Look-Up

Table

APCSET

DAC

MODSET MODREF

VMOD

–

VMOD

COMP

VBIAS

RFB[2:0] VDD

VOUT

VDD-OUT

VOUT

VDD-OUT

BIASREF

Figure 3. MIC3000 APC and Modulation Control

Block Diagram

APC Op-Amp

RFB[2:0]

BIASREF

51.2k

25.6k R5

12.8k R4

6.4k R3

3.2k R2

1.6k R1

0.8k V

Figure 4. Programmable Feedback Resistor

Laser Modulation Control

As shown in Figure 3, a temperature-compensated DAC is

provided to set and control the laser modulation current via an

external laser driver circuit. MODREF in OEMCFG0 selects

whether the VMOD DAC output swings up from ground or

down from VDD. If the laser driver requires a voltage input to

set the modulation current, the MIC3000’s VMOD output can

drive it directly. If a current input is required, a fixed resistor

can be used between the driver and the VMOD output. Several

different configurations are possible, as shown in Figure 6.

When APC is on, i.e., the APCCAL bit in OEMCAL0 is set to

0, the value corresponding to the current temperature is taken

from the MODLUT look-up table, added to MODSET, and

loaded into the VMOD DAC. When APC is off, the value in

VMOD is loaded directly into the VMOD DAC, bypassing the

look-up table entirely. This provides for direct modulation

control for setup and calibration. The MODREF bit deter-

mines the DACs response to higher or lower numeric values.

ommon-cathode with

monitor photodiode Common-anode wi

monitor photodiod

Common-anode Common-cathode

Figure 5. Transmitter Configurations

Supported by MIC3000

MIC3000 Micrel

M9999-101204 18 October 2004

DAC

MODREF

MOD

Configured As Buffered Voltage Output

Output Swing = 0 to VREF or VDDA to (VDDA–VREF)

MOD

–

MOD

VOUT

VDD-OUT

DAC

MODREF

MOD

Configured As Voltage Output with Gain

Output Swing = 0 to (VREF×A)

MOD

–

MOD

VOUT

VDD-OUT

Gain = A = R1+R2

Figure 6. VMOD Configured as Voltage Output with Gain

October 2004 19 M9999-101204

MIC3000 Micrel

VBIAS Shutdown

Configuration Bits State

OE INV BIASREF VBIAS

0 Don’t Care Don’t Care Hi-Z

1 Don’t Care 0 ³GND

1 Don’t Care 1 ³VDD

Table 9. Shutdown State of VBIAS vs.

Configuration Bits

Configuration Bits VMOD Shutdown State

OE MODREF VMOD

0 Don’t Care Hi-Z

1 0 ³GND

11 ³V

Table 10. Shutdown state of VMOD vs.

Configuration bits

In order to facilitate hot-plugging, the laser diode is not turned

on until tINIT2 after power-on. Following tINIT2, and assuming

TXDISABLE is not asserted, the DACs will be loaded with

their initial values. Since tCONV is much less than tINIT2, the

first set of analog data, including temperature, is available at

tINIT2. Temperature compensation will be applied to the DAC

values if enabled. APC will begin if OE is asserted. (If the

output enable bit, OE, is not set, the VMOD, VBIAS, and SHDN

outputs will float indefinitely.) Figure 7 shows the power-up

timing of the MIC3000. If TXDISABLE is asserted at power-

up, the VMOD and VBIAS outputs will stay in their shutdown

states following MIC3000 initialization. A/D conversions will

begin, but the laser will remain off.

Power ON and Laser Start-Up

When power is applied, the MIC3000 initializes its internal

registers and state machine. This process takes tPOR, about

50µs. Following tPOR, analog-to-digital conversions begin,

serial communication is possible, and the POR bit and data

ready bits may be polled. The first set of analog data will be

available tCONV after tPOR. MIC3000s are shipped from the

factory with the output enable bit, OE, set to zero, off. The

MIC3000’s power-up default state, therefore, is APC off,

VBIAS, VMOD, and SHDN outputs disabled. VBIAS, VMOD, and

SHDN will be floating (high impedance) and the laser diode,

if connected, will be off. Once the device is incorporated into

a transceiver and properly configured, the shutdown states of

SHDN, VBIAS and VMOD will be determined by the state of the

APC configuration and OE bits. Table 8, Table 9, and Table

10 illustrate the shutdown states of the various laser control

outputs versus the control bits.

Configuration Bits Shutdown State

OE SPOL SHDN

0 Don’t Care Hi-Z

1 0 ³GND

11 ³V

Table 8. Shutdown State of SHDN vs.

Configuration Bits

tINIT

tCONV

tON(2)

tPOR

VPOR

TXFAULT

TXDISABLE

|VMOD|

|VBIAS|

TX Output

(a) MIC3000 Power-On, TXDISABLE not Asserted

SHDN(1)

DATA_READY

VDD

90% nominal output

TX Output

(b) MIC3000 Power-On, TXDISABLE Asserted

tINIT

tCONV

tPOR

VPOR

TXFAULT

TXDISABLE

|VMOD|

|VBIAS|

SHDN(1)

DATA_READY

VDD

Notes:

1. Polarity programmable; active-high shown.

2. Determined by loop response, e.g., CCOMP.

Figure 7. MIC3000 Power-On Timing (OE=1)

MIC3000 Micrel

M9999-101204 20 October 2004

Fault Comparators

In addition to detecting and reporting the events specified in

SFF-8472, the MIC3000 also monitors five fault conditions:

inadequate supply voltage, thermal diode faults, excessive

bias current, excessive transmit power, and APC op-amp

saturation. Comparators monitor these parameters in order

to respond quickly to fault conditions that could indicate link

failure or safety issues, see Figure 8. When a fault is detected,

the laser is shut down and TXFAULT is asserted. Each fault

source may be independently disabled using the FLTMSK

only during calibration and testing or permanently.

FLTDAC

IBFLT

COUNTER

tFLTTMR

FLTTMR

VDDA Saturation Detector

VCOMP

VILD

VUVLO

VDD

VMPD

DIODE_FAULT

TXFLT bit

/LASER_SHUTDOW

TXFAULT pin

FLTDAC

TXPFLT

5% VDDA

95% VDDA

Figure 8. Fault Comparator Logic

Thermal diode faults are detected within the temperature

measurement subsystem when an out-of-range signal is

detected. A window comparator circuit monitors the voltage

on the compensation capacitor to detect APC op-amp satu-

ration (Figure 9). Op-amp saturation indicates that some fault

has occurred in the control loop such as loss of feedback. The

saturation detector is blanked for a time, tFLTTMR, following

laser turn-on since the compensation voltage will essentially

be zero at turn-on. The FLTTMR interval is programmable

from 0.5ms to 127ms (typical) in increments of 0.5ms

(φFLTTMR). Note that a saturation comparator cannot be relied

upon to meet certain eye-safety standards that require 100µs

response times. This is because the operation of a saturation

detector is limited by the loop bandwidth, i.e., the choice of

CCOMP. Even if the comparator itself was very fast, it would

be subject to the limited slew-rate of the APC op-amp. Only

the other fault comparator channels will meet <100µs timing

requirements.

A similar comparator circuit monitors received signal strength

and asserts RXLOS when loss-of-signal is detected (Figure

10). RXLOS will be asserted when and if VRX drops below the

level programmed in LOSFLT. The loss-of-signal comparator

may be disabled completely by setting the LOSDIS bit in

OEMCFG3. Once the LOS comparator is disabled, an exter-

nal device may drive RXLOS. The state of the RXLOS pin is

reported in the CNTRL register regardless of whether it is

driven by the internal comparator or by an external device. A

programmable digital-to-analog converter provides the com-

parator reference voltages for monitoring received signal

strength, transmit power, and bias current. Glitches less than

4µs (typical) in length are rejected by the fault comparators.

Since laser bias current varies greatly with temperature,

there is a temperature compensation look-up table for the

bias current fault DAC value.

When a fault condition is detected, the laser will be immedi-

ately shutdown and TXFAULT will be asserted. The VMOD,

VBIAS, and SHDN (if enabled) outputs will be driven to their

shutdown state according to the state of the configuration

bits. The shutdown states of VMOD, VBIAS, and SHDN versus

the configuration bit settings are shown in Table 8, Table 9,

and Table 10.

Duty-Cycle Limiting

When a fault occurs and TXFAULT is asserted, an internal

timer starts. Operation cannot resume until this timer expires.

This limits the duty-cycle that can be achieved while a fault

condition is present, preventing the host from causing an eye-

unsafe condition by continually cycling the laser on and off.

Given that the fault comparator propagation delay is 95µs

and the restart delay is 200ms, the maximum duty-cycle that

can theoretically be achieved in the presence of a persistent

fault is on the order of 0.095/200ms ♠ 0.0475% (0.095s is the

maximum fault comparator propagation delay; 200ms is the

typical reset delay interval).

If a fault occurs and the host toggles TXDISABLE within

200ms, the MIC3000 will wait until the interval expires before

restarting the laser. If the restart delay has expired, i.e., it has

been at least 200ms since the last occurrence of a fault, then

the MIC3000 will begin the restart sequence immediately.

The operation of this timer is transparent to the host and does

not require any special action. The system will still meet the

300ms startup requirement called for in specifications such

as the SFP MSA. If the host toggles TXDISABLE more than

once during the 200ms interval, the timing remains the same.

The laser is restarted after the expiration of the 200ms timer.

Temperature Measurement

The temperature-to-digital converter for both internal and

external temperature data is built around a switched current

source and an eight-bit analog-to-digital converter. The tem-

perature is calculated by measuring the forward voltage of a

diode junction at two different bias current levels. An internal

multiplexer directs the current source’s output to either an

internal or external diode junction. The value of the ZONE bit

in OEMCFG1 determines whether readings are taken from

the on-chip sensor or from the XPN input. The external PN

junction may be embedded in an integrated circuit, or it may

be a diode-connected discrete transistor. This data is also

used as the input to the temperature compensation look-up

tables. Each time temperature is sampled and an updated

value acquired, new corrective values for IMOD and the APC

setpoint are read from the corresponding tables, added to the

set values, and transferred to DACs.

October 2004 21 M9999-101204

MIC3000 Micrel

Diode Faults

The MIC3000 is designed to respond in a failsafe manner to

hardware faults in the temperature sensing circuitry. If the

connection to the sensing diode is lost or the sense line is

shorted to VDD or ground, the temperature data reported by

the A/D converter will be forced to its full-scale value (+127°C).

The diode fault flag, DFLT, will be set in OEMCFG1, TXFAULT

will be asserted, and the high temperature alarm and warning

flags will be set. The reported temperature will remain +127°C

until the fault condition is cleared. Diode faults may be reset

by toggling TXDISABLE, as with any other fault. Diode faults

will not be detected at power up until the first A/D conversion

cycle is completed. Diode faults are not reported while

TXDISABLE is asserted.

Temperature Compensation

Since the performance characteristics of laser diodes and

photodiodes change with operating temperature, the MIC3000

provides a facility for temperature compensation of the A.P.C.

loop setpoint, laser modulation current, bias current fault

comparator threshold, and bias current high alarm flag thresh-

old. Temperature compensation is performed using a look-up

table (LUT) that stores values corresponding to each mea-

sured temperature over a 128°C span. Four identical tables

reside at serial address A4h as summarized in Table 11. The

range of temperatures spanned by the tables is program-

mable via the LUTOFF register. Each table entry is a signed

twos complement number that is used as an offset to the

parameter being compensated. The default value of all table

entries is zero, giving a flat response.

The A/D converter reports a new temperature sample each

tCONV. This occurs at roughly 10Hz. To prevent temperature

oscillation due to thermal or electrical noise, sixteen succes-

sive temperature samples are averaged together and used to

index the LUTs. Temperature compensation results are

therefore updated at 16∞tCONV intervals, or about 1.6 sec-

onds. This can be expressed as shown in Equation5.

TTT T T

COMPm nn1n2 n15

=+ + +•••

++ + (5)

Each time an updated average value is acquired, a new offset

value for the APC setpoint is read from the corresponding

look-up table (see Table 12) and transferred to the APC

circuitry. This is illustrated in Equation 6. In a same way, new

offset values are taken from similar look-up tables (see Table

13 and Table 14), added to the nominal values and trans-

ferred into the modulation and fault comparator DACs. The

bias current high alarm threshold, is compensated using a

fourth look-up table (see Table 15). This compensation

happens internally and does not affect any host-accessible

registers.

COUNTER

FLTTMR

SATURATION_FAUL

Saturation Detector

COMP

5% V

DDA

95% V

DDA

Figure 9. Saturation Detector

FLTDAC

LOSFLT

OEMCFG3

LOS

DIS

CNTRL

LOS

RX RXLO

DDA

Figure 10. RXLOS Comparator Logic

MIC3000 Micrel

M9999-101204 22 October 2004

APCSET APCSETx APCLUT T

APCSET APCSETx APCLUT max

APCSET APCSETx APCLUT min

mCOMPm

Table min T Table max

mT Table max

mT Table min

COMPm

COMP

≤≤

()

(6)

If the measured temperature is greater than the maximum

table value, the highest value in each table is used. If the

measured temperature is less than the minimum, the mini-

mum value is used. Hysteresis is employed to further en-

hance noise immunity and prevent oscillation about a table

threshold. Each table entry spans two degrees C. The table

index will not change unless the new temperature average

results in a table index beyond the midpoint of the next entry

in either direction. There is therefore 2 to 3°C of hysteresis on

temperature compensation changes. The table index will

never oscillate due to quantization noise as the hysteresis is

much larger than ±1¦2 LSB.

Byte Addresses Function

00h–3Fh APC Look-up Table

40h–7Fh IMOD Look-up Table

80h–BFh IFLT Look-up Table

C0h–FFh Bias High Alarm Look-up Table

Table 11. Temperature Compensation Look-up Tables,

Serial Address I2CADR + 4h

October 2004 23 M9999-101204

MIC3000 Micrel

Temperature

00 h 0 0

01h 1 2

02h 2 4

···

3Eh 62 124

125

3Fh 63 126

127

Table 12. APC Temperature Compensation Look-Up

Table, Serial Address I2CADR+4h

Temperature

40 h 0 0

41h 1 2

42h 2 4

···

7Eh 62 124

125

7Fh 63 126

127

Table 13. VMOD Temperature- Compensation Look-Up

Table, Serial Address I2CADR+4h

Temperature

80 h 0 0

81h 1 2

82h 2 4

···

BEh 62 124

125

BFh 63 126

127

Table 14. IBIAS Comparator Temperature

Compensation Look-up Table, Serial Address

I2CADR+4h

Temperature

CO h 0 0

C1h 1 2

C2h 2 4

···

FEh 62 124

125

FFh 63 126

127

Table 15. Bias Current High Alarm Temperature

Compensation Table, Serial Address I2CADR+4h

MIC3000 Micrel

M9999-101204 24 October 2004

The LUTOFF register determines the range of measured

temperatures that are actually spanned by the tables. The

temperature span of the tables versus the value of LUTOFF

is given in Table 16.

Temperature Span

LUTOFF tCOMP(min) – tCOMP(max)

00h 0°C to +127°C

01h –2°C to +125°C

02h –4°C to +123°C

··

··

0Fh –30°C to +97°C

Table 16. Range of Temperature Compensation

Tables vs. LUTOFF

The internal state machine calculates a new table index each

time a new average temperature value becomes available.

This table index is derived from the average temperature

value and LUTOFF. The table index is then converted into a

table address for each of the four look-up tables. These

operations can be expressed as:

NDEX T2LUTOF

AVG n

()

(7)

where TAVG(n) is the current average temperature; and

TABLE ADDRESS INDEX BASE ADDRESS

__=+

where BASE_ADDRESS is the physical base address of

each table, i.e., 00h, 40h, 80h, or C0h (all tables reside in the

I2CADR+4 page of memory).

At any given time, the current table index can be read in the

LUTINDX register.

Figures 11 and 12 illustrate the operation of the temperature

compensation tables.

Figure 11 is a graphical illustration of the use of the LUTOFF

temperature compensation tables. Note that, if the LUTINDX

becomes greater than 63 or less than zero, the maximum or

minimum table value is used, respectively. The tables do not

“roll over.”

+127

–128

063

LUT(LUTINDX)

(a)

+127

–128

0 +127°C

+113°C

–30°C

LUT(t), LUTOFF=07

(c)

+127

–128

0 +127°C–30°C

LUT(t), LUTOFF=0

(

+127

–128

0 +127°

+98°C

–30°C

LUT(t), LUTOFF=0F

(d)

Figure 11. Examples of LUTOFF Operation

October 2004 25 M9999-101204

MIC3000 Micrel

+127

–128

063

LUT(LUTINDX)

(a)

+127

0 +127°C–40°C

(

+98°C+34°C

+127

0 +127°C–40°C

(c)

+98°C+34°C

+127

0 +127°

–40°C

LUTOFF = 0Fh

APCSEL = 00h

(d)

+98°C+34°C

APCSET0 = 64 APCSET0 = 92 APCSET0 = 128

Figure 12. Temperature Compensation Examples

Figure 12 llustrates that the table values are used as offsets

to the nominal value of the parameter in question. APCSET

is used as an example, but all four tables function identically.

Note that the shape and magnitude of the compensation

curve do not change as the nominal value changes.

MIC3000 Micrel

M9999-101204 26 October 2004

Event Condition MIC3000 Response

Temperature high alarm TEMP > TMAX Set ALARM0[7]

Temperature low alarm TEMP < TMIN Set ALARM0[6]

Voltage high alarm VIN > VMAX Set ALARM0[5]

Voltage low alarm VIN < VMIN Set ALARM0[4]

TX bias high alarm IBIAS > IBMAX Set ALARM0[3]

TX bias low alarm IBIAS < IBMIN Set ALARM0[2]

TX power high alarm TXOP > TXMAX Set ALARM0[1]

TX power low alarm TXOP < TXMIN Set ALARM0[0]

RX power high alarm RXOP > RXMAX Set ALARM1[7]

RX power low alarm RXOP < RXMIN Set ALARM1[6]

Temperature high warning TEMP > THIGH Set WARN0[7]

Temperature low warning TEMP < TLOW Set WARN0[6]

Voltage high warning VIN > VHIGH Set WARN0[5]

Voltage low warning VIN < VLOW Set WARN0[4]

TX bias high warning IBIAS > IBHIGH Set WARN0[3]

TX bias low warning IBIAS < IBLOW Set WARN0[2]

TX power high warning TXOP > TXHIGH Set WARN0[1]

TX power low warning TXOP < TXLOW Set WARN0[0]

RX power high warning RXOP > RXHIGH Set WARN1[7]

RX power low warning RXOP < RXLOW Set WARN1[6]

Table 17. MIC3000 Events

Alarms and Warning Flags

There are twenty different conditions that will cause the

MIC3000 to set one of the bits in the WARNx or ALARMx

registers. These conditions are listed in Table 17. The less

critical of these events generate warning flags by setting a bit

in WARN0 or WARN1. The more critical events cause bits to

be set in ALARM0 or ALARM1.

An event occurs when any alarm or warning condition be-

comes true. Each event causes its corresponding status bit

in ALARM0, ALARM1, WARN0, or WARN1 to be set. This

action cannot be masked by the host. The status bit will

remain set until the host reads that particular status register,

a power on-off cycle occurs, or the host toggles TXDISABLE.

If TXDISABLE is asserted at any time during normal opera-

tion, A/D conversions continue. The A/D results for all param-

eters will continue to be reported. All events will be reported

in the normal way. If they have not already been individually

cleared by read operations, when TXDISABLE is deasserted,

all status registers will be cleared.

Control and Status I/O

The logic for the transceiver control and status I/O is shown

schematically in Figure 13. Note that the internal drivers on

RXLOS, RATE_SELECT, and TXFAULT are all open-drain.

These signals may be driven either by the internal logic or

external drivers connected to the corresponding MIC3000

pins. In any case, the signal level appearing at the pins of the

MIC3000 will be reported in the control register status bits.

Note that the control bits for TX_DISABLE and RATE_SELECT

and the status bits for TXFAULT and RXLOS do not meet the

timing requirements specified in the SFP MSA or the GBIC

Specification, revision 5.5 (SFF-8053) for the hardware sig-

nals. The speed of the serial interface limits the rate at which

these functions can be manipulated and/or reported. The

response time for the control and status bits is given in the

“Electrical Characteristics” section.

October 2004 27 M9999-101204

MIC3000 Micrel

D4D5D6 D3 D2 D1 D

RXLOS

TXFAULT

ILD & TX Fault

Comparators

RXLOS Fault

Comparator

RSOUT

RSIN

ASER_SHUTDOWN

TXDISABLE

Figure 13. Control and Status I/O Logic

90% of nominal output

10% of nominal output

TXDISABLE

ransmitter Output

TXFAULT

tOFF tON

Figure 14. Transmitter ON-OFF Timing

tINIT

tPOR

VDD

TXFAULT

TXDISABLE

ransmitter Output 90% Nominal Outp

Figure 15. Initialization Timing with TXDISABLE Asserted

System Timing

The timing specifications for MIC3000 control and status

I/O are given in the “Electrical Characteristics” section.

MIC3000 Micrel

M9999-101204 28 October 2004

INIT

VDD

TXFAULT

TXDISABLE

ransmitter Output

90% Nominal Outp

Figure 16. Initialization Timing, TXDISABLE Not Asserted

Loss of Signal

RXLOS

ransmitter Output

tLOSS_ON tLOSS_OFF

Figure 17. Loss-of-Signal (LOS) Timing

ccurance of Fault

TXFAULT

ransmitter Output

FAULT

10% of Nominal Output

Figure 18. Transmit Fault Timing

October 2004 29 M9999-101204

MIC3000 Micrel

TXDISABLE

TXFAULT

ransmitter Output

tRESET

tINIT

90% of Nominal Output

Figure 19. Successfully Clearing a Fault Condition

TXDISABLE

TXFAULT

ransmitter Output

tFAULT

tINIT

10% of Nominal Output

tRESET

Fault Condition

Figure 20. Unsuccessful Attempt to Clear a Fault

MIC3000 Micrel

M9999-101204 30 October 2004

Warm Resets

The MIC3000 can be reset to its power-on default state during

operation by setting the reset bit in OEMCFG0. When this bit

is set, TXFAULT and RXLOS will be deasserted, all registers

will be restored to their normal power-on default values, and

any A/D conversion in progress will be halted and the results

discarded. The state of the MIC3000 following this operation

is indistinguishable from a power-on reset.

Power-On Hour Meter

The Power-On Hour meter logs operating hours using an

internal real-time clock and stores the result in NVRAM. The

hour count is incremented at ten-hour intervals in the middle

of each interval. The first increment therefore takes place five

hours after power-on. Time is accumulated whenever the

MIC3000 is powered. The hour meter’s timebase is accurate

to 5% over all MIC3000 operating conditions. The counter is

capable of storing counts of more than thirty years, but is

ultimately limited by the write-cycle endurance of the non-

volatile memory. This implies a range of at least twenty years.

Power-On Hour Result Format

High Byte, POHH Low Byte, POHl

Error flag Elapsed Time / 10 Hours, MSB’s Elapsed Time / 10 Hours, LSB’s

MSB LSB

Table 18. Power-On Hour Meter Result Format

Function Description Control Register(s)

Analog loop-back Provides analog visibility of op-amp and DAC outputs via the ADC OEMCFG0

Fault comparator disable control Disables the fault comparator OEMCAL0

Fault comparator spin-on-channel mode Selects a single fault comparator channel OEMCAL0

Fault comparator output read-back Allows host to read individual fault comparator outputs OEMRD

RSOUT, /INT read-back Allows host to read the state of these pins OEMRD

Inhibit EEPROM write cycles Speeds repetitive writes to registers backed up by NVRAM OEMCAL0

APC calibration mode Allows direct writes to MODDAC and APCDAC OEMCAL0

(temperature compensation not used)

Continuity checking Forcing of RXLOS, TXFAULT, /INT OEMCAL0

Halt A/D Stops A/D conversions; ADC in one-shot mode OEMCAL1

ADC idle flag Indicates ADC status OEMCAL1

A/D one-shot mode Performs a single A/D conversion on the selected input channel OEMCAL1

A/D spin-on-channel mode Selects a single input channel OEMCAL1

Channel selection Selects ADC or fault comparator channel for spin-on-channel modes OEMCAL1

LUT index read-back Permits visibility of the LUT index calculated by the state-machine LUTINDX

Manufacturer and device ID registers Facilitates presence detection and version control MFG_ID, DEV_ID

Table 19. Test and Diagnostic Features

Actual results will depend upon the operating conditions and

write-cycle endurance of the part in question.

Two registers, POHH and POHl, contain a 15-bit power-on

hour measurement and an error flag, POHFLT. Great care

has been taken to make the MIC3000’s hour meter immune

to data corruption and to insure that valid data is maintained

across power cycles. The hour meter employs multiple data

copies and error correction codes to maintain data validity.

This data is stored in the POHDATA registers. If POHFLT is

set, however, the power-on hour meter data has been cor-

rupted and should be ignored.

It is recommended that a two-byte (or more) sequential read

operation be performed on POHh and POHl to insure coher-

ency between the two registers. These registers are acces-

sible by the OEM using a valid OEM password. The only

operation that should be performed on these registers is to

clear the hour meters initial value, if necessary, at the time of

product shipment. The hour meter result may be cleared by

setting all eight POHDATA bytes to 00h.

Test and Calibration Features

Numerous features are included in the MIC3000 to facilitate

development, testing, and diagnostics. These features are

available via registers in the OEM area. As shown in Table19,

these features include:

October 2004 31 M9999-101204

MIC3000 Micrel

Serial Port Operation

The MIC3000 uses standard Write_Byte, Read_Byte, and

Read_Word operations for communication with its host. It

also supports Page_Write and Sequential_Read transac-

tions. The Write_Byte operation involves sending the device’s

slave address (with the R/W bit low to signal a write opera-

tion), followed by the address of the register to be operated

upon and the data byte. The Read_Byte operation is a

composite write and read operation: the host first sends the

device’s slave address followed by the register address, as in

a write operation. A new start bit must then be sent to the

MIC3000, followed by a repeat of the slave address with the

R/W bit (LSB) set to the high (read) state. The data to be read

from the part may then be clocked out. A Read_Word is

similar, but two successive data bytes are clocked out rather

than one. These protocols are shown in Figure 21 to 24.

The MIC3000 will respond to up to four sequential slave

addresses depending upon whether it is in OEM or User

mode. A match between one of the MIC3000’s addresses

and the address specified in the serial bit stream must be

made to initiate communication. The MIC3000 responds to

slave addresses A0h and A2h in User Mode; it also responds

to A4h and A6h in OEM Mode (assuming I2CADR = Axh).

Page Writes

To increase the speed of multi-byte writes, the MIC3000

allows up to four consecutive bytes (one page) to be written

before the internal write cycle begins. The entire non-volatile

memory array is organized into four-byte pages. Each page

begins on a register address boundary where the last two bits

of the address are 00b. Thus the page is composed of any four

consecutive bytes having the addresses xxxxxx00b,

xxxxxx01b, xxxxxx10b, and xxxxxx11b.

The page write sequence begins just like a Write_Byte

operation with the host sending the slave address, R/W bit

low, register address, etc. After the first byte is sent the host

should receive an acknowledge. Up to three more bytes can

be sent in sequence. The MIC3000 will acknowledge each

one and increment its internal address register in anticipation

of the next byte. After the last byte is sent, the host issues a

STOP. The MIC3000’s internal write process then begins. If

more than four bytes are sent, the MIC3000’s internal ad-

dress counter wraps around to the beginning of the four-byte

page.

To accelerate calibration and testing, NVRAM write cycles

can be disabled completely by setting the WRINH bit in

OEMCAL0. Writes to registers that do not have NVRAM

backup will not incur write-cycle delays when writes are

inhibited. Write operations on registers that exist only in

NVRAM will still incur write cycle delays.

S1010

000

0AXXXXXXXXA

D4D5D6 D3 D2 D1 D0D7

/A P

MIC3000 Slave Address

DATA

CLK

START STOP

R/W = WRITE ACKNOWLEDGE ACKNOWLEDGE NOT ACKNOWLEDGE

Master to slave transfer,

i.e., DATA driven by master.

Slave to master transfer,

i.e., DATA driven by slave.

Figure 21. Write Byte Protocol

S1010000 XXA00A00XXXXXXAS1 1 100

XXX XXXX

/A P

MIC3000 Slave Address

DATA

CLK

START START STOP

R/W = WRITE R/W = READACKNOWLEDGE ACKNOWLEDGE ACKNOWLEDGE NOT ACKNOWLEDGE

Master to slave transfer,

i.e., DATA driven by master.

Slave to master transfer,

i.e., DATA driven by slave.

Figure 22. Read Byte Protocol

S1010

000

0A000000XXA

MIC3000 Slave Address

DATA

CLK

START R/W = WRITE ACKNOWLEDGE ACKNOWLEDGE

S1010

000

1A A

D3D4D5 D2 D1 D0 D7

D6D7

/A P

D6 D5 D4 D3 D2 D1 D0

MIC3000 Slave Address

High-Order Byte

from MIC3000

Low-Order Byte

from MIC3000

START STOP

R/W = READ ACKNOWLEDGE ACKNOWLEDGE NOT ACKNOWLEDGE

Master-to-slave tranfer,

i.e., DATA driven by master.

Slave-to-master transfer,

i.e.,DATA driven by slave.

Figure 23. Read_Word Protocol

MIC3000 Micrel

M9999-101204 32 October 2004

Acknowledge Polling

The MIC3000’s non-volatile memory cannot be accessed

during the internal write process. To allow for maximum

speed bulk writes, the MIC3000 supports acknowledge poll-

ing. The MIC3000 will not acknowledge serial bus transac-

tions while internal writes are in progress. The host may

therefore monitor for the end of the write process by periodi-

cally checking for an acknowledgement.

Write Protection and Data Security

OEM Password

A password is required to access the OEM areas of the

MIC3000, specifically the non-volatile memory, look-up tables,

and registers at serial addresses A4h and A6h. A four-byte

field, OEMPWSET, at serial address A6h is used for setting

the OEM password. The OEM password is set by writing

OEMPWSET with the new value. The password comparison

is performed following the write to the MSB of the OEMPW,

address 7Bh at serial address A2h. Therefore, this byte

must be written last! A four-byte burst-write sequence to

address 78h may be used as this will result in the MSB being

written last. The new password will not take effect until after

a power-on reset occurs or a warm reset is performed using

the RST bit in OEMCFG0. This allows the new password to

be verified before it takes effect.

The corresponding four-byte field for password entry, OEMPW,

is located at serial address A2h. This field is therefore always

visible to the host system. OEMPW is compared to the four-

byte OEMPWSET field at serial address A6h. If the two fields

match, access is allowed to the OEM areas of the MIC3000

non-volatile memory at serial addresses A4h and A6h. If

OEMPWSET is all zeroes, no password security will exist.

The value in OEMPW will be ignored. This helps prevent a

deliberately unsecured MIC3000 from being inadvertently

locked. Once a valid password is entered, the MIC3000 OEM

areas will be accessible. The OEM areas may be re-secured

D7 D6 D5 D4 D3 D2 D1 D0

D4D5D6 D3 D2 D1 D0D7

/A P

3rd Data Byte to

MIC3000

4th Data Byte to

MIC3000

STOP

R/W = READ ACKNOWLEDGE NOT ACKNOWLEDGE

Master to slave transfer,

i.e., DATA driven by master.

Slave to master transfer,

i.e., DATA driven by slave.

• • •

S1010

000

0AXXXXXXXXA

MIC3000 Slave Address

DATA

CLK

START R/W = WRITE ACKNOWLEDGE ACKNOWLEDGE

D7 D6 D5 D4 D3 D2 D1 D0

D3D4D5 D2 D1 D0

D6D7

1st Data Byte to

MIC3000

2nd Data Byte to

MIC3000

ACKNOWLEDGE

Figure 24. Four-Byte Page_Write Protocol

by writing an incorrect password value at OEMPW, e.g., all

zeroes. In all cases OEMPW must be written LSB first

through MSB last. The OEM areas will be inaccessible

following the final write operation to OEMPW’s LSB. The

OEMPW field is reset to all zeros at power on. Any values

written to these locations will be readable by the host regard-

less of the locked/unlocked status of the device. If OEMPWSET

is set to zero (00000000h), the MIC3000 will remain unlocked

regardless of the contents of the OEMPW field. This is the

factory default security setting.

NOTE: A valid OEM password allows access to the OEM and

user areas of the chip, i.e., the entire memory map, regard-

less of any user password that may be in place. Once the

OEM areas are locked, the user password can provide

access and write protection for the user areas.

User Password

A password is required to access the USER areas of the

MIC3000, specifically the non-volatile memory at serial ad-

dresses A0h and A2h. A one-byte field, USRPWSET at serial

address A2h is used for setting the USER password.

USRPWSET is compared to the USRPW field at serial

address A2h. If the two fields match, access is allowed to the

USER areas of the MIC3000 non-volatile memory at serial

addresses A0h and A2h.The USER password is set by writing

USRPWSET with the new value. The new password will not

take effect until after a power-on reset occurs or a warm reset

is performed using the RST bit in OEMCFG0. This allows the

new password to be verified before it takes effect.

NOTE: A valid OEM password allows access to the OEM and

user areas of the chip, i.e., the entire memory map, regard-

less of any user password that may be in place. Once the

OEM areas are locked, the user password can provide

access and write protection for the user areas. If a valid OEM

password is in place, the user password will have no effect.

October 2004 33 M9999-101204

MIC3000 Micrel

Detailed Register Descriptions

Note: Serial bus addresses shown assume that I2CADR = Axh.

Alarm Threshold Registers

Temperature High Alarm Threshold MSB (TMAXh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0°C)

Serial Address A2h = 1010001b

Byte Address 00 = 00h

Each LSB represents one degree centigrade. This register is to be used in conjunction with TMAXl to yield a sixteen-

bit temperature value. The value in this register is uncalibrated. The value in TMAXh is compared against TEMPh.

Alarm bit Ax is set if TEMPh > TMAXh.

Temperature High Alarm Threshold LSB (TMAXh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0°C)

Serial Address A2h = 1010001b

Byte Address 01 = 01h

This register is to be used in conjunction with TMAXh to yield a sixteen-bit temperature value. The value in TMAXh is

compared against TEMPh. Alarm bit Ax is set if TMAXh > TEMPh. Since TEMPl is always zero, it is recommended that

this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by

the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

Temperature Low Alarm Threshold MSB (TMINh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0°C)

Serial Address A2h = 1010001b

Byte Address 02 = 02h

Each LSB represents one degree centigrade. This register is to be used in conjunction with TMINl to yield a sixteen-bit

temperature value. The value in TMINh is compared against TEMPh. Alarm bit Ax is set if TEMPh < TMINh.

Temperature Low Alarm Threshold LSB (TMINl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0°C)

Serial Address A2h = 1010001b

Byte Address 03 = 03h

This register is to be used in conjunction with TMINh to yield a sixteen-bit temperature value. The value in TMINh is

compared against TEMPh. Alarm bit Ax is set if TEMPh < TMINh. Since TEMPl is always zero, it is recommended that

this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by

the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

MIC3000 Micrel

M9999-101204 34 October 2004

Voltage High Alarm Threshold MSB(VMAXh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0V)

Serial Address A2h = 1010001b

Byte Address 08 = 08h

Each LSB represents 25.6mV. This register is to be used in conjunction with VMAXl to yield a sixteen-bit value. The

value in TMINh is compared against VINh. Alarm bit Ax is set if VINh > VMAXh.

Voltage High Alarm Threshold LSB(VMAXl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0V)

Serial Address A2h = 1010001b

Byte Address 09 = 09h

Each LSB represents 100µV. This register is to be used in conjunction with VINh to yield a sixteen-bit value. The value

in VMAXh is compared against VINh. Alarm bit Ax is set if VINh > VMAXh. Since VINl is always zero, it is recom-

mended that this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is

not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

Voltage Low Alarm Threshold MSB (VMINh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0V)

Serial Address A2h = 1010001b

Byte Address 10 = 0Ah

Each LSB represents 25.6mV. This register is to be used in conjunction with VMINl to yield a sixteen-bit value. The

value in this register is uncalibrated. The value in VMINh is compared against VINh. Alarm bit Ax is set if VINh<VMINh.

Voltage Low Alarm Threshold LSB (VMINl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0V)

Serial Address A2h = 1010001b

Byte Address 11 = 0Bh

Each LSB represents 100µV. This register is to be used in conjunction with VINh to yield a sixteen-bit value. The value

in VMINh is compared against VINh. Alarm bit Ax is set if VINh < VMINh. Since VINl is always zero, it is recommended

that this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used

by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

October 2004 35 M9999-101204

MIC3000 Micrel

Bias Current High Alarm Threshold MSB (IMAXh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mA)

Serial Address A2h = 1010001b

Byte Address 16 = 10h

This register is to be used in conjunction with IMAXl to yield a sixteen-bit value. The value in this register is

uncalibrated. The value in IMAXh is compared against ILDh. Alarm bit Ax is set if ILDh > IMAXh.

Bias Current High Alarm Threshold LSB (IMAXl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mA)

Serial Address A2h = 1010001b

Byte Address 17 = 11h

Each LSB represents 2µA. This register is to be used in conjunction with IMAXh to yield a sixteen-bit value. The value

in this register is uncalibrated. The value in IMAXh is compared against ILDh. Alarm bit Ax is set if ILDh > IMAXh.

Since ILDl is always zero, it is recommended that this register always be programmed to zero. This register is provided

for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or

warning bits.

Bias Current Low Alarm Threshold MSB (IMINh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mA)

Serial Address A2h = 1010001b

Byte Address 18 = 12h

This register is to be used in conjunction with IMINl to yield a sixteen-bit value. The value in this register is

uncalibrated. The value in IMINh is compared against ILDh. Alarm bit Ax is set if ILDh < IMINh.

Bias Current Low Alarm Threshold LSB (IMINl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mA)

Serial Address A2h = 1010001b

Byte Address 19 = 13h

Each LSB represents 2µA. This register is to be used in conjunction with IMINh to yield a sixteen-bit value. The value

in this register is uncalibrated. The value in IMINh is compared against ILDh. Alarm bit Ax is set if ILDh < IMINh. Since

ILDl is always zero, it is recommended that this register always be programmed to zero. This register is provided for

compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or

warning bits.

MIC3000 Micrel

M9999-101204 36 October 2004

TX Optical Power High Alarm MSB (TXMAXh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 24 = 18h

Each LSB represents 25.6µW. This register is to be used in conjunction with TXOPl to yield a sixteen-bit value. The

values in TXOPh:TXOPl are in an unsigned binary format. The value in this register is uncalibrated. The value in

TXMAXh is compared against TXOPh. Alarm bit Ax is set if TXOPh > TXMAXh.

TX Optical Power High Alarm LSB (TXMAXl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 25 = 19h

Each LSB represents 0.1µW. This register is to be used in conjunction with TXMAXh to yield a sixteen-bit value. The

values in TXOPh:TXOPl are in an unsigned binary format. The value in this register is uncalibrated. The value in

TXMAXh is compared against TXOPh. Alarm bit Ax is set if TXOPh > TXMAXh. Since TXOPl is always zero, it is

recommended that this register always be programmed to zero. This register is provided for compliance with SFF-

8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

TX Optical Power Low Alarm MSB (TXMINh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 26 = 1Ah

Each LSB represents 25.6µW. This register is to be used in conjunction with TXMINl to yield a sixteen-bit value. The

values in TXMINh:TMINl are in an unsigned binary format. The value in this register is uncalibrated. The value in

TXMINh is compared against TXOPh. Alarm bit Ax is set if TXOPh < TXMINh.

TX Optical Power Low Alarm LSB (TXMINl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 27 = 1Bh

Each LSB represents 0.1µW. This register is to be used in conjunction with TXMINh to yield a sixteen-bit value. The

values in TXOPh:TXOPl are in an unsigned binary format. The value in this register is uncalibrated. The value in

TXMINh is compared against TXOPh. Alarm bit Ax is set if TXOPh < TXMINh. Since TXOPl is always zero, it is

recommended that this register always be programmed to zero. This register is provided for compliance with SFF-

8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

October 2004 37 M9999-101204

MIC3000 Micrel

RX Optical Power High Alarm Threshold MSB (RXMAXh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 32 = 20h

Each LSB represents 25.6µW. This register is to be used in conjunction with RXMAXl to yield a sixteen-bit value. The

value in this register is uncalibrated. The value in RXMAXh is compared against RXOPh. Alarm bit Ax is set if RXOPh

> RXMAXh.

RX Optical Power High Alarm Threshold LSB (RXMAXl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 33 = 21h

Each LSB represents 0.1µW. This register is to be used in conjunction with RXMAXh to yield a sixteen-bit value. The

values in RXMAXh:RXMAXl are in an unsigned binary format. The value in this register is uncalibrated. The value in

RXMAXh is compared against RXOPh. Alarm bit Ax is set if RXOPh > RXMAXh. Since RXOPl is always zero, it is

recommended that this register always be programmed to zero. This register is provided for compliance with SFF-

8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

RX Optical Power Low Alarm Threshold MSB (RMINh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 34 = 22h

Each LSB represents 25.6µW. This register is to be used in conjunction with RXMINl to yield a sixteen-bit value. The

value in this register is uncalibrated. The value in RXMINh is compared against RXOPh. Alarm bit Ax is set if RXOPh <

RXMINh.

RX Optical Power Low Alarm Threshold LSB (RMINl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 35 = 23h

Each LSB represents 0.1µW. This register is to be used in conjunction with RXMINh to yield a sixteen-bit value. The

values in RXMINh:RXMINl are in an unsigned binary format. The value in this register is uncalibrated. The value in

RXMINh is compared against RXOPh. Alarm bit Ax is set if RXOPh < RXMINh. Since RXOPl is always zero, it is

recommended that this register always be programmed to zero. This register is provided for compliance with SFF-

8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

MIC3000 Micrel

M9999-101204 38 October 2004

Warning Threshold Registers

Temperature High Warning Threshold MSB (THIGHh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0°C)

Serial Address A2h = 1010001b

Byte Address 04 = 04h

Each LSB represents one degree centigrade. This register is to be used in conjunction with THIGHl to yield a sixteen-

bit temperature value. The value in this register is uncalibrated. The value in THIGHh is compared against TEMPh.

Warning bit Wx is set if TEMPh > THIGHh.

Temperature High Warning Threshold LSB (THIGHl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0°C)

Serial Address A2h = 1010001b

Byte Address 05 = 05h

This register is to be used in conjunction with THIGHh to yield a sixteen-bit temperature value. The value in this

Since TEMPl is always zero, it is recommended that this register always be programmed to zero. This register is

provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting

alarm or warning bits.

Temperature Low Warning Threshold MSB (TLOWh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0°C)

Serial Address A2h = 1010001b

Byte Address 06 = 06h

Each LSB represents one degree centigrade. This register is to be used in conjunction with TLOWl to yield a sixteen-

bit temperature value. The value in this register is uncalibrated. The value in TLOWh is compared against TEMPh.

Warning bit Wx is set if TEMPh < TLOWh.

Temperature Low Warning Threshold LSB (TLOWl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0°C)

Serial Address A2h = 1010001b

Byte Address 07 = 07h

This register is to be used in conjunction with TLOWh to yield a sixteen-bit temperature value. The value in this register

is uncalibrated. The value in TLOWh is compared against TEMPh. Warning bit Wx is set if TEMPh < TLOWh. Since

TEMPl is always zero, it is recommended that this register always be programmed to zero. This register is provided for

compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or

warning bits.

October 2004 39 M9999-101204

MIC3000 Micrel

Voltage High Warning Threshold MSB (VHIGHh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0V)

Serial Address A2h = 1010001b

Byte Address 12 = 0Ch

Each LSB represents 25.6mV. This register is to be used in conjunction with VHIGHl to yield a sixteen-bit value. The

value in this register is uncalibrated. The value in VHIGHh is compared against VINh. Warning bit Wx is set if VINh >

VHIGHh.

Votage High Warning Threshold LSB (VHIGHl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0V)

Serial Address A2h = 1010001b

Byte Address 13 = 0Dh

Each LSB represents 100µV. This register is to be used in conjunction with VHIGHh to yield a sixteen-bit value. The

value in VHIGHh is compared against VINh. Warning bit Wx is set if VINh > VHIGHh. Since VINl is always zero, it is

recommended that this register always be programmed to zero. This register is provided for compliance with SFF-

8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

Votage Low Warning Threshold MSB (VLOWh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0V)

Serial Address A2h = 1010001b

Byte Address 14 = 0Eh

Each LSB represents 25.6mV. This register is to be used in conjunction with VLOWl to yield a sixteen-bit value. The

value in this register is uncalibrated. The value in VLOWh is compared against VINh. Warning bit Wx is set if VINh <

VLOWhh.

Voltage Low Warning Threshold LSB (VLOWl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0V)

Serial Address A2h = 1010001b

Byte Address 15 = 0Fh

Each LSB represents 100µV. This register is to be used in conjunction with VLOWh to yield a sixteen-bit value. The

value in VLOWh is compared against VINh. Warning bit Wx is set if VINh < VLOWh. Since VINl is always zero, it is

recommended that this register always be programmed to zero. This register is provided for compliance with SFF-

8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

MIC3000 Micrel

M9999-101204 40 October 2004

Bias Current High Warning Threshold MSB (IHIGHh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mA)

Serial Address A2h = 1010001b

Byte Address 20= 14h

This register is to be used in conjunction with IHIGHl to yield a sixteen-bit value. The value in this register is

uncalibrated. The value in IHIGHh is compared against ILDh. Warning bit Wx is set if ILDh > IHIGHh.

Bias Current High Warning Threshold LSB (IHIGHl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mA)

Serial Address A2h = 1010001b

Byte Address 21= 15h

Each LSB represents 2µA. This register is to be used in conjunction with IHIGHh to yield a sixteen-bit value. The value

in this register is uncalibrated. The value in IHIGHh is compared against ILDh. Warning bit Wx is set if ILDh > IHIGHh.

Since ILDl is always zero, it is recommended that this register always be programmed to zero. This register is provided

for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or

warning bits.

Bias Current Low Warning Threshold MSB (ILOWh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mA)

Serial Address A2h = 1010001b

Byte Address 22= 16h

This register is to be used in conjunction with ILOWl to yield a sixteen-bit value. The value in this register is

uncalibrated. The value in ILOWh is compared against ILDh. Warning bit Wx is set if ILDh < ILOWh.

Bias Current Low Warning Threshold LSB (ILOWl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mA)

Serial Address A2h = 1010001b

Byte Address 23= 17h

Each LSB represents 2µA. This register is to be used in conjunction with ILOWh to yield a sixteen-bit value. The value

in this register is uncalibrated. The value in ILOWh is compared against ILDh. Warning bit Wx is set if ILDh < ILOWh.

Since ILDl is always zero, it is recommended that this register always be programmed to zero. This register is provided

for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or

warning bits.

October 2004 41 M9999-101204

MIC3000 Micrel

TX Optical Power High Warning MSB (TXHIGHh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 28= 1Ch

Each LSB represents 25.6µW. This register is to be used in conjunction with TXHIGHl to yield a sixteen-bit value. The

values in TXHIGHh:TXHIGHl are in an unsigned binary format. The value in this register is uncalibrated. The value in

TXHIGHh is compared against TXOPh. Warning bit Wx is set if TXOPh > TXHIGHh.

TX Optical Power High Warning LSB (TXHIGHl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 29= 1Dh

Each LSB represents 0.1µW. This register is to be used in conjunction with TXHIGHh to yield a sixteen-bit value. The

values in TXHIGHh:TXHIGHl are in an unsigned binary format. The value in this register is uncalibrated. The value in

TXHIGHh is compared against TXOPh. Warning bit Wx is set if TXOPh > TXHIGHh. Since TXOPl is always zero, it is

recommended that this register always be programmed to zero. This register is provided for compliance with SFF-

8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning b.

TX Optical Power Low Warning MSB (TLOWh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 30 = 1Eh

Each LSB represents 25.6µW. This register is to be used in conjunction with TXLOWl to yield a sixteen-bit value. The

values in TXLOWh:TLOWl are in an unsigned binary format. The value in this register is uncalibrated. The value in

TXLOWh is compared against TXOPh. Warning bit Wx is set if TXOPh < TXLOWh.

TX Optical Power Low Warning LSB (TLOWl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 31 = 1Fh

Each LSB represents 0.1µW. This register is to be used in conjunction with TXLOWh to yield a sixteen-bit value. The

values in TXLOWh:TXLOWl are in an unsigned binary format. The value in this register is uncalibrated. The value in

TXLOWh is compared against TXOPh. Warning bit Wx is set if TXOPh < TXLOWh. Since TXOPl is always zero, it is

recommended that this register always be programmed to zero. This register is provided for compliance with SFF-

8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

MIC3000 Micrel

M9999-101204 42 October 2004

RX Optical Power High Warning Threshold MSB (RXHIGHh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 36 = 24h

Each LSB represents 25.6µW. This register is to be used in conjunction with RXHIGHl to yield a sixteen-bit value. The

value in this register is uncalibrated. The value in RXHIGHh is compared against RXOPh. Warning bit Wx is set if

RXOPh > RXHIGHh.

RX Optical Power High Warning Threshold LSB (RXHIGHl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 37 = 25h

Each LSB represents 0.1µW. This register is to be used in conjunction with RXHIGHh to yield a sixteen-bit value. The

values in RXHIGHh:RXHIGHl are in an unsigned binary format. The value in this register is uncalibrated. The value in

RXHIGHh is compared against RXOPh. Warning bit Wx is set if RXOPh > RXHIGHh. Since RXOPl is always zero, it is

recommended that this register always be programmed to zero. This register is provided for compliance with SFF-

8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

RX Optical Power Low Warning Threshold MSB (RXLOWh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 38 = 26h

Each LSB represents 25.6µW. This register is to be used in conjunction with RXLOWl to yield a sixteen-bit value. The

value in this register is uncalibrated. The value in RXLOWh is compared against RXOPh. Warning bit Wx is set if

RXOPh < RXLOWh.

RX Optical Power Low Warning Threshold LSB (RXLOWl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 39 = 27h

Each LSB represents 0.1µW. This register is to be used in conjunction with RXLOWh to yield a sixteen-bit value. The

values in RXLOWh:RXLOWl are in an unsigned binary format. The value in this register is uncalibrated. The value in

RXLOWh is compared against RXOPh. Warning bit Wx is set if RXOPh < RXLOWh. Since RXOPl is always zero, it is

recommended that this register always be programmed to zero. This register is provided for compliance with SFF-

8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

October 2004 43 M9999-101204

MIC3000 Micrel

Checksum (CHKSUM)

Checksum of bytes 0 - 94 at serial address A2h

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h (0°C)

Serial Address A2h = 1010001b

Byte Address 95 = 5Fh

This register is provided for compliance with SFF-8472. It is implemented as general-purpose non-volatile memory.

Read/write access is possible whenever a valid OEM password has been entered. CHKSUM is read-only in USER

mode.

MIC3000 Micrel

M9999-101204 44 October 2004

ADC Result Registers

Temperature Result MSB (TEMPh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read-only read-only read-only read-only read-only read-only read-only read-only

Default Value 0000 0000b = 00h (0°C)(1)

Serial Address A2h = 1010001b

Byte Address 96 = 60h

Each LSB represents one degree centigrade. This register is to be used in conjunction with TEMPl to yield a sixteen-

bit temperature value. The value in this register is uncalibrated. The host should process the results using the scale

factor and offset provided. See the External Calibration section.

Temperature Result LSB (TEMPl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read-only read-only read-only read-only read-only read-only read-only read-only

Default Value 0000 0000b = 00h (0°C)

Serial Address A2h = 1010001b

Byte Address 97 = 61h

This register is to be used in conjunction with TEMPh to yield a sixteen-bit temperature value. The value in this register

is uncalibrated. The host should process the results using the scale factor and offset provided. See the External

Calibration section. In the MIC3000, this register will always return zero. This register is provided for compliance with

SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

Voltage MSB (VINh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read-only read-only read-only read-only read-only read-only read-only read-only

Default Value 0000 0000b = 00h (0V)(2)

Serial Address A2h = 1010001b

Byte Address 98 = 62h

Each LSB represents 25.6mV. This register is to be used in conjunction with VINl to yield a sixteen-bit value. The

values in VINh:VlNl are in an unsigned binary format. The value in this register is uncalibrated. The host should

process the results using the scale factor and offset provided. See the External Calibration section.

Voltage LSB (VINl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read-only read-only read-only read-only read-only read-only read-only read-only

Default Value 0000 0000b = 00h (0V)

Serial Address A2h = 1010001b

Byte Address 99 = 63h

Each LSB represents 100µV. This register is to be used in conjunction with VINh to yield a sixteen-bit value. The

values in VINh:VINl are in an unsigned binary format. The value in this register is uncalibrated. The host should

process the results using the scale factor and offset provided. See the External Calibration section. In the MIC3000,

this register will always return zero. This register is provided for compliance with SFF-8472. It is not used by the

MIC3000 when doing threshold comparisons and setting alarm or warning bits.

Notes:

1. TEMPh will contain measured temperature data after the completion of one conversion.

2. VINh will contain measured data after one A/D conversion cycle.

October 2004 45 M9999-101204

MIC3000 Micrel

Laser Diode Bias Current MSB (ILDh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read-only read-only read-only read-only read-only read-only read-only read-only

Default Value 0000 0000b = 00h (0mA)(3)

Serial Address A2h = 1010001b

Byte Address 100 = 64h

This register is to be used in conjunction with ILDl to yield a sixteen-bit value. The values in ILDh:ILDl are in an un-

signed binary format. The value in this register is uncalibrated. The host should process the results using the scale

factor and offset provided. See the External Calibration sections.

Laser Diode Bias Current LSB (ILDl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read-only read-only read-only read-only read-only read-only read-only read-only

Default Value 0000 0000b = 00h (0mA)

Serial Address A2h = 1010001b

Byte Address 101 = 65h

Each LSB represents 2µA. This register is to be used in conjunction with ILDh to yield a sixteen-bit value. The values

in ILDh:ILDl are in an unsigned binary format. The value in this register is uncalibrated. The host should process the

results using the scale factor and offset provided. See the External Calibration section. In the MIC3000, this register

will always return zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when

doing threshold comparisons and setting alarm or warning bits.

Transmitted Optical Power MSB (TXOPh)(4)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read-only read-only read-only read-only read-only read-only read-only read-only

Default Value 0000 0000b = 00h (0mW)(5)

Serial Address A2h = 1010001b

Byte Address 102 = 66h

Each LSB represents 25.6µW. This register is to be used in conjunction with TXOPl to yield a sixteen-bit value. The

values in TXOPh:TXOPl are in an unsigned binary format. The value in this register is uncalibrated. The host should

process the results using the scale factor and offset provided. See the External Calibration section.

Transmitted Optical Power LSB (TXOPl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read-only read-only read-only read-only read-only read-only read-only read-only

Default Value 0000 0000b = 00h (0mW)

Serial Address A2h = 1010001b

Byte Address 103 = 67h

Each LSB represents 0.1µW. This register is to be used in conjunction with TXOPh to yield a sixteen-bit value. The

values in TXOPh:TXOPl are in an unsigned binary format. The value in this register is uncalibrated. The host should

process the results using the scale factor and offset provided. See the External Calibration section. In the MIC3000,

this register will always return zero. This register is provided for compliance with SFF-8472. It is not used by the

MIC3000 when doing threshold comparisons and setting alarm or warning bitsection.

Notes:

3. ILDh will contain measured data after one A/D conversion cycle.

4. The scale factor corresponding to the sense resistor used must be set in the configuration register.

5. TXOPh will contain measured data after one A/D conversion cycle.

MIC3000 Micrel

M9999-101204 46 October 2004

Received Optical Power MSB (RXOPh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read-only read-only read-only read-only read-only read-only read-only read-only

Default Value 0000 0000b = 00h (0mW)(6)

Serial Address A2h = 1010001b

Byte Address 104 = 68h

Each LSB represents 25.6µW. This register is to be used in conjunction with RXOPl to yield a sixteen-bit value. The

values in RXOPh:RXOPl are in an unsigned binary format. The value in this register is uncalibrated. The host should

process the results using the scale factor and offset provided. See the External Calibration section.

Received Optical Power LSB (RXOPl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read-only read-only read-only read-only read-only read-only read-only read-only

Default Value 0000 0000b = 00h (0mW)(6)

Serial Address A2h = 1010001b

Byte Address 105 = 69h

Each LSB represents 0.1µW. This register is to be used in conjunction with RXOPh to yield a sixteen-bit value. The

values in RXOPh:RXOPl are in an unsigned binary format. The value in this register is uncalibrated. The host should

process the results using the coefficients provided. See the External Calibration section. In the MIC3000, this register

will always return zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when

doing threshold comparisons and setting alarm or warning bits.

Control and Status (CNTRL)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

TXDIS STXDIS reserved RSEL SRSEL XFLT LOS POR

read only read/write read/write read/write read only read only read only

Default Value 0000 0000b = 00h

Serial Address A2h = 1010001b

Byte Address 110 = 6Eh

Bit(s) Function Operation

D[7] TXDIS Reflects the state of the TXDISABLE pin 1 = disabled, 0 = enabled, read only.

D[6] STXDIS Soft transmit disable 1 = disabled; 0 = enabled.

D[5] D[5] Reserved Reserved - always write as zero.

D[4] RSEL Reflects the state of the RSEL pin 1 = high; 0 = low.

D[3] SRSEL Soft rate select 1 = high (2Gbps); 0 = low (1Gbps).

D[2] TXFLT Reflects the state of the TXFAULT pin 1 = high (fault); 0 = low (no fault).

D[1] LOS Loss of signal. Reflects the state of the LOS pin 1 = high (loss of signal); 0 = low (no loss of signal).

D[0] POR MIC3000 power-on status 0 = POR complete, analog data ready;

1 = POR in progress.

Notes:

6. RXOPh will contain measured data after one A/D conversion cycle.

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Alarm Flags

Alarm Register 0 (ALARM0)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

A7 A6 A5 A4 A3 A2 A1 A0

read-only read-only read-only read-only read-only read-only read-only read-only

Default Value 0000 0000b = 00h (no events pending)

Serial Address A2h = 1010001b

Byte Address 112 = 70h

The power-up default value is 00h. Following the first A/D conversion, however, any of the bits may be set depending

upon the results.

Bit(s) Function Operation

D[7] A7 High temperature alarm, TEMPh > TMAXh. 1 = condition exists, 0 = normal/OK.

D[6] A6 Low temperature alarm, TEMPh < TMINh. 1 = condition exists, 0 = normal/OK.

D[5] A5 High voltage alarm, VINh > VMAXh. 1 = condition exists, 0 = normal/OK.

D[4] A4 Low voltage alarm, VINh < VMINh. 1 = condition exists, 0 = normal/OK.

D[3] A3 High laser diode bias alarm, IBIASh > IMAXh. 1 = condition exists, 0 = normal/OK.

D[2] A2 Low laser diode bias alarm, IBIASh < IMINh. 1 = condition exists, 0 = normal/OK.

D[1] A1 High transmit optical power alarm, 1 = condition exists, 0 = normal/OK.

TXOPh > TXMAXh.

D[0] A0 Low transmit optical power alarm, 1 = condition exists, 0 = normal/OK.

TXOPh < TXMINh.

Alarm Register 1 (ALARM1)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

A15 A14

read-only read-only reserved reserved reserved reserved reserved reserved

Default Value 0000 0000b = 00h (no events pending)

Serial Address A2h = 1010001b

Byte Address 113 = 71h

The power-up default value is 00h. Following the first A/D conversion, however, any of the bits may be set depending

on the results.

Bit(s) Function Operation

D[7] A15 High received power (overload) alarm, 1 = condition exists, 0 = normal/OK.

RXOPh > RXMAXh.

D[6] A14 Low received power (LOS) alarm, 1 = condition exists, 0 = normal/OK.

RXOPh < RXMINh.

D[5:0] Reserved Reserved - always write as zero.

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M9999-101204 48 October 2004

Warning Flags

Warning Register 0 (WARN0)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

W7 W6 W5 W4 W3 W2 W1 W0

read-only read-only read-only read-only read-only read-only read-only read-only

Default Value 0000 0000b = 00h (no events pending)

Serial Address A2h = 1010001b

Byte Address 116 = 74h

The power-up default value is 00h. Following the first A/D conversion, however, any of the bits may be set depending

upon the results.

Bit(s) Function Operation

D[7] W7 High temperature warning, TEMPh > THIGHh. 1 = condition exists, 0 = normal/OK.

D[6] W6 Low temperature warning, TEMPh < TLOWh. 1 = condition exists, 0 = normal/OK.

D[5] W5 High voltage warning, VINh > VHIGHh. 1 = condition exists, 0 = normal/OK.

D[4] W4 Low voltage warning, VINh < VLOWh. 1 = condition exists, 0 = normal/OK.

D[3] W3 High laser diode bias warning, IBIASh > IHIGHh. 1 = condition exists, 0 = normal/OK.

D[2] W2 Low laser diode bias warning, IBIASh < ILOWh. 1 = condition exists, 0 = normal/OK.

D[1] W1 High transmit optical power warning, 1 = condition exists, 0 = normal/OK.

TXOPh > TXHIGHh.

D[0] W0 Low transmit optical power warning, 1 = condition exists, 0 = normal/OK.

TXOPh < TXLOWh.

Warning Register 1 (WARN1)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

W15 W14

read-only read-only read-only read-only read-only read-only read-only read-only

Default Value 0000 0000b = 00h (no events pending)

Serial Address A2h = 1010001b

Byte Address 117 = 75h

The power-up default value is 00h. Following the first A/D conversion, however, any of the bits may be set depending

on the results.

Bit(s) Function Operation

D[7] W15 Received power high warning, 1 = condition exists, 0 = normal/OK.

RXOPh > RXHIGHh.

D[6] W14 Received power low warning, RXOPh < RXMINh. 1 = condition exists, 0 = normal/OK.

D[5:0] Reserved Reserved - always write as zero.

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OEM Password Entry (OEMPW)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write

Default Value 0000 0000b = 00h (reset to zero at power-on)

Serial Address A2h = 1010001b

Byte Address 120 – 123 = 78h - 7Bh (MSB is 7Bh)

This four-byte field is for entry of the password required to access the OEM area of the MIC3000’s memory and

registers. A valid OEM password will also permit access to the user areas of memory. The byte at address 123 (7Bh) is

the most significant byte. This field is compared to the four-byte OEMPWSET field at serial address A6h, bytes 12 to

15. If the two fields match, access is allowed to the OEM areas of the MIC3000 non-volatile memory at serial ad-

dresses A4h and A6h. The OEM password is set by writing the new value into OEMPWSET. The password compari-

son is performed following the write to the MSB, address 7Bh. This byte must be written last!

A four-byte burst-write sequence to address 78h may be used as this will result in the MSB being written last. The new

password will not take effect until after a power-on reset occurs or a warm reset is performed using the RST bit in

OEMCFG0. This allows the new password to be verified before it takes effect. This field is reset to all zeros at power

on. Any values written to these locations will be readable by the host regardless of the locked/unlocked status of the

device. If OEMPWSET is set to zero (00000000h), the MIC3000 will remain unlocked regardless of the contents of the

OEMPW field. This is the factory default security setting.

BYTE Weight

3 OEM Password Entry, Most Significant Byte (Address = 7Bh)

2 OEM Password Entry, 2nd Most Significant Byte (Address = 7Ah)

1 OEM Password Entry, 2nd Least Significant Byte (Address = 79h)

0 OEM Password Entry, Least Significant Byte (Address = 78h)

USER Password Setting (USRPWSET)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write

Default Value 0000 0000b = 00h

Serial Address A2h = 1010001b

Byte Address 250 = FAh

This register is for setting the password required to access the USER area of the MIC3000’s memory and registers.

This field is compared to the USRPW field at serial address A2h, byte 251. If the two fields match, access is allowed to

the USER areas of the MIC3000 non-volatile memory at serial addresses A0h and A2h. If a valid USER password has

not been entered, writes to the serial ID fields, USRCTRL, and the user scratchpad areas of A0h and A2h will not be

allowed, and USRPWSET will be unreadable (returns all zeroes).

A USER password is set by writing the new value into USRPWSET. The new password will not take effect until after a

power-on reset occurs or a warm reset is performed using the RST bit in OEMCFG0. This allows the new password to

be verified before it takes effect. This register is non-volatile and will be maintained through power and reset cycles. A

valid USER or OEM password is required for access to this register. Otherwise, this register will read as 00h. Note: a

valid OEM password overrides the USER password setting. If a valid OEM password is currently in place, the user

password will have no effect.

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M9999-101204 50 October 2004

USER Password (USRPW)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write

Default Value 0000 0000b = 00h

Serial Address A2h = 1010001b

Byte Address 251 = FBh

USER passwords are entered in this field. This field is compared to the USRPWSET field at serial address A2h, byte

250. If the two fields match, access is allowed to the USER areas of the MIC3000 non-volatile memory at serial

addresses A0h and A2h. If a valid USER password has not been entered, writes to the serial ID fields and user

scratchpad areas of A0h and A2h will not be allowed and USRPWSET will be unreadable (returns all zeroes).

Power-On Hours MSB (POHh)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read-only read/write read/write read/write read/write read/write read/write read/write

POH Fault Flag (POHFLT)

Default Value 0000 0000b = 00h

Serial Address A2h = 1010001b

Byte Address 252 = FCh

The lower seven bits of this register contain the most-significant bits of the 15-bit power-on hours measurement.

POHFLT is an error flag. The value in this register should be combined with the Power-on Hours, Low Byte, POHl, to

yield the complete result. If POHFLT is set, the power-on hour meter data has been corrupted and should be ignored.

It is recommended that a two-byte (or more) sequential read operation be performed on POHh and POHl to insure

coherency between the two registers. This register is non-volatile and will be maintained through power and reset

cycle.

Bit(s) Function Operation

D[7] Power-on hours fault flag 1 = fault; 0 = no fault.

D[6:0] Power-on hours, high byte Non-volatile.

Power-On Hours LSB (POHl)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

POH Fault Flag (POHFLT)

Default Value 0000 0000b = 00h

Serial Address A2h = 1010001b

Byte Address 253 = FDh

This register contains the least-significant eight bits of the 15-bit power-on hours measurement. The value in this

set, the power-on hour meter data has been corrupted and should be ignored. It is recommended that a two-byte (or

more) sequential read operation be performed on POHh and POHl to insure coherency between the two registers. This

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Data Ready Flags (DATARDY)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

TRDY VRDY IRDY TXRDY RXRDY

read only read only read only read only read only reserved reserved reserved

Default Value 0000 0000b = 00h

Serial Address A2h = 1010001b

Byte Address 254 = FEh

When the A/D conversion for a given parameter is completed and the results available to the host, the corresponding

data ready flag will be set. The flag will be cleared when the host reads the corresponding result register.

Bit(s) Function Operation

D[7] TRDY Temperature data ready flag 0 = old data; 1 = new data ready

D[6] VRDY Voltage data ready flag 0 = old data; 1 = new data ready

D[5] IRDY Bias current data ready flag 0 = old data; 1 = new data ready

D[4] TXRDY Transmit power data ready flag 0 = old data; 1 = new data ready

D[3] RXRDY Receive power data ready flag 0 = old data; 1 = new data ready

D[2:0] Reserved Reserved

USER Control Register (USRCTL)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

PORM PORS IE APCSEL

reserved read/write read only read/write read/write read/write reserved reserved

Default Value 0010 0000b = 20h

Serial Address A2h = 1010001b

Byte Address 255 = FFh

This register provides for control of the nominal APC setpoint and management of interrupts by the end-user.

APCSEL[1:0] select which of the APC setpoint registers, APCSET0, APCSET1, or APCSET2 are used as the nominal

automatic power control setpoint.

IE must be set for any interrupts to occur. If PORM is set, the power-on event will generate an interrupt and warm

resets using RST will not generate a POR interrupt. When a power-on interrupt occurs, assuming PORM=1, PORS will

be set. PORS will be cleared and the interrupt output de-asserted when USRCTL is read by the host. If IE is set while /

INT is asserted, /INT will be de-asserted. The host must still clear the various status flags by reading them. If PORM is

set following the setting of PORS, PORS will remain set, and /INT will not be de-asserted, until USRCTL is read by the

host.

PORM, IE, and APCSEL are non-volatile and will be maintained through power and reset cycles. A valid USER

password is required for access to this register.

Bit Function Operation

D[7] Reserved Always write as zero; reads undefined.

D[6] PORM Power-on interrupt mask 1 = POR interrupts enabled; 0 = disabled; read/write;

non-volatile.

D[5] PORS Power-on interrupt flag 1 = POR interrupt occurred; 0 = no POR interrupt;

read-only.

D[4] IE Global interrupt enable 1 = enabled; 0 = disabled; read/write; non-volatile.

D[3:2] APCSEL Selects APC setpoint register 00 = APCSET0, 01 = APCSET1, 10 = APCSET2;

11 = reserved; read/write; non-volatile.

D[1:0] Reserved Always write as zero; reads undefined.

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M9999-101204 52 October 2004

OEM Configuration Register 0 (OEMCFG0)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

RST ZONE DFLT OE MODREF VAUX[2] VAUX[1] VAUX[0]

write only read/write read only reserved reserved read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 00 = 00h

A write to OEMCFG0 will result in any A/D conversion in progress being aborted and the result discarded. The A/D will

begin a new conversion sequence once the write operation is complete. All bits in OEMCFG0 are non-volatile except

DFLT and RST. A valid OEM password is required for access to this register.

Bit(s) Function Operation

D[7] RST 0 = no action; 1 = reset; write-only.

D[6] ZONE Selects temperature zone. 0 = internal; 1 = external; non-volatile.

D[5] DFLT Diode fault flag. 1 = diode fault; 0 = OK.

D[4] OE Output enable for SHDN, VMOD, and VBIAS. 1 = enabled; 0 = hi-Z; non-volatile.

D[3] MODREF Selects whether VMOD is referenced to ground 1 = VDD; 0 = GND; non-volatile.

or VDD.

D[2:0] VAUX[2:0] Selects the voltage reported in VINh:VINl. 000 = VIN; 001 = VDDA; 010 = VBIAS; 011 = VMOD;

100 = APCDAC; 101 = MODDAC; 110 = FLTDAC;

non-volatile

OEM Configuration Register 1 (OEMCFG1)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

INV GAIN BIASREF RFB[2] RFB[1] RFB[0] SRCE SPOL

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 1 = 01h

A write to OEMCFG1 will result in any A/D conversion in progress being aborted and the result discarded. The A/D will

begin a new conversion sequence once the write operation is complete. All bits in OEMCFG1 are non-volatile and will

be maintained through power and reset cycles. A valid OEM password is required for access to this register.

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Bit(s) Function Operation

D[7] INV Inverts the APC op-amp inputs. When set to “0” 0 = emitter follower (no inversion);

the BIAS DAC output is connected to the “+” 1 = common emitter (inverted); read/write;

input and FB is connected to the “–” input of the non-volatile.

op amp. Set to “0” to use the ADC feedback loop.

D[6] GAIN Sets the feedback voltage range by changing the 1 = VREF/4 full scale;

APCDAC output swing; 0-VREF for optical 0 = VREF full scale; read/write ;non-volatile.

feedback, 0-VREF/4 for electrical feedback.

D[5] BIASREF Selects whether FB and VMPD are referenced to 1 = VDD; 0 = GND; read/write; non-volatile.

ground or VDD and selects feedback resistor

termination voltage (VDDA or GNDA).

D[4:2] RFB[2:0] Selects internal feedback resistance. (Resistors 000 = ×;

will be terminated to VDDA or GNDA according 001 = 800ý,

to BIASREF.) 010 = 1.6ký,

011 = 3.2ký,

100 = 6.4ký,

101 = 12.8ký,

110 = 25.6ký,

111 = 51.2ký;

read/write; non-volatile.

D[1] SRCE VBIAS source vs. sink drive. 1 = source (NPN),

0 = sink (PNP); read/write; non-volatile.

D[0] SPOL Polarity of shutdown output, SHDN, when active. 1 = high;

0 = low; read/write; non-volatile.

OEM Configuration Register 2 (OEMCFG2)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

I2CADR[3] I2CADR[2] I2CADR[1] I2CADR[0] LUTOFF LUTOFF LUTOFF LUTOFF

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 1010 xxxxb = xxh (slave address = 1010xxxb)

Serial Address A6h = 1010011b

Byte Address 2 = 02h

CAUTION: Changes to I2CADR take effect immediately! Any accesses following a write to I2CADR must be to the

newly programmed serial bus address. A valid OEM password is required for access to this register. This register is

non-volatile and will be maintained through power and reset cycles.

Bit(s) Function Operation

D[7:4] I2CADR[3:0] Upper four MSBs of the serial bus slave address; Read/write; non-volatile.

writes take effect immediately.

D[3:0] LUTOFF LUT offset. LUTOFF is added to the result of the Read/write; non-volatile.

digital temperature sensor to derive the table

index; writes take effect after reset.

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M9999-101204 54 October 2004

APC Setpoint 0 (APCSET0)

Automatic power control setpoint (unsigned binary) used when APCSEL[1:0] = 00

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 3 = 03h

When A.P.C. is on, i.e., the APCCAL bit in OEMCAL0 is set, the value in APCSETx is added to the signed value taken

from the A.P.C. look-up table and loaded into the VBIAS DAC. When A.P.C. is off, the value in APCSET is loaded

directly into the VBIAS DAC, bypassing the look-up table entirely. In either case, the VBIAS DAC setting is reported in

the VBIAS register. The APCCFG bits determine the DAC’s response to higher or lower numeric values. A valid OEM

password is required for access to this register. This register is non-volatile and will be maintained through power and

reset cycles.

APC Setpoint 1 (APCSET1)

Automatic power control setpoint (unsigned binary) used when APCSEL[1:0] = 01

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 4 = 04h

When A.P.C. is on, i.e., the APCCAL bit in OEMCAL0 is set, the value in APCSETx is added to the signed value taken

from the A.P.C. look-up table and loaded into the VBIAS DAC. When A.P.C. is off, the value in APCSET is loaded

directly into the VBIAS DAC, bypassing the look-up table entirely. In either case, the VBIAS DAC setting is reported in

the VBIAS register. The APCCFG bits determine the DAC’s response to higher or lower numeric values. This register

is non-volatile and will be maintained through power and reset cycles. A valid OEM password is required for access to

this register.

APC Setpoint 2 (APCSET2)

Automatic power control setpoint (unsigned binary) used when APCSEL[1:0] = 10

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 5 = 05h

When A.P.C. is on, i.e., the APCCAL bit in OEMCAL0 is set, the value in APCSETx is added to the signed value taken

from the A.P.C. look-up table and loaded into the VBIAS DAC. When A.P.C. is off, the value in APCSET is loaded

directly into the VBIAS DAC, bypassing the look-up table entirely. In either case, the VBIAS DAC setting is reported in

the VBIAS register. The APCCFG bits determine the DAC’s response to higher or lower numeric values. This register

is non-volatile and will be maintained through power and reset cycles. A valid OEM password is required for access to

this register.

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Modulation DAC Setting (MODSET)

Nominal VMOD setpoint

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 6 = 06h

When A.P.C. is on, the value corresponding to the current temperature is taken from the MODLUT look-up table,

added to MODSET and loaded into the VMOD DAC. This register is non-volatile and will be maintained through power

and reset cycles. A valid OEM password is required for access to this register.

IBIAS Fault Threshold (IBFLT)

Bias current fault threshold

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 7 = 07h

A valid OEM password is required for access to this register. This register is non-volatile and will be maintained

through power and reset cycles. A fault is generated if the bias current is higher than IBFLT value set in this register.

Transmit Power Fault Threshold (TXFLT)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 8 = 08h

A valid OEM password is required for access to this register. This register is non-volatile and will be maintained

through power and reset cycles. A fault is generated if the Transmit power is higher than TXFLT value set in this

Loss-Of-Signal Threshold (LOSFLT)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 9 = 09h

A valid OEM password is required for access to this register. This register is non-volatile and will be maintained

through power and reset cycles. A fault is generated if the received power is lower than LOSFLT value set in this

Bit Function Operation

D[7:0] Receive loss-of-signal threshold Read/write; non-volatile.

MIC3000 Micrel

M9999-101204 56 October 2004

Fault Suppression Timer (FLTTMR)

Fault suppression interval in increments of 0.5ms

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 10 = 0Ah

Saturation faults are suppressed for a time, tFLTTMR, following laser turn-on. This avoids nuisance tripping while the

APC loop starts up. The length of this interval is (FLTTMR∞0.5ms), typical. A value of zero will result in no fault sup-

pression. A valid OEM password is required for access to this register. This register is non-volatile and will be main-

tained through power and reset cycles.

Fault Mask (FLTMSK)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

OEMIM POHE SATMSK TXMSK IAMSK DFMSK

read/write read/write reserved reserved read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 11 = 0Bh

A valid OEM password is required for access to this register. This register is non-volatile and will be maintained

through power and reset cycles.

Bit Function Operation

D[7] OEMIM OEM interrupt mask bit 1 = masked; 0 = enabled; Read/write; non-volatile.

D[6] POHE OEM Power-on Hour Meter enable bit 1 = enabled; 0 = disabled; Read/write; non-volatile.

D[5:4] D[5:4] Reserved Always write as zero; reads undefined.

D[3] SATMSK APC saturation fault mask bit 1 = masked; 0 = enabled; Read/write; non-volatile.

D[2] TXMSK High TX optical power fault mask bit 1 = masked; 0 = enabled; Read/write; non-volatile.

D[1] IAMSK Bias current high alarm mask bit 1 = masked; 0 = enabled; Read/write; non-volatile.

D[0] DFMSK Diode fault mask bit 1 = masked; 0 = enabled; Read/write; non-volatile.

OEM Password Setting (OEMPWSET)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 12 - 15 = 0Fh - 0Fh; 0Ch = MSB

This four-byte field is the password required for access to the OEM area of the MIC3000’s memory and registers. The

byte at address 250 (FAh) is the most significant byte. This field is compared to the four-byte OEMPW field at serial

address A2h, byte 120 to 123. If the two fields match, access is allowed to the OEM areas of the MIC3000 non-volatile

memory at serial addresses A4h and A6h. The OEM password may be set by writing the new value into OEMPWSET.

The new password will not take effect until after a power-on reset occurs or a warm reset is performed using the RST

bit in OEMCFG0. This allows the new password to be verified before it takes effect. These registers are non-volatile

and will be maintained through power and reset cycles. A valid OEM password is required for access to this register.

October 2004 57 M9999-101204

MIC3000 Micrel

BYTE Weight

3 OEM Password, Most Significant Byte

2 OEM Password, 2nd Most Significant Byte

1 OEM Password, 2nd Least Significant Byte

0 OEM Password, Least Significant Byte

OEM Calibration 0 (OEMCAL0)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

FLTDIS FSPIN WRINH APCCAL FRCINT FRCTXF FRCLOS

reserved read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 16 = 10h

A valid OEM password is required for access to this register.

Bit Function Operation

D[7] Reserved Always write as zero; reads undefined.

D[6] FLTDIS Fault comparator disable; inhibits output of fault 0 = faults enabled; 1 = disabled; Read/write.

comparators when set.

D[5] FSPIN Fault comparator “spin-on-channel” mode select; 0 = normal operation; 1 = spin on channel;

do not enable ADC and FC spin-on-channel Read/write.

modes simultaneously.

D[4] WRINH Inhibit NVRAM write cycles. 0 = normal operation; 1 = inhibit writes; Read/write.

D[3] APCCAL Selects APC calibration mode - DACs may be 0 = normal mode; 1 = calibration mode; Read/write.

controlled directly.

D[2] FRCINT Forces the assertion of /INT 0 = normal operation; 1 = asserted; Read/write.

D[1] FRCTXF Forces the assertion of TXFAULT 0 = normal operation; 1 = asserted; Read/write.

D[0] FRCLOS Forces the assertion of RXLOS 0 = normal operation; 1 = asserted; Read/write.

OEM Calibration 1 (OEMCAL1)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

ADSTP ADIDL 1SHOT ADSPIN SPIN[2] SPIN[1] SPIN[0]

reserved read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 17 = 11h

A valid OEM password is required for access to this register.

MIC3000 Micrel

M9999-101204 58 October 2004

Bit Function Operation

D[7] Reserved Always write as zero; reads undefined.

D[6] ADSTP Stop ADC Halts the analog to digital converter 0 = normal operation; 1 = stopped; Read/write.

D[5] ADIDL ADC idle flag 0 = busy; 1 = idle; Read/write.

D[4] 1SHOT Triggers one-shot A/D conversion cycle 0 = normal operation; 1 = one-shot; Read/write.

D[3] ADSPIN Selects ADC spin-on-channel mode; do not 0 = normal operation; 1 = spin-on-channel;

enable ADC and FC spin-on-channel modes Read/write.

simultaneously

D[2], D[1], SPIN[2:0] ADC and fault comparator (FC) channel select for ADC: 000 = temperature; 001 = voltage; 010 = VILD;

D[0] spin-on-channel mode; do not enable ADC and 011 = VMPD; 100 = VRX; FC: 001 = VILD;

FC spin-on-channel modes simultaneously 001 = VMPD; 010 = VRX; Read/write.

Look-Up Table Index (LUTINDX)

Look-up table index as determined by temperature compensation logic

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 18 = 12h

The look-up table index is derived from the current temperature measurement and LUTOFF as follows:

NDEX LUTOF

=⎛

⎝

⎜⎞

⎠

⎟+

AVG

()

where TAVG(n) is the current average temperature. This register allows the current table

index to be read by the host. The table base address must be added to LUTINDX to form a complete table index in

physical memory. A valid OEM password is required for access to this register. Otherwise, reads are undefined.

BIAS DAC Setting (APCDAC)

Current VBIAS setting

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read only read only read only read only read only read only read only read only

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 20 = 14h

This register reflects (reads back) the value set in the APC register (APCSET0, APCSET1, or APCSET2 whichever is

selected). A valid OEM password is required for access to this register.

Modulation DAC Setting (MODDAC)

Current VMOD setting

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read only read only read only read only read only read only read only read only

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 21 = 15h

This register reflects (reads back) the value set in the MODSET register. A valid OEM password is required for access

to this register.

October 2004 59 M9999-101204

MIC3000 Micrel

OEM Readback Register (OEMRD)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

INT APCSAT IBFLT TXFLT RSOUT

reserved reserved reserved read only read only read only read only read only

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 22 = 16h

This register reflects (reads back) the status of the bits corresponding to the parameters defined below. A valid OEM

password is required for access to this register. Otherwise, reads are undefined and writes are ignored.

Bit Function Operation

D[7:5] Reserved Always write as zero; reads undefined.

D[4] INT Mirrors state of /INT but active-high; not state of 1 = interrupt; 0 = no interrupt.

physical pin!

D[3] APCSAT APC saturation fault comparator output state 1 = fault; 0 = normal operation.

D[2] IBFLT State of IBIAS over-current fault comparator 1 = fault; 0 = normal operation; read-only.

output

D[1] TXFLT State of transmit power fault comparator output 1 = fault; 0 = normal operation; read-only.

D[0] RSOUT State of the rate select output pin, RSOUT 1 = high; 0 = low; Read-only.

Power-On Hour Meter Data (POHDATA)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read/write read/write read/write read/write read/write read/write read/write read/write

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address 32-39 = 20h - 27h

These registers are used for backing up the POH result during power cycles. At power-up, the POH meter selects the

larger of the two values as the initial count. Incremental results are stored in alternate register pairs. The power-on

hour meter may be reset or preset by writing to these registers. These registers are non-volatile and will be maintained

through power and reset cycles. A valid OEM password is required for access to these registers.

BYTE Weight

3 POHA, high-byte

2 POHA, low-byte

1 POHB, high-byte

0 POHB, low-byte

OEM Scratchpad Registers (SCRATCHn)

Default Value 0000 0000b = 00h

Serial Address A6h = 1010011b

Byte Address SCRATCH0: 126 = 7Eh

SCRATCH1: 127 = 7Fh

SCRATCH2: 128 = 80h

.......................................

SCRATCH127: 253 = FDh

The scratchpad registers are general-purpose non-volatile memory locations. They can be freely read from and written

to any time the MIC3000 is in OEM mode.

MIC3000 Micrel

M9999-101204 60 October 2004

Manufacturer ID Register (MFG_ID)

Identifies Micrel as the manufacturer of the device. Always returns 2Ah

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read only read only read only read only read only read only read only read only

0 0101010

Default Value 0010 1010b = 2Ah

Serial Address A6h = 1010011b

Byte Address 254 = FEh

The value in this register, in combination with the DEV_ID register, serve to identify the MIC3000 and its revision

number to software. This register is read-only.

Bit(s) Function Operation

D[7:0] Identifies Micrel as the manufacturer of the device. Read only. Always returns Ah

Always returns 2Ah.

Device ID Register (DEV_ID)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

read only read only read only read only read only read only read only read only

MIC3000 DEVICE ID DIE REVISION

always reads as zero “0” at D [4-7]

Default Value 0000 xxxxb = 0xh

Serial Address A6h = 1010011b

Byte Address 255 = FFh

The value in this register, in combination with the MFG_ID register, serve to identify the MIC3000 and its revision

number to software. This register is read-only.

October 2004 61 M9999-101204

MIC3000 Micrel

Applications Information

Controlling Laser Diode Bias

APCDAC

To ADC

o ADC

MIC3000

BASE

MOD

VMPD

VDDA

VBIAS

COMP

VILD+

VILD–

SHDN

LDC/MD

L1 LDA

From laser

driver

COMP

PNP

VDD

SENSE

Redundant

Switch

(optional)

Figure 25. Example APC Circuit for Common-Cathode TOSA

APCDAC

o ADC

To ADC

MIC3000

RFB

RBASE IMOD

VMPD

VDDA

VBIAS

COMP

VILD+

VILD–

SHDN

LDC/MD

L1 LDA

To laser

driver

CCOMP

PNP

VDD

RSENSE

Redundant

Switch

(optional)

Figure 26. Example APC Circuit for Common Anode TOSA

MIC3000 Micrel

M9999-101204 62 October 2004

Choosing CCOMP

The APC loop is compensated by a capacitor, CCOMP,

connected from COMP to either VDDA or GNDA. This

capacitor adjusts the slew rate and bandwidth of the loop as

follows:

SlewRate dV dt I

SLEW

COMP

where:

ISLEW = 64µA,

GM = 125µMho

these relationships are shown graphically in Figure 27 and

Figure 28.

1 6 11 16 21 26 31 36 41 46 5

SLEW RATE (mV/ s)

CCOMP (nF)

Figure 27. Slew Rate vs. CCOMP Value

0.50

1.00

1.50

2.00

2.50

10 20 30 40 50 60 70 80 90 10

BANDWIDTH (kHz)

CCOMP (nF)

Figure 28. Open Loop Unity-Gain Bandwidth

vs. CCOMP

The loop response should be tailored to the data rate,

encoding format and maximum run-lengths, and required

laser turn-on time. Higher data rates and/or shorter maximum

run lengths and/or faster turn-on times call for smaller capaci-

tors. Lower data rates and/or longer maximum run lengths

and/or slower turn-on times call for larger capacitors. In order

to meet the SFP/GBIC turn-on requirement of 1ms, for

example, do not employ a capacitor larger than 20nF. Low

ESR capacitors such as ceramics will give the best results.

Excessive ESR will reduce the effectiveness of CCOMP. The

capacitor’s voltage rating must exceed VDDA. Some typical

values are shown in Table 20.

Application CCOMP (nF)

8b/10b encoding, •1Gbps, tON - 1ms 10

SONET (62b/64b encoding), •1Gbps 22

•155Mbps, tON - 1ms 22

•155Mbps 100

Table 20. Typical Values for CCOMP

While there is no theoretical upper limit on the size of CCOMP,

it is desirable for the loop to be able to track the changes

resulting from periodic temperature compensation. The typi-

cal temperature compensation update period is 1.6s. There-

fore, a maximum size of 1µF is recommended. If laser turn-

on time is not a factor, a value between 100nF and 1µF can

be used for virtually any typical application. The tradeoff is

that higher value capacitors have a larger physical size and

cost.

In order to maximize the power supply rejection ratio (PSRR),

CCOMP should be returned to GNDA when the VBIAS output

is sourcing current, e.g., driving an NPN transistor

(SRCE bit = 1). CCOMP should be returned to VDDA when the

VBIAS output is sinking current, e.g., driving a PNP transistor

(SRCE bit =0).

Measuring Laser Bias Current

VILD+ and VILD– form a pair of pseudo-differential A/D

inputs for measuring laser diode bias current via a sense

resistor. The signal applied to these inputs is converted to a

single-ended, ground-referenced signal for input into the

ADC and bias current fault comparator. These inputs have

limited common-mode voltage range. The full-scale differen-

tial input range is VREF/4 or about 300mV.

Figure 25 and Figure 26 illustrate the typical implementation

of this function. Note that VILD– is always connected to the

circuit’s reference potential: VDD in the case of a common-

anode transmitter optical sub-assembly (TOSA) and GND in

the case of a common-cathode TOSA. Note that the monitor

photodiode current will also flow in the sense resistor. This

will result in a small offset in the measured bias current. The

APC function will hold this term constant, so it can be

corrected for in the external calibration constants. The sens-

ing resistor could also be connected between VDD and the

emitter of Q1 on Figure 25 or between the emitter of Q1 an

GND on Figure 26.

Interfacing To Laser Drivers

In order for the MIC3000 to control the modulation current of

the laser diode, an interface circuit may be required depend-

ing on the method used by the driver to set its modulation

current level. Generally, most laser diode driver ICs use one

of three methods:

a) A current, ISET, is sourced into a pin on the driver

IC. The modulation current delivered by the driver

is then some fixed multiple of ISET. The SY88912

is an example of this type of driver. A simple circuit

can be used to create a current source controlled

by the VMOD outputs. The circuit is based on an

external bipolar transistor and a current sensing

resistor.

October 2004 63 M9999-101204

MIC3000 Micrel

b) A current, ISET, is drawn out of a pin on the driver

IC. The modulation current delivered by the driver

is then some fixed multiple of ISET. A simple circuit

can be used to create a current source controlled

by the VMOD outputs. The circuit is based on an

external bipolar transistor and a current sensing

resistor.

c) A voltage, VSET, is applied to a pin on the driver IC.

This voltage may be referenced to GND or VDD.

The MIC3000’s VMOD+ output can supply this

voltage directly. If a voltage swing wider than VREF

is needed, gain can be applied with a pair of

external resistors. The SY88932, SY88982, and

SY89307 are examples of this type of driver.

SY88912 3.3V 3.2Gbps SONET/SDH Laser Driver

The modulation level of the SY88912 driver is controlled by

the current sourced into the RSET pin (Type (a) above). The

circuit shown in Figure 29 allows the MIC3000’s VMOD

outputs to control the SY88912’s modulation current from its

minimum value, 5mA, to its maximum value, 60mA. The

circuit operates as a DAC-controlled current source. The

current source is formed by the VMOD buffer amplifier, exter-

nal transistor, and current sense resistor. The op-amp acts to

force the voltage drop across RSET to be equal to the DAC

output voltage.

The current, ISET, through RSET is therefore regulated as

ISET = VMOD+/RSET (In this case, the DAC output and

therefore the op-amp output, are referenced to VDDA.) The

SY88912’s current gain, IMOD/ISET, is 23. A modulation

current level of 60mA requires ISET = 60mA/23 = 2.61mA; a

modulation current level of 5mA requires ISET = 5mA/23 =

0.217mA. RFLTR and CFLTR are optional and act to eliminate

any noise that might be present on VDDA or VMOD. The values

shown give a 100µs time constant. Note that the time con-

stant is present whenever the laser is turned on or turned off.

This must be taken into account when designing to system

specifications such as the SFP MSA’s tON and tOFF require-

ments. The values of RFLTR and/or CFLTR may need to be

adjusted accordingly. The impact of the filter time constant on

the turn off time can be eliminated by using the MIC3000’s

SHDN signal to drive the SY88912’s enable input, /EN.

The use of the SHDN signal is completely optional. The main

benefit to using SHDN, however, is that it shuts down the

driver very quickly and irrespective of the values of RFLTR and

CFLTR. The values of RFLTR and CFLTR can therefore be

increased, enhancing their effect without incurring any turn-

off time penalty. Depending on the polarity chosen for SHDN

using the SPOL bit, an inversion may be required between

the MIC3000’s SHDN output and the driver’s /EN input. (The

SHDN output may also be used to drive a redundant safety

switch and the same polarity may not be appropriate for both

functions.)

MODDAC

MODREF bit = 1

MIC3000 SY88912

SET

420

SET

MOD

×23

RFLTR

SHDN /EN

GND

SET

MOD

–

Optional - see text

DDA

MOD

GNDA

CFLTR

100nF

2N3906

DD(1)

Notes:

1. Bypass capacitors not shown for clarity.

Figure 29. Controlling the SY88912

Modulation Current

For the circuit of Figure 29, the modulation current control

range and corresponding DAC values are shown in Table 21

below.

DAC VALUE VDDA – VMOD ISET IMOD

0 0V 0mA 0mA

19 0.091V 0.216mA 4.98mA

127 0.61V 1.45mA 33.4mA

255 1.22V 2.91mA 66.8mA

Table 21. Control Range of SY88912

Modulation Control Circuit

SY88932 3.3V 3.2Gbps SONET/SDH Laser Driver

The modulation level of the SY88932 driver is controlled by

the voltage applied to the VCTRL pin (Type (c) above). The

circuit shown in Figure 30 allows the MIC3000’s VMOD output

to control the SY88932’s modulation current. The circuit

operates as a DAC-controlled voltage source. VCTRL is

simply the DAC output voltage. See section above on SY88912

for RFLTR, CFLTR and SHDN.

MODDAC

MODREF bit = 0

MIC3000 SY88932

MOD

FLTR

SHDN /EN

GND

CTRL

MOD

–

Optional - see text

DDA

MOD

GNDA

FLTR

100nF

DD(1)

Note:

1. Bypass capacitors not shown for clarity.

Figure 30. Controlling the SY88932

Modulation Current

MIC3000 Micrel

M9999-101204 64 October 2004

SY89307 5.0V/ 3.3V 2.5Gbps VCSEL Driver

The modulation level of the SY89307 driver is controlled by

the voltage applied to the VCTRL pin (Type (c) above). The

circuit shown in Figure 31 allows the MIC3000’s VMOD output

to control the SY89307’s output swing. VCTRL is simply the

DAC output voltage. The circuit operates as a DAC-con-

trolled voltage source. See section above on SY88912 for

RFLTR, CFLTR.

MODDAC

MODREF bit = 1

MIC3000 SY89307

FLTR

CTRL

MOD

–

DDA

MOD

GNDA

CFLTR

100nF

DD(1)

Note:

1. Bypass capacitors not shown for clarity.

Figure 31. Controlling the SY89307

Modulation Current

Laser Drivers Programmed via a Sink Current

The modulation level of some laser diode drivers is controlled

by a current sourced out of the RSET pin (Type (b) above).

The circuit shown in Figure 32 allows the MIC3000’s VMOD

outputs to control the set current, ISET. The circuit operates as

a DAC-controlled current sink. The current sink is formed by

the VMOD buffer amplifier, external transistor, and current

sense resistor. The op-amp acts to force the voltage drop

across RSET to be equal to the DAC output voltage.

The current through RSET is therefore regulated as

IRSET = VMOD+/RSET. ISET is given by the equation:

VMOD

SET SET

⎛

⎝

⎜⎞

⎠

⎟+

⎛

⎝

⎜⎞

⎠

⎟

(8)

where β is the DC gain of Q1

The higher the gain of the transistor, the closer ISET will be to

the current in RSET. RFLTR and CFLTR act to eliminate any

noise that might be present on VDDA or VMOD. The values

shown give a 100µs time constant. See section above on

SY88912 for RFLTR, CFLTR and SHDN.

MODDAC

MODREF bit = 1

MIC3000 LD Driver

SET

MOD

×23

FLTR

SHDN /EN

GND

SET

MOD

–

Optional - see text

DDA

MOD

GNDA

2N3906

DD(1)

FLTR

100nF

Notes:

1. Bypass capacitors not shown for clarity

Figure 32. Controlling the Modulation Current

via a Sink Current

Drivers With Monitor Outputs

Laser diode driver ICs have been introduced with monitor

outputs. These outputs provide ground-referred signals that

mirror critical signals like laser bias current, modulation

current or monitor photodiode current, an analog of transmit-

ted power. Generally, these outputs source a current into an

external resistor to generate a ground referenced voltage.

Using these outputs with the MIC3000 is straightforward

since the MIC3000’s VILD+/– and VMPD inputs are polarity

programmable,

Shutdown Output

The shutdown output, SHDN, can be used in two ways: as an

enable or on/off control for the laser driver IC, and/or to control

a redundant switch in the laser current path. The redundant

switch provides a means for the MIC3000 to shut off the laser

current even if the bias transistor or modulator is damaged or

fails. SHDN is active any time the MIC3000 shuts down the

laser, i.e., if the TXDISABLE function is asserted in hardware

or software, or if the fault detection circuits trigger laser

shutdown. The shutdown output, SHDN, is essentially a logic

output with programmable polarity. The programmable polar-

ity allows SHDN to drive either high-side or low-side switches

or active-high or active-low enable inputs without the need for

external inversion circuits. If an active-low and an active-high

shutdown signal are required, an external inverter will be

necessary. Examples of redundant switch circuits are shown

in Figure 33.

October 2004 65 M9999-101204

MIC3000 Micrel

BASE

HDN

High-Side

Low-Side

ILD

PULLUP

PNP SHDN

P-FE

ILD

PULLUP

BASE

HDN

ILD

GND

PULLDOWN

NPN SHDN

ILD

N-FE

GND

PULLUP

Figure 33. Redundant Switch Circuits

Temperature Sensing

The MIC3000 can measure and report its own internal

temperature or the temperature of a remote PN junction or

“thermal diode”. In either case it is important to note that any

board-mounted semiconductor device tends to track the

ground plane temperature around it. The dominant thermal

path to the sensor is often the ground pin. The ground pin

usually connects to the leadframe paddle on which the die is

mounted. Typical semiconductor packages, being non-con-

ductive plastic, insulate the device from the ambient air.

The advantage to using a remote sensor is that the tempera-

ture may be sensed at a specific location, such as in the

proximity of the laser diode, or away from any heat sources

where it will more closely track the transceiver’s case tem-

perature. The measured temperature is reported via the

digital diagnostics registers and is used to index the tempera-

ture compensation tables. (Note: SFF-8472 does not specify

the meaning of the reported temperature information or the

location from which it is taken. This information is to be

specified in the transceiver vendor’s datasheet.)

Remote Sensing

For remote temperature sensing using the XPN pin, most

small-signal PNP transistors with characteristics similar to

the JEDEC 2N3906 will perform well as thermal diodes. Table

22 lists several examples of such parts that Micrel has tested

for use with the MIC3000. Other transistors equivalent to

these should also work well.

Vendor Part Number Package

Fairchild Semiconductor MMBT3906 SOT-23

On Semiconductor MMBT3906L SOT-23

Infineon Technologies SMBT3906/MMBT3906 SOT-23

Samsung Semiconductor KST3906-TF SOT-23

Table 22. Transistors Suitable for

Use as Remote Diodes

Minimizing Errors

Self-Heating

One concern when measuring temperature is to avoid errors

induced by self-heating. Self-heating is caused by power

dissipation within the MIC3000. It is directly proportional to

the internal power dissipation and the junction-to-ambient

thermal resistance, θJA. The dissipation in the MIC3000 must

be calculated and reduced to a temperature offset. The power

dissipation, PDISS, includes the effect of quiescent current

and all currents flowing into or out of any signal pins, espe-

cially VBIAS and VMOD. The temperature rise caused by self-

heating is given by:

∆tP

DISS J

=×

(9)

θJA is given in the “Operating Ratings” section above as

43°C/W. The possible contributors to self-heating are listed in

Table 23.

The numbers given in Table 23 suggest that the power

dissipation in a typical application will be no more than a few

tens of milliwatts, leading to self-heating on the order of 1°C.

Description Magnitude Notes

Quiescent power IDD ∞ VDD Typically VDD = 3.3V, IDD = 2.7mA ∅ 3.3V ∞ 2.7mA = 8.91mW.

SHDN current IOL ∞ VOL Negligible if MOSFET is used as shutdown device.

TXFAULT current IOL ∞ VOL Worst case is VDD2/RPULLUP; RPULLUP is 4.7ký min. per SFP

MSA ∅ 3.3V2/4.7ký = 2.32mW.

VBIAS current VBIAS ∞ IVBIAS or (VDD–VBIAS) ∞ IVBIAS Worst-case is VREF ∞ 10mA = 1.22V ∞ 10mA = 12.3mW.

VMOD current VMOD ∞ IVMOD or (VDD–VMOD) ∞ IVMOD Worst-case is VREF ∞ 10mA = 1.22V ∞ 10mA = 12.3mW.

RSOUT current IOL ∞ VOL Only for rate-agile applications using RSIN/RSOUT.

DATA current IOL ∞ VOL ∞ duty_cycle May be negligible; Depends on bus speed, pullup current,

and bus activity.

RXLOS current IOL ∞ VOL Worst case is VDD2/RPULLUP; RPULLUP is 4.7Ký min. per

SFP MSA ∅ 3.3V2/4.7ký = 2.32mW.

Table 23. Contributors to Self-Heating

MIC3000 Micrel

M9999-101204 66 October 2004

In any application, the best and often easiest approach is to

measure performance in the final application environment.

This is especially true when dealing with systems for which

some temperature data may be poorly defined or unobtain-

able except by empirical means. If desired, the external

calibration constants may be used to correct the temperature

readings.

Series Resistance with External Temperature Sensor

The operation of the MIC3000 depends upon sensing the

VCB-E of a diode-connected PNP transistor (“diode”) at two

different current levels. For remote temperature measure-

ments, this is done using an external diode connected be-

tween XPN and ground. Since this technique relies upon

measuring the relatively small voltage difference resulting

from two levels of current through the external diode, any

resistance in series with the external diode will cause an error

in the temperature reading from the MIC3000. A good rule of

thumb is this: for each ohm in series with the external

transistor, there will be a 0.9°C error in the MIC3000’s

temperature measurement. It is not difficult to keep the series

resistance well below an ohm (typically <0.1), so this will

rarely be an issue.

XPN Filter Capacitor Selection

It is desirable to employ a filter capacitor between XPN and

GNDA. The use of this capacitor is especially recommended

in environments with a lot of high frequency noise (such as

digital switching noise), or if long wires are used to connect to

the remote diode. The maximum recommended total capaci-

tance from the XPN pin-to-GND is 2000pF. The recom-

mended typical capacitor is a 1000pF NP0 or C0G ceramic

capacitor with a 10% tolerance. If the remote diode is to be at

a distance of more than 6" to 12" from the MIC3000, using

twisted pair wiring or shielded microphone cable for the

connections to the diode can significantly reduce noise

pickup. If using a long run of shielded cable, remember to

subtract the cable’s conductor-to-shield capacitance from

the 2000pF maximum total capacitance.

XPN Layout Considerations

The following guidelines should be kept in mind when design-

ing and laying out circuits using the MIC3000 and a remote

thermal diode:

1. Place the MIC3000 as close to the remote diode as

possible, while taking care to avoid severe noise

sources such as high speed data busses, and the

like.

2. Since any conductance from the various voltages

on the PC board and the XPN line can induce

errors, it is good practice to guard the remote

diode’s emitter trace with a pair of ground traces.

These ground traces should be returned to the

MIC3000’s own ground pin. They should not be

grounded at any other part of their run. However,

it is highly desirable to use these guard traces to

carry the diode ‘s own ground return back to the

ground pin of the MIC3000, thereby providing a

Kelvin connection for the base of the diode.

3. When using the MIC3000 to sense the tempera-

ture of a processor or other device which has an

integral thermal diode, connect the emitter and

base of the remote sensor to the MIC3000 using

the guard traces and Kelvin return, shown in Figure

34. The collector of the remote diode is typically

inaccessible to the user on these devices.

4. Due to the small currents involved in the measure-

ment of the remote diode’s ∆VBE, it is important to

adequately clean the PC board after soldering to

prevent current leakage. This phenomenon will

most likely show up as an issue in situations where

water-soluble soldering fluxes are used.

5. In general, wider traces for the ground and T1 lines

will help reduce susceptibility to radiated noise

(wider traces are less inductive). Use trace widths

and spacing of 10 mils wherever possible and

provide a ground plane under the MIC3000 and

under the connections from the MIC3000 to the

remote diode. This will help guard against stray

noise pickup.

GNDA

XPN

IC3000

GUARD/RETURN

REMOTE DIODE (XPN)

GUARD/RETURN

Figure 34. Guard Traces and Kelvin Return

for Remote Thermal Diode

Layout Considerations

Small Form-Factor Pluggable (SFP) Transceivers

The pinout of the MIC3000 digital control and status signals

was optimized for use in small form-factor pluggable (SFP

MSP) optical transceivers. If the MIC3000 is mounted on the

bottom of the PC board with the correct rotation, the control

and status I/O can be routed to the host connector without

changing the order. This is shown in Figure 35 below.

789101112

24 23 22 21 20 19

TXFAULT

TXDISABLE

DATA

CLOCK

MOD-DEF (0)

RATESEL

LOS

TOP VIEW

Figure 35. Typical SFP Control and Status I/O

Signal Routing (not to scale)

October 2004 67 M9999-101204

MIC3000 Micrel

Power Supplies

The MIC3000 has separate power supply and ground pins for

both the analog and digital supplies. This helps prevent digital

switching noise from corrupting the analog functions. The

individual supply and ground pins are not isolated from one

another inside the IC. Separate analog and digital power and

ground planes are NOT required on the PCB. Having one of

each plane (power and ground) is certainly good practice,

however. If dedicated power and ground layers are not

available, care should be taken to route the digital supply and

return currents back to the supply separate from the analog

supply connections. A schematic of this approach is shown in

Figure 36. Each supply should be bypassed as close to the

IC as possible with 0.01µF capacitor (Low ESR capacitors

such as ceramics are preferred.) as shown. This assumes

that bulk capacitance is already present upstream. If no other

filter capacitance is present nearby, a 1µF filter capacitor

should be added in parallel to the 0.01µF capacitor.

VDDD

(1)

0.01µF

1.0µF

(1)

1.0µF

0.01µF

MIC3000

GNDD

HOST P/S (+)

HOST P/S (–)

VDDA

GNDA

Ground Plane

Power Plane

Figure 36. Power Supply Routing and Bypassing

Using The MIC3000 In a 5V System

It is fairly straightforward to use the MIC3000 in a system

powered from a 5V rail. In these systems, the laser diode

driver IC will usually be powered from the 5V rail. A small

linear regulator, such as Micrel’s MIC5213, can be used to

generate a 3.3V power supply rail if one does not otherwise

exist in the system. All of the MIC3000’s digital I/O’s except

for RSOUT are 5V tolerant and may be pulled up to 5.5V

regardless of the MIC3000’s supply voltage. They can be

connected directly to a 5V host. The MIC5213 is ideal, as it is

capable of supplying up to 80mA, is in a tiny SC-70 package,

and is stable with small ceramic output capacitors.

The laser diode driver interface will be unchanged in most

cases. Ground referred voltages and currents can be gener-

ated the same way as with 3.3V-powerd drivers. The excep-

tion is drivers that are controlled by a voltage referenced to

VDD such as the SY89307. The MIC3000’s VBIAS or VMOD

output will be referenced to its own 3.3V power supply

whereas the driver’s input will be referenced to its 5V power

supply. The solution is a simple level-shifting circuit that

converts the VBIAS/VMOD output into a current and then into

a VDD-referenced voltage.

MIC3000 Micrel

M9999-101204 68 October 2004

MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com

The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.

Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.

Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can

reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into

the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s

use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify

Micrel for any damages resulting from such use or sale.

Package Information

24-Pin MLF® (ML)