ZMN2400 * 2.4 GHz ZigBee Transceiver Module * Supports Multiple Network Topologies * Small Size, Light Weight, Low DC Power Requirements * FCC and ETSI Certified for Unlicensed Operation The ZMN2400 2.4 GHz transceiver module is a low cost, low-power solution for point-to-point, point-to-multipoint and MESH wireless systems. The ZMN2400 module provides the flexibility and versatility to serve applications ranging from cable replacements to sensor networks. Based on the IEEE 802.15.4 wireless standard and the ZigBee protocol stack, the ZMN2400 module is easy to integrate and provides robust wireless communications including MESH network operation. The ZMN2400 also includes Cirronet's powerful CSM application profile, which eliminates the need for customer firmware programming. ZigBee Transceiver Module ZMN2400 Absolute Maximum Ratings Rating Value All Input/Output Pins -0.3 to +6.0 Non-Operating Ambient Temperature Range -40 to +85 Units V o Shown with Shield Removed C ZMN2400 Electrical Characteristics Characteristic Sym Notes Minimum Operating Frequency Range 2405 Operating Frequency Tolerance -300 Spread Spectrum Method Typical Maximum Units 2480 MHz 300 kHz Direct Sequence Modulation Type O-QPSK Number of RF Channels 16 RF Data Transmission Rate 250 Symbol Rate Tolerance kb/s 120 RF Channel Spacing ppm 5 MHz Receiver Sensitivity, 10-5 BER -92 dBm Upper Adjacent Channel Rejection, +5 MHz 46 dB Lower Adjacent Channel Rejection, -5 MHz 39 dB Upper Alternate Channel Rejection, +10 MHz 58 dB Lower Alternate Channel Rejection, -10 MHz 55 dB Maximum RF Transmit Power -3 0 Transmit Power Adjustment dBm -25 Optimum Antenna Impedance 50 1 dB ZMN2400 Electrical Characteristics Characteristic Sym Notes ADC Input Range Minimum Typical 0 ADC Input Resolution ADC Input Impedance Maximum Units 2.5 V 10 bits 55 M PWM Output Resolution 12 bits 1.2 115.2 kb/s Logic Low Input Level -0.5 0.64 V Logic High Input Level 1.98 3.7 V UART Baud Rate Digital I/O: Logic Input Internal Pull-up Resistor 20 K Logic Low Output Level, ISINK = 10 mA 0.5 Logic High Output Level 2.4 Logic Low Output Sink Current Logic High Output Source Current Power Supply Voltage Range V V ISINK 20 mA ISOURCE 5 mA +5.5 Vdc 10 mVP-P VCC +3.3 Power Supply Voltage Ripple Receive Mode Current 25 mA Transmit Mode Current 30 mA Sleep Mode Current 25 A Operating Temperature Range -40 CAUTION: Electrostatic Sensitive Device. Observe precautions when handling. 2 85 o C Z M N 2 4 0 0 B lo c k D ia g r a m + 3 .3 V + 3 .3 V V C C S w itc h 3 2 .7 6 8 k H z R e g 1 G N D 1 6 M H z + 3 .3 V 2 P W M A 3 P W M B 4 F IF O F ilte r F IF O P F ilte r 5 G P IO 1 6 C C A G P IO 0 S F D C S n G P IO 2 7 G P IO 3 8 G P IO 4 9 G P IO 5 1 0 G N D 1 1 L IN K /T D O 1 2 /T R S T 1 3 A C T /T C K 1 4 S T A T 1 /T M S 1 5 S T A T 0 /T D I 1 6 G N D 1 7 G N D 1 8 A T m e g a 1 2 8 M ic r o c o n tr o lle r M IS O C C 2 4 2 0 8 0 2 .1 5 .4 R a d io 3 5 R F IO M O S I S C L K 3 2 3 3 3 4 3 6 G N D 3 1 G N D 3 0 S P I_ M IS O 2 9 G N D A D C Z 2 8 S P I_ M O S I 2 7 S P I_ S C L K 2 6 S P I_ E N 2 5 G N D U A R T _ T X 2 4 A D C Y U A R T _ R X F ilte r G N D 2 3 A D C X G N D F ilte r 2 2 F ilte r 2 1 N C 2 0 R E S E T 1 9 Figure 1 ZMN2400 Hardware ZMN2400 Firmware The major hardware components of the ZMN2400 include a CC2420 IEEE 802.15.4 compatible transceiver and an ATmega128 microcontroller. The ZMN2400 operates in the frequency band of 2405 to 2460 MHz at a nominal output power of 1 mW. The main firmware components in the ZMN2400 include the ZigBee protocol stack and the Cirronet Standard Module (CSM) application profile. The ZigBee protocol stack implements networking and security, with underlying support from the 802.15.4 Media Access Control (MAC) layer. The standard ZMN2400 firmware implements a ZigBee full function device (FFD). This allows the module to operate as either a coordinator or router. Optional ZMN2400 firmware is available that implements a ZigBee reduced function device (RFD). This allows the module to operate as an end device. The CSM profile provides an application programming interface (API) for all the ZMN2400 application hardware interfaces. The CSM profile includes Network Discovery, Send/Receive Serial Data, Read/Write SPI Port, Read ADC Inputs, Write DAC Outputs, Read/Write GPIO and Module Configuration services. In addition, the CSM profile provides two sleep modes - timer sleep and interrupt sleep. See the ZMN2400HP ZigBee Module Developer's Kit User's Manual for details of the CSM profile API. The CC2420 transceiver receives a 16 MHz reference clock through an IC switch controlled by the ATmega microcontroller, which allows the transceiver to be idled during sleep periods. SPI signals provide the main interface between the transceiver and microcontroller. The SPI signals are supplemented by FIFO and FIFOP transceiver buffer status signals, the CCA clear channel assessment signal, and the SFD start of frame delimiter signal. In addition to controlling the CC2420, the ATmega128 provides a variety of application hardware interfaces including an SPI interface, UART interface, three 10-bit ADC inputs, two PWM (DAC) outputs, and six general purpose digital I/O ports. 3 ZMN2400 I/O Pad Descriptions - Some I/O Pad Functionality Depends on the Firmware Version Installed. Pad Name Description 1 VCC Power supply input, +3.3 to +5.5 Vdc. 2 GND Power supply and signal ground. Connect to the host circuit board ground. 3 PWMA Pulse-width modulated output A. Provides a DAC function when used with an external low-pass filter. 4 PWMB Pulse-width modulated output B. Provides a DAC function when used with an external low-pass filter. 5 GPIO0 Configurable digital I/O port 0. When configured as an output, the power-on state is also configurable. 6 GPIO1 Configurable digital I/O port 1. When configured as an output, the power-on state is also configurable. 7 GPIO2 Configurable digital I/O port 2. When configured as an output, the power-on state is also configurable. 8 GPIO3 Configurable digital I/O port 3. When configured as an output, the power-on state is also configurable. 9 GPIO4 Configurable digital I/O port 4. When configured as an output, the power-on state is also configurable. 10 GPIO5 Configurable digital I/O port 5. When configured as an output, the power-on state is also configurable. 11 GND 12 LINK/TDO 13 /TRST 14 ACT/TCK 15 STAT1/TMS 16 STAT0/TDI 17 - 20 GND 21 UART_RX Serial data input to UART. 22 UART_TX Serial data output from UART. 23 NC 24 /RESET 25 ADCX 10-bit ADC input X. Input voltage range is 0 to +2.5 Vdc. 26 ADCY 10-bit ADC input Y. Input voltage range is 0 to +2.5 Vdc. 27 ADCZ 10-bit ADC input Z. Input voltage range is 0 to +2.5 Vdc. 28 GND Power supply and signal ground. Connect to the host circuit board ground. 29 SPI_EN 30 SPI_SCLK SPI port clock signal. 31 SPI_MOSI SPI port data output. 32 SPI_MISO SPI port data input. 33 GND Power supply and signal ground. Connect to the host circuit board ground. 34 GND RF ground. Connect to the host circuit board ground plane, and to shield when using coaxial cable. 35 RFIO RF port. Connect the antenna to this port with a 50 stripline or semi-rigid coaxial cable. 36 GND RF ground. Connect to the host circuit board ground plane, and to shield when using coaxial cable. Power supply and signal ground. Connect to the host circuit board ground. Output signal indicating module's link status in default mode. Also used by JTAG interface as Test Data Output. Used by JTAG interface as active low Reset input. Leave disconnected if JTAG interface will not be used. Output signal indicating RF data activity. Also used by JTAG interface as Data Clock Input. Output signal defined by firmware version. Also used to select JTAG mode. Output signal defined by firmware version. Also used by JTAG interface as Test Data Input. Power supply and signal grounds. Connect to the host circuit board ground. No connection. Active low module hardware reset input. This input must be held low when the power supply input is in the range of +1.5 to +2.7 Vdc. Active-low enable output for SPI bus devices. 4 Z M N 2 4 0 0 O u tlin e a n d M o u n tin g D im e n s io n s 1 .2 0 0 0 .0 6 0 0 .0 9 0 1 8 0 .0 9 0 1 0 .0 3 0 S q u a re 1 9 0 .8 3 5 0 .7 9 0 T o p V ie w 3 6 0 .0 9 5 Figure 2 RFIO Stripline The RFIO pad on the radio module is connected directly to an antenna on the host circuit board, or to an MMCX or similar RF connector. It is important that this connection be implemented as a 50 ohm stripline. Referring to Figure 3, the width of this stripline depends on the thickness of the circuit board between the stripline and the groundplane. For FR-4 type circuit board materials (dielectric constant of 4.7), the width of the stripline is equal to 1.75 times the thickness of the circuit board. Note that other circuit board traces should be spaced away from the stripline to prevent signal coupling, as shown in Figure 4. The stipline trace should be kept short to minimize its insertion loss. C ir c u it B o a r d S tr ip lin e T r a c e D e ta il C o p p e r S tr ip lin e T ra c e C o p p e r G ro u n d P la n e F R -4 P C B M a te r ia l F o r 5 0 o h m im p e d a n c e W Trace Separation from 50 Ohm Microstrip Length of Trace Run Parallel to Microstrip 100 mil 125 mil 150 mil 200 mil 200 mil 290 mil 250 mil 450 mil 300 mil 650 mil = 1 .7 5 * H Figure 3 Figure 4 5 Figure 5 Reflow Profile An example solder reflow profile for mounting the radio module on its host circuit board is shown in Figure 5. Note: Specifications subject to change without notice. file: zmn2400_h.vp, 2007.02.16 rev Cirronet, 3079 Premiere Parkway, Suite 140, Duluth Georgia USA 30097, www.cirronet.com, Phone +1.678.684.2000, FAX+1.678.684.2001 6