©2001 Fairch ild Semicond uctor C orpo ration HGTP12N60C3, HGT1S12N60C3S Rev. B
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic d ischarge of
energy through the devices. When handling these devices,
care should be ex ercis ed to a ssure that the static charge built
in the handler’s body capacitance is not discharged thro ugh
the device. With proper handl ing and application procedures,
how ever, IGBTs are curre ntly being extensiv ely used in
production by numerous equipment manufacturers in military,
industrial and consumer applica tions, with virtually no damage
problems due to electrostatic discharge. IGBT s can be
handled safely if the foll owing basic precautions are t aken:
1. Prior to assem b ly int o a circui t, all l eads s hould be k ept
shorted together either by the use of metal shorting
springs or by the insertion into co ndu ctive ma terial suc h
as “ECCOSORBD LD26” or equivalent.
2. When de vice s are remov ed by hand from thei r carriers,
the hand being u sed shoul d be grou nded b y any suitab le
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. De vices sho uld n e v er b e ins erted into or remo v e d from
circuits with power on.
5. Gate Voltage Rating - Ne v er e xceed the g ate-v oltage
rat ing of VGEM. Exceedi ng the ra ted VGE can result in
permanent damage to th e oxide layer in th e gate region.
6. Gate Terminatio n - The gates of these de vi ces are
essentially capacitors. Circuits that leave the gate open-
circuit ed or fl oating shoul d be a v oide d. Thes e condi tions
can resu lt in turn-on of the device d u e to v olt age buil dup
on the input capacitor due to leakage currents or pickup.
7. Gate Protection - The se de vices do no t hav e an internal
monolithic ze ner diode from gate to emitter. If gate
prote ction is required an e xternal zener is recom mended.
Operating Frequency Information
Op erating frequen cy information for a typical device
Figur e 13) is presented as a guide for estimating device
perfor mance for a specific application. Other typical
frequency vs collector current (ICE) plots are possible using
the information shown for a typical unit in Figures 4, 7, 8, 11
and 12. The operating freq uency plot (Figure 1 3) of a typi ca l
device shows fMAX1 or fMAX2 whichever is smaller at each
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
fMAX1 is defin ed by fMAX1 = 0.05/(tD(OFF)I+ tD(ON)I).
Deadti me (the de nominato r) has bee n arbit rarily held to 10%
of the on- state tim e for a 50% duty factor. Other defini tions
are possible. tD(OFF)I and tD(ON)I are defined in Figure 19.
Device turn-off delay can establish an addition al fr eque n cy
limitin g con diti on for an applic at ion other than TJM. tD(OFF)I
is important when controlling output ripple under a lightly
loaded condition.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The
allow able dissipation (PD) is defined by PD = (TJM - TC)/RθJC.
The sum of device s witching and conduction losses must not
exceed PD. A 50% duty factor was used (Figure 13) and the
conduction losses (PC) are appr o ximate d by
PC=(V
CE xI
CE)/2.
EON and EOFF are defined in the switching waveforms
shown in Figure 19. EON is the integral of the instantaneous
power loss (ICE x VCE) during tu rn-on and EOFF is the
integral of the instantaneous power loss (ICE x VCE) during
turn-off. All tail losses are included in the calculation for
EOFF; i.e. the collector current equals ze ro (ICE = 0).
Test Circuit and Waveform
FIGURE 18. INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 19. SWITCHING TEST WAVEFORMS
RG = 25Ω
L = 100µH
VDD = 480V
+
-
RHRP1560
tfI
td(OFF)I trI
td(ON)I
10%
90%
10%
90%
VCE
ICE
VGE
EOFF EON
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