IRFR/U9120N
PRELIMINARY HEXFET® Power MOSFET
VDSS = -100V
RDS(on) = 0.48Ω
ID = -6.6A
3/16/98
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 3.1
RθJA Junction-to-Ambient (PCB mount)** ––– 50 °C/W
RθJA Junction-to-Ambient ––– 110
Thermal Resistance
D-Pa k
TO-252AA I-Pak
TO-251AA
lUltra Low On-Resistance
lP-Channel
lSurface Mount (IRFR9120N)
lStraight Lead (IRFU9120N)
lAdvanced Process Technology
lFast Switching
lFully Avalanche Rated
Description
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ -10V -6.6
ID @ TC = 100°C Continuous Drain Current, VGS @ -10V -4.2 A
IDM Pulsed Drain Current -26
PD @TC = 25°C Power Dissipation 40 W
Linear Derating Factor 0.32 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy100 mJ
IAR Avalanche Current-6.6 A
EAR Repetitive Avalanche Energy4.0 mJ
dv/dt Peak Diode Recovery dv/dt -5.0 V/ns
TJOperating Junction and -55 to + 150
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
Absolute Maximum Ratings
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The D-Pak is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU series) is for through-hole mounting
applications. Power dissipation levels up to 1.5 watts are
possible in typical surface mount applications.
S
D
G
PD - 9.1507A
IRFR/U9120N
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode)
––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– -1.6 V TJ = 25°C, IS = -3.9A, VGS = 0V
trr Reverse Recovery Time ––– 100 150 n s TJ = 25°C, IF = -4.0A
Qrr Reverse Recovery Charge ––– 420 630 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
-6.6
-26 A
Notes:
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
This is applied for I-PAK, LS of D-PAK is measured between
lead and center of die contact
Starting TJ = 25°C, L = 13mH
RG = 25Ω, IAS = -3.9A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ -4.0A, di/dt ≤ 300A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
S
D
G
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage -100 ––– ––– V VGS = 0V, ID = -250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– -0.11 ––– V/°C Reference to 25°C, ID = -1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.48 ΩVGS = -10V, ID = -3.9A
VGS(th) Gate Threshold Voltage -2.0 ––– -4.0 V VDS = VGS, ID = -250µA
gfs Forward Transconductance 1.4 ––– ––– S VDS = -50V, ID = -4.0A
––– ––– -25 µA VDS = -100V, VGS = 0V
––– ––– -250 VDS = -80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 nA VGS = -20V
QgTotal Gate Charge ––– ––– 27 ID = -4.0A
Qgs Gate-to-Source Charge ––– ––– 5.0 nC VDS = -80V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 15 VGS = -10V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 14 ––– VDD = -50V
trRise Time ––– 47 ––– ID = -4.0A
td(off) Turn-Off Delay Time ––– 28 ––– RG = 12 Ω
tfFall Time ––– 31 ––– RD =12 Ω, See Fig. 10
Between lead,
––– ––– 6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance ––– 350 ––– VGS = 0V
Coss Output Capacitance ––– 110 ––– pF VDS = -25V
Crss Reverse Transfer Capacitance ––– 70 ––– ƒ = 1.0MHz, See Fig. 5
nH
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
LDInternal Drain Inductance
LSInternal Source Inductance ––– –––
IGSS
ns
4.5
7.5
IDSS Drain-to-Source Leakage Current
S
D
G
Uses IRF9520N data and test conditions.
IRFR/U9120N
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1
1
10
100
0.1 1 10 100
20µs PULSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
-4.5V
-V , Drain-to-Source Voltage (V)
-I , Drain-to-Source Current (A)
DS
D
-4.5V
0.1
1
10
100
0.1 1 10 100
20µs PULSE WIDTH
T = 150 C
J°
TOP
BOTTOM
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
-4.5V
-V , Drain-to-Source Voltage (V)
-I , Drain-to-Source Current (A)
DS
D
-4.5V
0.1
1
10
100
45678910
V = -50V
20µs PULSE WIDTH
DS
-V , Gate-to-Source Voltage (V)
-I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 150 C
J°
-60 -40 -20 0 20 40 60 80 100 120 140 160
0.0
0.5
1.0
1.5
2.0
2.5
T , Junction Temperature( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
-10V
-6.7A
IRFR/U9120N
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
1 10 100
0
200
400
600
800
-V , Drain-to-Source Voltage (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1MHz
+ C
+ C
C SHORTED
GS
iss gs gd , ds
rss gd
oss ds gd
Ciss
Coss
Crss
0 5 10 15 20 25
0
4
8
12
16
20
Q , Total Gate Charge (nC)
-V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
-4.0 A
V =-20V
DS
V =-50V
DS
V =-80V
DS
0.1
1
10
100
0.2 0.8 1.4 2.0 2.6
-V ,Source-to-Drain Voltage (V)
-I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J°
T = 150 C
J°
0.1
1
10
100
1 10 100 1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Single Pulse
T
T = 150 C
= 25 C
°°
J
C
-V , Drain-to-Source Voltage (V)
-I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
IRFR/U9120N
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
VDS
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
VDD
RGD.U.T.
+
-
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
25 50 75 100 125 150
0.0
2.0
4.0
6.0
8.0
T , Case Temperature ( C)
-I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRFR/U9120N
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Q
G
Q
GS
Q
GD
V
G
Charge
-10V
D.U.T. V
DS
I
D
I
G
-3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tpV
(
BR
)
DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
V
DS
V
DD
DRIVER A
15V
-20V
-
+VDD
25 50 75 100 125 150
0
50
100
150
200
250
Starting T , Junction Temperature( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
-1.7A
-2.5A
-3.9A
IRFR/U9120N
Peak Diode Recovery dv/dt Test Circuit
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T*Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
* Reverse Polarity of D.U.T for P-Channel
VGS
[ ]
[ ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
[ ] ***
Fig 14. For P-Channel HEXFETS
IRFR/U9120N
Package Outline
TO-252AA Outline
Dimensions are shown in millimeters (inches)
TO-252AA (D-Pak)
Part Marking Information
6.73 (.265)
6.35 (.250)
- A -
4
1 2 3
6.22 (.245)
5.97 (.235)
- B -
3X 0.89 (.035)
0.64 (.025)
0.25 (.010) M A M B
4.57 (.180)
2.28 (.090)
2X 1.14 (.045)
0.76 (.030)
1.52 (.060)
1.15 (.045)
1.02 (.040)
1.64 (.025)
5.46 (.215)
5.21 (.205) 1.27 (.050)
0.88 (.035)
2.38 (.094)
2.19 (.086) 1.14 (.045)
0.89 (.035)
0.58 (.023)
0.46 (.018)
6.45 (.245)
5.68 (.224)
0.51 (.020)
M IN.
0.58 (.023)
0.46 (.018)
LEAD ASSIGNMENTS
1 - GAT E
2 - DRAIN
3 - S OURCE
4 - DRAIN
10.42 (.410)
9.40 (.370)
NOTES:
1 D IM E N SION IN G & TOLE R A NC IN G P ER AN S I Y14.5M , 1982.
2 CONTROLLING DIMENSION : INCH.
3 C ONF ORMS T O J EDEC OUT L INE TO- 2 5 2 AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SO LD ER D IP M AX. +0.16 (.006).
INTERNATIONAL
R ECTIF IER
L OGO
ASSEMBLY
LOT CO DE
E X AMP LE : T H IS IS AN IR F R1 2 0
WITH ASSEMBLY
L O T CODE 9 U1 P FIRST PO RTIO N
OF PART NUMBER
SECOND PORTION
OF PART NUM BER
120
IRFR
9 U 1 P
A
IRFR/U9120N
Package Outline
TO-251AA Outline
Dimensions are shown in millimeters (inches)
TO-251AA (I-Pak)
Part Marking Information
INTERNATIONAL
RE CT IFIE R
L OGO
ASSEMBLY
LO T C OD E
F IRS T P ORT ION
OF PART NUMBE
R
SECOND PO RTION
OF PART NUMBER
120
9U 1P
E X AMPL E : T H IS IS AN I R F U1 2 0
WITH ASSEM BLY
L OT CO DE 9 U 1 P
IRFU
6.73 (.265)
6.35 (.250)
- A -
6.22 (.245)
5.97 (.235)
- B -
3X 0.89 (.035)
0.64 (.025)
0.25 (.010) M A M B
2.28 (.090)
1.14 (.045)
0.76 (.030)
5.46 (.215)
5.21 (.205) 1.27 (.050)
0.88 (.035)
2.38 (.094)
2.19 (.086)
1.14 (.045)
0.89 (.035)
0.58 (.023)
0.46 (.018) LEAD ASSIGN MENTS
1 - GATE
2 - DR AIN
3 - SOUR CE
4 - DR AIN
NOTES:
1 D IM E NS ION IN G & TOLE R AN C IN G P ER AN S I Y 14.5M , 1982.
2 CONTROLLING DIMENSION : INCH.
3 C ON FORM S TO J EDEC OUTL INE T O-25 2AA .
4 DIMENS IONS SHOWN ARE BEFORE SOLDER DIP,
SOL DER DIP MAX . +0 .1 6 (.0 06 ).
9.65 (.380)
8.89 (.350)
2X
3X
2.28 (.090)
1.91 (.075)
1.52 (.060)
1.15 (.045)
4
1 2 3
6.45 (.245)
5.68 (.224)
0.58 (.023)
0.46 (.018)
IRFR/U9120N
Tape & Reel Information
TO-252AA
TR
1 6 . 3 ( .6 4 1 )
1 5 . 7 ( .6 1 9 )
8.1 ( .3 18 )
7.9 ( .3 12 )
1 2 .1 ( .4 7 6 )
1 1 .9 ( .4 6 9 ) FEED DIR ECTIO N FEED DIR ECTIO N
1 6 .3 ( .6 4 1 )
1 5 .7 ( .6 1 9 )
TRR TRL
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHO W N IN MILLIMETERS ( INCHES ).
3. O U TLIN E CO NFO RM S TO EIA-481 & EIA-541.
NO TES :
1. O UTLINE CON FO RM S TO EIA-481.
16 mm
13 IN CH
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
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IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 3/98
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
