74HCT238PW,112 - NXP Semiconductors / Philips Semiconductors

1. General description

74HC238 and 74HCT238 are high-speed Si-gate CMOS devices and are pin compatible

with Low-Power Schottky TTL (LSTTL).

The 74HC238/74HCT238 decoders accept three binary weighted address inputs (A0, A1,

A2) and when enabled, provide 8 mutually exclusive active HIGH outputs (Y0 to Y7). The

74HC238/74HCT238 features three enable inputs: two active LOW (E1 and E2) and one

active HIGH (E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH.

This multiple enable function allows easy parallel expansion of the “238” to a 1-to-32 (5

lines to 32 lines) decoder with just four “238” ICs and one inverter. The “238” can be used

as an eight output demultiplexer by using one of the active LOW enable inputs as the data

input and the remaining enable inputs as strobes. Unused enable inputs must be

permanently tied to their appropriate active HIGH or LOW state.

The 74HC238/74HCT238 is similar to the 74HC138/74HCT138 but has non-inverting

outputs.

2. Features

nDemultiplexing capability

nMultiple input enable for easy expansion

nIdeal for memory chip select decoding

nActive HIGH mutually exclusive outputs

nMultiple package options

nComplies with JEDEC standard no. 7A

nESD protection:

uHBM JESD22-A114E exceeds 2000 V

uMM JESD22-A115-A exceeds 200 V

nSpeciﬁed from −40 °Cto+85°C and from −40 °C to +125 °C

74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

Rev. 03 — 16 July 2007 Product data sheet

Product data sheet Rev. 03 — 16 July 2007 2 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

3. Ordering information

4. Functional diagram

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74HC238N −40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4

74HC238D −40 °C to +125 °C SO16 plastic small outline package; 16 leads;

body width 3.9 mm SOT109-1

74HC238DB −40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads;

body width 5.3 mm SOT338-1

74HC238PW −40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;

body width 4.4 mm SOT403-1

74HC238BQ −40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin

quad ﬂat package; no leads; 16 terminals;

body 2.5 ×3.5 ×0.85 mm

SOT763-1

74HCT238N −40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4

74HCT238D −40 °C to +125 °C SO16 plastic small outline package; 16 leads;

body width 3.9 mm SOT109-1

74HCT238DB −40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads;

body width 5.3 mm SOT338-1

74HCT238PW −40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;

body width 4.4 mm SOT403-1

74HCT238BQ −40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin

quad ﬂat package; no leads; 16 terminals;

body 2.5 ×3.5 ×0.85 mm

SOT763-1

Fig 1. Logic symbol Fig 2. Functional diagram

001aag752

3 TO 8

DECODER ENABLE

EXITING

A0 1

A1 2

A2 3

E1 4

E2 5

E3 6

Y015

Y114

Y213

Y312

Y411

Y510

Y69

Y77

001aag753

3 TO 8

DECODER ENABLE

EXITING

A0 1

A1 2

A2 3

E1 4

E2 5

E3 6

Product data sheet Rev. 03 — 16 July 2007 3 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

5. Pinning information

5.1 Pinning

Fig 3. Logic diagram

001aag754

(1) The die substrate is attached to this pad using

conductive die attach material. It can not be used as

supply pin or input

Fig 4. Pin conﬁguration DIP16, SO16, (T)SSOP16 Fig 5. Pin conﬁguration DHVQFN16

74HC238

74HCT238

A0 VCC

A1 Y0

A2 Y1

E1 Y2

E2 Y3

E3 Y4

Y7 Y5

GND Y6

001aag755

001aag756

74HC238

74HCT238

Y7 Y5

E3 Y4

E2 Y3

E1 Y2

A2 Y1

A1 Y0

GND

GND(1)

VCC

Transparent top view

7 10

6 11

5 12

4 13

3 14

2 15

terminal 1

index area

Product data sheet Rev. 03 — 16 July 2007 4 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

5.2 Pin description

6. Functional description

[1] H = HIGH voltage level;

L = LOW voltage level;

X = don’t care.

Table 2. Pin description

Symbol Pin Description

A[0:2] 1, 2, 3 address input

E1 4 enable input (active LOW)

E2 5 enable input (active LOW)

E3 6 enable input (active HIGH)

Y[0:7] 15, 14, 13, 12, 11, 10, 9, 7 output (active HIGH)

GND 8 ground (0 V)

VCC 16 supply voltage

Table 3. Function table[1]

Inputs Outputs

E1 E2 E3 A0 A1 A2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7

HXXXXXLLLLLLLL

XHXXXXLLLLLLLL

XXLXXXLLLLLLLL

LLHLLLHLLLLLLL

LLHHLLLHLLLLLL

LLHLHLLLHLLLLL

LLHHHLLLLHLLLL

LLHLLHLLLLHLLL

LLHHLHLLLLLHLL

LLHLHHLLLLLLHL

LLHHHHLLLLLLLH

Product data sheet Rev. 03 — 16 July 2007 5 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

7. Limiting values

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2] For DIP16 packages: above 70 °C the value of Ptot derates linearly at 12 mW/K.

[3] For SO16 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K.

For SSOP16 and TSSOP16 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.

For DHVQFN16 packages: above 60 °C the value of Ptot derates linearly at 4.5 mW/K.

8. Recommended operating conditions

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage −0.5 +7 V

IIK input clamping current VI < −0.5 V or VI>V

CC + 0.5 V [1] -±20 mA

IOK output clamping current VO<−0.5 V or VO>V

CC + 0.5 V [1] -±20 mA

IOoutput current −0.5 V < VO < VCC + 0.5 V - ±25 mA

ICC supply current - 50 mA

IGND ground current −50 - mA

Tstg storage temperature −65 +150 °C

Ptot total power dissipation DIP16 package [2] - 750 mW

SO16, SSOP16, TSSOP16 and

DHVQFN16 packages [3] - 500 mW

Table 5. Recommended operating conditions

Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 74HC238 74HCT238 Unit

Min Typ Max Min Typ Max

VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V

VIinput voltage 0 - VCC 0-V

CC V

VOoutput voltage 0 - VCC 0-V

CC V

Tamb ambient temperature −40 - +125 −40 - +125 °C

∆t/∆V input transition rise

and fall rate VCC = 2.0 V - - 625 - - - ns/V

VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V

VCC = 6.0 V - - 83 - - - ns/V

Product data sheet Rev. 03 — 16 July 2007 6 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

9. Static characteristics

Table 6. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 25 °C−40 °C to +85 °C−40 °C to +125 °C Unit

Min Typ Max Min Max Min Max

74HC238

VIH HIGH-level

input voltage VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V

VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V

VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V

VIL LOW-level

input voltage VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V

VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V

VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V

VOH HIGH-level

output voltage VI=V

IH or VIL

IO=−20 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V

IO=−20 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V

IO=−20 µA; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V

IO=−4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V

IO=−5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V

VOL LOW-level

output voltage VI=V

IH or VIL

IO=20µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V

IO=20µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V

IO=20µA; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V

IO= 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V

IO= 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V

IIinput leakage

current VI=V

CC or GND;

VCC = 6.0 V --±0.1 - ±1.0 - ±1.0 µA

ICC supply current VI=V

CC or GND; IO=0A;

VCC = 6.0 V - - 8.0 - 80 - 160 µA

CIinput

capacitance - 3.5 - - - - - pF

74HCT238

VIH HIGH-level

input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V

VIL LOW-level

input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V

VOH HIGH-level

output voltage VI=V

IH or VIL; VCC = 4.5 V

IO=−20 µA 4.4 4.5 - 4.4 - 4.4 - V

IO=−4.0 mA 3.98 4.32 - 3.84 - 3.7 - V

VOL LOW-level

output voltage VI=V

IH or VIL; VCC = 4.5 V

IO=20µA - 0 0.1 - 0.1 - 0.1 V

IO= 4.0 mA - 0.16 0.26 - 0.33 - 0.4 V

IIinput leakage

current VI=V

CC or GND;

VCC = 5.5 V --±0.1 - ±1.0 - ±1.0 µA

Product data sheet Rev. 03 — 16 July 2007 7 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

10. Dynamic characteristics

ICC supply current VI=V

CC or GND;

VCC = 5.5 V; IO=0A - - 8.0 - 80 - 160 µA

∆ICC additional

supply current per input pin;

VI=V

CC −2.1 V;

other inputs at VCC or GND;

VCC = 4.5 V to 5.5 V;

IO=0A

An inputs - 70 252 - 315 - 343 µA

E1, E2 inputs - 40 144 - 180 - 196 µA

E3 input - 145 522 - 653 - 711 µA

CIinput

capacitance - 3.5 - - - - - pF

Table 6. Static characteristics

…continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 25 °C−40 °C to +85 °C−40 °C to +125 °C Unit

Min Typ Max Min Max Min Max

Table 7. Dynamic characteristics

GND = 0 V; test circuit see Figure 8.

Symbol Parameter Conditions 25 °C−40 °C to +125 °C

Min Typ Max Max

(85 °C) Max

(125 °C) Unit

74HC238

tpd propagation delay An to Yn; see Figure 6 [1]

VCC = 2.0 V - 47 150 190 225 ns

VCC = 4.5 V - 17 30 38 45 ns

VCC = 5.0 V; CL=15pF - 14 - - - ns

VCC = 6.0 V - 14 26 33 38 ns

E3 to Yn; see Figure 6 [1]

VCC = 2.0 V - 52 160 200 240 ns

VCC = 4.5 V - 19 32 40 48 ns

VCC = 5.0 V; CL=15pF - 16 - - - ns

VCC = 6.0 V - 15 27 34 41 ns

En to Yn or see Figure 7 [1]

VCC = 2.0 V - 50 155 195 235 ns

VCC = 4.5 V - 18 31 39 47 ns

VCC = 5.0 V; CL=15pF - 17 - - - ns

VCC = 6.0 V - 14 26 33 40 ns

tttransition time see Figure 6 and Figure 7 [2]

VCC = 2.0 V - 19 75 95 110 ns

VCC = 4.5 V - 7 15 19 22 ns

VCC = 6.0 V - 6 13 16 19 ns

CPD power dissipation

capacitance per package; VI= GND to VCC [3] -72- - -pF

Product data sheet Rev. 03 — 16 July 2007 8 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

[1] tpd is the same as tPHL and tPLH.

[2] tt is the same as tTHL and tTLH.

[3] CPD is used to determine the dynamic power dissipation (PD in µW):

PD=C

PD ×VCC2×fi×N+∑ (CL×VCC2×fo) where:

fi= input frequency in MHz;

fo= output frequency in MHz;

CL= output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

∑(CL×VCC2×fo) = sum of outputs.

11. Waveforms

74HCT238

tpd propagation delay An to Yn; see Figure 6 [1]

VCC = 4.5 V - 19 35 44 53 ns

VCC = 5.0 V; CL=15pF - 18 - - - ns

E3 to Yn; see Figure 6 [1]

VCC = 4.5 V - 20 37 46 56 ns

VCC = 5.0 V; CL=15pF - 20 - - - ns

En to Yn or see Figure 7 [1]

VCC = 4.5 V - 20 35 44 53 ns

VCC = 5.0 V; CL=15pF - 21 - - - ns

tttransition time VCC = 4.5 V;

see Figure 6 and Figure 7 [2] - 7 15 19 22 ns

CPD power dissipation

capacitance per package;

VI= GND to VCC −1.5 V [3] -76- - -pF

Table 7. Dynamic characteristics

GND = 0 V; test circuit see Figure 8.

Symbol Parameter Conditions 25 °C−40 °C to +125 °C

Min Typ Max Max

(85 °C) Max

(125 °C) Unit

Measurement points are given in Table 8.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 6. Input (An, E3) to output (Yn) propagation delays and output transition times

001aag757

An, E3 input

Yn output

tTHL tTLH

tPHL tPLH

Product data sheet Rev. 03 — 16 July 2007 9 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

Measurement points are given in Table 8.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 7. Input (E1, E2) to output (Yn) propagation delays and output transition times

001aag758

E1, E2 input

Yn output

tTHL tTLH

tPHL tPLH

Table 8. Measurement points

Type Input Output

VMVMVXVY

74HC238 0.5VCC 0.5VCC 0.1VCC 0.9VCC

74HCT238 1.3 V 1.3 V 0.1VCC 0.9VCC

Product data sheet Rev. 03 — 16 July 2007 10 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

Test data is given in Table 9.

Deﬁnitions for test circuit:

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

CL = Load capacitance including jig and probe capacitance.

RL = Load resistance.

S1 = Test selection switch

Fig 8. Load circuit for measuring switching times

VMVM

10 %

90 %

0 V

negative

pulse

positive

pulse

0 V

VMVM

90 %

10 %

001aad983

DUT

VCC VCC

VIVO

RLS1

open

PULSE

GENERATOR

Table 9. Test data

Type Input Load S1 position

VItr, tfCLRLtPHL, tPLH

74HC238 VCC 6 ns 15 pF, 50 pF 1 kΩopen

74HCT238 3 V 6 ns 15 pF, 50 pF 1 kΩopen

Product data sheet Rev. 03 — 16 July 2007 11 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

12. Package outline

Fig 9. Package outline SOT38-4 (DIP16)

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT38-4 95-01-14

03-02-13

(e )

seating plane

pin 1 index

0 5 10 mm

scale

Note

1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

UNIT A

max. 12 b1(1) (1) (1)

b2cD E e M Z

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

min. A

max. bmax.

1.73

1.30 0.53

0.38 0.36

0.23 19.50

18.55 6.48

6.20 3.60

3.05 0.2542.54 7.62 8.25

7.80 10.0

8.3 0.764.2 0.51 3.2

inches 0.068

0.051 0.021

0.015 0.014

0.009

1.25

0.85

0.049

0.033 0.77

0.73 0.26

0.24 0.14

0.12 0.010.1 0.3 0.32

0.31 0.39

0.33 0.030.17 0.02 0.13

DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4

Product data sheet Rev. 03 — 16 July 2007 12 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

Fig 10. Package outline SOT109-1 (SO16)

detail X

vMA

(A )

pin 1 index

UNIT A

max. A1A2A3bpcD

(1) E(1) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10 1.45

1.25 0.25 0.49

0.36 0.25

0.19 10.0

9.8 4.0

3.8 1.27 6.2

5.8 0.7

0.6 0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT109-1 99-12-27

03-02-19

076E07 MS-012

0.069 0.010

0.004 0.057

0.049 0.01 0.019

0.014 0.0100

0.0075 0.39

0.38 0.16

0.15 0.05

1.05

0.041

0.244

0.228 0.028

0.020 0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

0 2.5 5 mm

scale

SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

Product data sheet Rev. 03 — 16 July 2007 13 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

Fig 11. Package outline SOT338-1 (SSOP16)

UNIT A1A2A3bpcD

(1) E(1) eH

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.21

0.05 1.80

1.65 0.25 0.38

0.25 0.20

0.09 6.4

6.0 5.4

5.2 0.65 1.25

7.9

7.6 1.03

0.63 0.9

0.7 1.00

0.55 8

0.130.2 0.1

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

SOT338-1 99-12-27

03-02-19

(1)

vMA

16 9

detail X

(A )

MO-150

pin 1 index

0 2.5 5 mm

scale

SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1

max.

Product data sheet Rev. 03 — 16 July 2007 14 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

Fig 12. Package outline SOT403-1 (TSSOP16)

UNIT A1A2A3bpcD

(1) E(2) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.15

0.05 0.95

0.80 0.30

0.19 0.2

0.1 5.1

4.9 4.5

4.3 0.65 6.6

6.2 0.4

0.3 0.40

0.06 8

0.13 0.10.21

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

0.75

0.50

SOT403-1 MO-153 99-12-27

03-02-18

0.25

16 9

detail X

(A )

vMA

0 2.5 5 mm

scale

TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1

max.

1.1

pin 1 index

Product data sheet Rev. 03 — 16 July 2007 15 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

Fig 13. Package outline SOT763-1 (DHVQFN16)

terminal 1

index area

0.51

A1Eh

UNIT ye

0.2

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 3.6

3.4

2.15

1.85

2.6

2.4 1.15

0.85

2.5

0.30

0.18

0.05

0.00 0.05 0.1

DIMENSIONS (mm are the original dimensions)

SOT763-1 MO-241 - - -- - -

0.5

0.3

0.1

0.05

0 2.5 5 mm

scale

SOT763-1

DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;

16 terminals; body 2.5 x 3.5 x 0.85 mm

A(1)

max.

AA1c

detail X

y1C

15 10

terminal 1

index area

E(1)

Note

1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

D(1)

02-10-17

03-01-27

Product data sheet Rev. 03 — 16 July 2007 16 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

13. Abbreviations

14. Revision history

Table 10. Abbreviations

Acronym Description

CMOS Complementary Metal Oxide Semiconductor

DUT Device Under Test

ESD ElectroStatic Discharge

HBM Human Body Model

MM Machine Model

TTL Transistor-Transistor Logic

Table 11. Revision history

Document ID Release date Data sheet status Change notice Supersedes

74HC_HCT238_3 20070716 Product data sheet - 74HC_HCT238_CNV_2

Modiﬁcations: •The format of this data sheet has been redesigned to comply with the new identity

guidelines of NXP Semiconductors.

•Legal texts have been adapted to the new company name where appropriate.

•Added type number 74HC238BQ and 74HCT238BQ (DHVQFN16 package)

74HC_HCT238_CNV_2 19970828 Product speciﬁcation - -

Product data sheet Rev. 03 — 16 July 2007 17 of 18

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

15. Legal information

15.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Deﬁnitions”.

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

15.2 Deﬁnitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modiﬁcations or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the

full data sheet shall prevail.

15.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconductors does not give any representations or

warranties, expressed or implied, as to the accuracy or completeness of such

information and shall have no liability for the consequences of use of such

information.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation speciﬁcations and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

malfunction of a NXP Semiconductors product can reasonably be expected to

result in personal injury, death or severe property or environmental damage.

NXP Semiconductors accepts no liability for inclusion and/or use of NXP

Semiconductors products in such equipment or applications and therefore

such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

speciﬁed use without further testing or modiﬁcation.

Limiting values — Stress above one or more limiting values (as deﬁned in

the Absolute Maximum Ratings System of IEC 60134) may cause permanent

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other conditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may affect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold

subject to the general terms and conditions of commercial sale, as published

at http://www.nxp.com/proﬁle/terms, including those pertaining to warranty,

intellectual property rights infringement and limitation of liability, unless

explicitly otherwise agreed to in writing by NXP Semiconductors. In case of

any inconsistency or conﬂict between information in this document and such

terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights, patents

or other industrial or intellectual property rights.

15.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

16. Contact information

For additional information, please visit: http://www.nxp.com

For sales ofﬁce addresses, send an email to: salesaddresses@nxp.com

Document status[1][2] Product status[3] Deﬁnition

Objective [short] data sheet Development This document contains data from the objective speciﬁcation for product development.

Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation.

Product [short] data sheet Production This document contains the product speciﬁcation.

NXP Semiconductors 74HC238; 74HCT238

3-to-8 line decoder/demultiplexer

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 16 July 2007

Document identifier: 74HC_HCT238_3

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

17. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

6 Functional description . . . . . . . . . . . . . . . . . . . 4

7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5

8 Recommended operating conditions. . . . . . . . 5

9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6

10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7

11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11

13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 16

14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16

15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17

15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17

15.2 Deﬁnitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 17

15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17

16 Contact information. . . . . . . . . . . . . . . . . . . . . 17

17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18