1. Product profile
1.1 General description
180 W LDMOS power transistor for base station applications at frequencies from
1800 MHz to 2000 MHz.
[1] Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability on CCDF per carrier;
carrier spacing 5 MHz.
1.2 Features
nTypical 2-carrier W-CDMA performance at frequencies of 1805 MHz and 1880 MHz, a
supply voltage of 32 V and an IDq of 1600 mA:
uAverage output power = 50 W
uPower gain = 18 dB (typ)
uEfficiency = 29.5 %
uACPR = −35 dBc
nEasy power control
nIntegrated ESD protection
nExcellent ruggedness
nHigh efficiency
nExcellent thermal stability
nDesigned for broadband operation (1800 MHz to 2000 MHz)
nInternally matched for ease of use
nQualified up to a supply voltage of 32 V
nCompliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
BLF6G20-180PN
Power LDMOS transistor
Rev. 03 — 30 March 2009 Product data sheet
Table 1. Typical performance
RF performance at T
case
= 25
°
C in a common source class-AB production test circuit.
Mode of operation f VDS PL(AV) GpηDACPR
(MHz) (V) (W) (dB) (%) (dBc)
2-carrier W-CDMA 1805 to 1880 32 50 18 29.5 −35[1]
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
BLF6G20-180PN_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 30 March 2009 2 of 11
NXP Semiconductors BLF6G20-180PN
Power LDMOS transistor
1.3 Applications
nRF power amplifiers for W-CDMA base stations and multicarrier applications in the
1800 MHz to 2000 MHz frequency range
2. Pinning information
[1] Connected to flange.
3. Ordering information
4. Limiting values
Table 2. Pinning
Pin Description Simplified outline Graphic symbol
1 drain1
2 drain2
3 gate1
4 gate2
5 source [1]
5
12
43 4
35
1
2
sym117
Table 3. Ordering information
Type number Package
Name Description Version
BLF6G20-180PN - flanged balanced LDMOST ceramic package;
2 mounting holes; 4 leads SOT539A
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage - 65 V
VGS gate-source voltage −0.5 +13 V
Tstg storage temperature −65 +150 °C
Tcase case temperature - 150 °C
Tjjunction temperature - 225 °C
BLF6G20-180PN_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 30 March 2009 3 of 11
NXP Semiconductors BLF6G20-180PN
Power LDMOS transistor
5. Thermal characteristics
6. Characteristics
7. Application information
Table 5. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-case) thermal resistance from junction to case Tcase =80°C; PL(AV) = 50 W 0.45 K/W
Table 6. Characteristics
T
j
= 25
°
C per section; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V(BR)DSS drain-source breakdown
voltage VGS =0V; I
D= 0.5 mA 65 - - V
VGS(th) gate-source threshold voltage VDS =10V;I
D= 144 mA 1.575 1.9 2.3 V
VGSq gate-source quiescent voltage VDS =32V;I
D= 800 mA 1.725 2.1 2.45 V
IDSS drain leakage current VGS =0V
VDS =28V - - 3 µA
VDS =60V - - 5 µA
IDSX drain cut-off current VGS =V
GS(th) + 3.75 V;
VDS =10V -25-A
IGSS gate leakage current VGS = 11 V; VDS = 0 V - - 300 nA
gfs forward transconductance VDS =10V; I
D= 7.2 A - 10 - S
RDS(on) drain-source on-state
resistance VGS =V
GS(th) + 3.75 V;
ID=5A - 0.1 0.165 Ω
Table 7. Application information
Mode of operation: 2-carrier W-CDMA; PAR 7.5 dB at 0.01 % probability on CCDF; 3GPP test
model 1; 1 to 64 PDPCH; f
1
= 1802.5 MHz; f
2
= 1807.5 MHz; f
3
= 1872.5 MHz; f
4
= 1877.5 MHz;
RF performance at V
DS
= 32 V; I
Dq
= 1600 mA; T
case
= 25
°
C; unless otherwise specified; in a
class-AB production test circuit.
Symbol Parameter Conditions Min Typ Max Unit
Gppower gain PL(AV) = 50 W 16.8 18 19.2 dB
RLin input return loss PL(AV) = 50 W - −10 −6.5 dB
ηDdrain efficiency PL(AV) = 50 W 26 29.5 - %
ACPR adjacent channel power ratio PL(AV) = 50 W - −35 −33 dBc
Table 8. Application information
Mode of operation: 1-carrier W-CDMA; PAR 7.5 dB at 0.01 % probability on CCDF; 3GPP test
model 1; 1 to 64 PDPCH; f
1
= 1872.5 MHz; f
2
= 1877.5 MHz; RF performance at V
DS
= 32 V;
I
Dq
= 1600 mA; T
case
= 25
°
C; unless otherwise specified; in a class-AB production test circuit.
Symbol Parameter Conditions Min Typ Max Unit
PAROoutput peak-to-average ratio PL(AV) = 115 W;
at 0.01 % probability on CCDF 4.1 4.3 - dB
BLF6G20-180PN_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 30 March 2009 4 of 11
NXP Semiconductors BLF6G20-180PN
Power LDMOS transistor
7.1 Ruggedness in class-AB operation
The BLF6G20-180PN is capable of withstanding a load mismatch corresponding to
VSWR = 10 : 1 through all phases under the following conditions: VDS =28V;
IDq = 1600 mA; PL = 180 W (CW); f = 1880 MHz.
VDS =32V; I
Dq = 1600 mA; f = 1880 MHz.
Fig 1. One-tone CW power gain and drain efficiency as function of average load power;
typical values
PL(AV) (W)
0 20016080 12040
001aai017
16
18
20
Gp
(dB) ηD
(%)
14
20
40
60
0
Gp
ηD
VDS =32V; I
Dq = 1600 mA; f1= 1880 MHz;
f2= 1880.1 MHz. VDS = 32 V; IDq = 1600 mA; f1= 1880 MHz;
f2= 1880.1 MHz.
Fig 2. Two-tone CW power gain and drain efficiency
as function of peak envelope load power;
typical values
Fig 3. Two-tone intermodulation distortion as a
function of peak envelope load power; typical
values
001aai018
PL(PEP) (W)
0 300200100
16
18
14
20
22
Gp
(dB)
12
20
30
10
40
50ηD
(%)
0
Gp
ηD
PL(PEP) (W)
0 300200100
001aai019
−50
−30
−10
IMD
(dBc)
−70
IMD3
IMD5
IMD7
BLF6G20-180PN_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 30 March 2009 5 of 11
NXP Semiconductors BLF6G20-180PN
Power LDMOS transistor
VDS =32V; I
Dq = 1600 mA; f1= 1872.5 MHz;
f2= 1877.5 MHz; carrier spacing 5 MHz. VDS = 32 V; IDq = 1600 mA; f1= 1872.5 MHz;
f2= 1877.5 MHz; carrier spacing 5 MHz.
Fig 4. 2-carrier W-CDMA power gain and drain
efficiency as function of load power; typical
values
Fig 5. 2-carrier W-CDMA adjacent channel power
ratio as a function of load power; typical
values
001aai020
PL (W)
0604020
18
16
20
22
Gp
(dB)
14
20
10
30
40
ηD
(%)
0
Gp
ηD
001aai021
PL (W)
0604020
−40
−50
−30
−20
ACPR
(dBc)
−60
VDS =32V; I
Dq = 1600 mA; f1= 1867.5 MHz;
f2= 1877.5 MHz; carrier spacing 10 MHz. VDS = 32 V; IDq = 1600 mA; f1= 1867.5 MHz;
f2= 1877.5 MHz; carrier spacing 10 MHz.
Fig 6. 2-carrier W-CDMA power gain and drain
efficiency as function of load power; typical
values
Fig 7. 2-carrier W-CDMA adjacent channel power
ratio and third order intermodulation distortion
as function of load power; typical values
001aai022
PL (W)
0604020
18
16
20
22
Gp
(dB)
14
20
10
30
40
ηD
(%)
0
Gp
ηD
001aai023
PL (W)
0604020
−40
−50
−30
−20
ACPR,
IMD3
(dBc)
−60
IMD3
ACPR
BLF6G20-180PN_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 30 March 2009 6 of 11
NXP Semiconductors BLF6G20-180PN
Power LDMOS transistor
8. Test information
See Table 9 for list of components.
Fig 8. Test circuit for operation at 1805 MHz and 1880 MHz
001aai024
output
50 Ω
input
50 Ω
C3 C9 C13 C5 C14
C4
C7
C12
C10C2 C8
C11
C6
R3
R2
R1
C1
BLF6G20-180PN_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 30 March 2009 7 of 11
NXP Semiconductors BLF6G20-180PN
Power LDMOS transistor
[1] American Technical Ceramics type 100B or capacitor of same quality.
[2] American Technical Ceramics type 180R or capacitor of same quality.
[3] American Technical Ceramics type 100A or capacitor of same quality.
Striplines are on a double copper-clad Rogers R04350 Printed-Circuit Board (PCB) with εr = 3.5 and thickness = 0.76 mm.
See Table 9 for list of components.
Fig 9. Component layout for 1805 MHz and 1880 MHz test circuit
001aai025
INPUT
OUTPUT
R1
TB
R1
R1
R3
R2
C2 C10 C12 C4
C7
C6
C5
C13
C11
C14
C1
C8
C3 C9
TB
Table 9. List of components
For test circuit, see Figure 8 and Figure 9.
Component Description Value Remarks
C1 ATC multilayer ceramic chip capacitor 6.2 pF [1]
C2, C3 ATC multilayer ceramic chip capacitor 16 pF [1]
C4, C5, C6 ATC multilayer ceramic chip capacitor 18 pF [2]
C7 ATC multilayer ceramic chip capacitor 1.1 pF [3]
C8, C9, C10, C11 TDK multilayer ceramic chip capacitor 4.7 µF
C12, C13 AVX multilayer ceramic chip capacitor 220 nF
C14 electrolytic capacitor 100 µF; 63 V [2]
R1 chip resistor 33 Ω
R2, R3 chip resistor 8.2 Ω
BLF6G20-180PN_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 30 March 2009 8 of 11
NXP Semiconductors BLF6G20-180PN
Power LDMOS transistor
9. Package outline
Fig 10. Package outline SOT539A
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
SOT539A 00-03-03
99-12-28
0 5 10 mm
scale
Flanged balanced LDMOST ceramic package; 2 mounting holes; 4 leads SOT539A
p
AF
b
e
D
U2
L
H
Q
c
5
12
43
D1
E
A
w1AB
M M M
q
U1
H1
C
B
M M
w2C
E1
M
w3
UNIT A
mm
Db
11.81
11.56 0.15
0.08 31.55
30.94 13.72 9.53
9.27 17.12
16.10 10.29
10.03
5.33
3.96
ce U2
0.250.25 0.51
w3
35.56
qw
2
w1
F
1.75
1.50
U1
41.28
41.02
H1
25.53
25.27
p
3.30
3.05
Q
2.31
2.01
EE
1
9.50
9.30
inches 0.465
0.455 0.006
0.003 1.242
1.218
D1
31.52
30.96
1.241
1.219 0.540 0.375
0.365 0.674
0.634 0.405
0.395
0.210
0.156 0.0100.010 0.0201.400
0.069
0.059 1.625
1.615
1.005
0.995 0.130
0.120 0.091
0.079
0.374
0.366
H
3.73
2.72
0.147
0.107
L
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
BLF6G20-180PN_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 30 March 2009 9 of 11
NXP Semiconductors BLF6G20-180PN
Power LDMOS transistor
10. Abbreviations
11. Revision history
Table 10. Abbreviations
Acronym Description
3GPP 3rd Generation Partnership Project
CCDF Complementary Cumulative Distribution Function
CW Continuous Wave
DPCH Dedicated Physical CHannel
IMD InterModulation Distortion
LDMOS Laterally Diffused Metal-Oxide Semiconductor
LDMOST Laterally Diffused Metal-Oxide Semiconductor Transistor
PAR Peak-to-Average power Ratio
PDPCH transmission Power of the Dedicated Physical CHannel
RF Radio Frequency
VSWR Voltage Standing-Wave Ratio
W-CDMA Wideband Code Division Multiple Access
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BLF6G20-180PN_3 20090330 Product data sheet - BLF6G20-180PN_2
BLF6G20-180PN_2 20090121 Preliminary data sheet - BLF6G20-180PN_1
Modifications: •Table 7 on page 3: Maximum adjacent channel power ratio changed
•Table 8 on page 3: Minimum output peak-to-average ratio changed
BLF6G20-180PN_1 20080428 Objective data sheet - -
BLF6G20-180PN_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 30 March 2009 10 of 11
NXP Semiconductors BLF6G20-180PN
Power LDMOS transistor
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors BLF6G20-180PN
Power LDMOS transistor
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 30 March 2009
Document identifier: BLF6G20-180PN_3
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics. . . . . . . . . . . . . . . . . . . 3
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Application information. . . . . . . . . . . . . . . . . . . 3
7.1 Ruggedness in class-AB operation. . . . . . . . . . 4
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 6
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 9
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
13 Contact information. . . . . . . . . . . . . . . . . . . . . 10
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
