BLF6G10LS-160RN:11 - NXP Semiconductors

1. Product profile

1.1 General description

160 W LDMOS power transistor for base station applications at frequencies from

700 MHz to 1000 MHz.

[1] Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability on CCDF per carrier; carrier

spacing5MHz.

1.2 Features

Typical 2-carrier W-CDMA performance at frequencies of 920 MHz and 960 MHz, a

supply voltage of 32 V and an IDq of 1200 mA:

Average output power = 32 W

Power gain = 22.5 dB

Efficiency = 27 %

ACPR = −41 dBc

Easy power control

Integrated ESD protection

Excellent ruggedness

High efficiency

Excellent thermal stability

Designed for broadband operation (700 MHz to 1000 MHz)

Internally matched for ease of use

Compliant to Directive 2002/95/EC, rega rd in g re str icti on of hazardous substances

(RoHS)

BLF6G10-160RN;

BLF6G10LS-160RN

Power LDMOS transistor

Rev. 02 — 21 January 2010 Product data sheet

Table 1. Typical perform a nce

Ty pical RF performance at Tcase = 25

C in a class-AB production test circuit.

Mode of operation f VDS PL(AV) GpηDACPR

(MHz) (V) (W) (dB) (%) (dBc)

2-carrier W-CDMA 920 to 960 32 32 22.5 27 −41[1]

CAUTION

This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken

during transport and handling.

Product data sheet Rev. 02 — 21 January 2010 2 of 11

NXP Semiconductors BLF6G10(LS)-160RN

Power LDMOS transistor

1.3 Applications

RF power amplifiers for GSM, GSM EDGE, W-CDMA and CDMA base stations and

multi carrier applications in the 700 MHz to 1000 MHz frequency range.

2. Pinning information

[1] Connected to flange.

3. Ordering information

4. Limiting values

Table 2. Pinning

Pin Description Simplified outline Graphic symbol

BLF6G10-160RN (SOT502A)

1drain

2gate

3source [1]

BLF6G10LS-160RN (SOT 502B)

1drain

2gate

3source [1]

sym11

Table 3. Ordering information

Type number Package

Name Description Version

BLF6G10-160RN - flanged LDMOST ceramic package; 2 mounting holes;

2 leads SOT502A

BLF6G10LS-160RN - earless flanged LDMOST ceramic package; 2 leads SOT502B

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VDS drain-source voltage - 65 V

VGS gate-source voltage −0.5 +13 V

IDdrain current - 39 A

Tstg storage temperature −65 +150 °C

Tjjunction temperature - 225 °C

Product data sheet Rev. 02 — 21 January 2010 3 of 11

NXP Semiconductors BLF6G10(LS)-160RN

Power LDMOS transistor

5. Thermal characteristics

6. Characteristics

7. Application information

7.1 Ruggedness in class-AB operation

The BLF6G10-160RN and BLF6G10LS-160RN are capable of withstanding a load

mismatch corr es po nd in g to VSWR = 10 : 1 through all ph ases under the followin g

conditions: VDS =32V; I

Dq = 1200 mA; PL = 160 W (CW); f = 960 MHz.

Table 5. Thermal characteristics

Symbol Parameter Conditions Type Typ Unit

Rth(j-case) thermal resistance from

junction to case Tcase =80°C;

PL=32W BLF6G10-160RN 0.5 K/W

BLF6G10LS-160RN 0.44 K/W

Table 6. Characteristics

Tj = 25

C unless otherwise specified

Symbol Parameter Conditions Min Typ Max Unit

V(BR)DSS drain-source breakdown

voltage VGS =0V; I

D=0.72mA65--V

VGS(th) gate-source threshold voltage VDS =10 V; I

D= 216 mA 1.4 1.9 2.4 V

VGSq gate-source quiescent voltage VDS =32V;

ID= 1300 mA 1.7 2.2 2.7 V

IDSS drain leakage current VGS =0V; V

DS =32V--5μA

IDSX drain cut-off current VGS =V

GS(th) +3.75 V;

VDS =10V 30.6 39 - A

IGSS gate leakage current VGS =13V; V

DS = 0 V - - 450 nA

gfs forward transcondu ctance VDS =10V; I

D=7.5A - 13.5 - S

RDS(on) drain-source on-state

resistance VGS =V

GS(th) + 3.75 V;

ID=7.5A -0.07-Ω

Crs feedback capacitance VGS =0V; V

DS =32V;

f= 1MHz -4.2-pF

Table 7. Application information

Mode of operation: 2-carrier W-CDMA; PAR 7.5 dB at 0.01 % probability on CCDF; 3GPP test

model 1; 1-64 PDPCH; f1= 922.5 MHz; f2= 927.5 MHz; f3= 952.5 MHz; f4= 957.5 MHz;

RF performance at VDS =32V; I

Dq = 1200 mA; Tcase =25

C; unless otherwise specified; in a

class-AB production test circuit.

Symbol Parameter Conditions Min Typ Max Unit

PL(AV) average output power - 32 - W

Gppower gain PL(AV) = 32 W 21 22.5 - dB

RLin input return loss PL(AV) =32W - −8−5.5 dB

ηDdrain efficiency PL(AV) =32W 25 27 - %

ACPR adjacent channel power ratio PL(AV) =32W - −41 −38 dBc

Product data sheet Rev. 02 — 21 January 2010 4 of 11

NXP Semiconductors BLF6G10(LS)-160RN

Power LDMOS transistor

7.2 One-tone CW

7.3 Two-tone CW

VDS = 32 V; IDq = 1200 mA; f = 960 MHz.

Fig 1. One-tone CW power gain and dra in efficiency as functions of load power;

typical values

PL (W)

0 20016080 12040

001aah475

(dB)

ηD

(%)

ηD

VDS = 32 V; IDq = 1200 mA; f1 = 959.95 MHz;

f2= 960.05 MHz. VDS = 32 V; IDq = 1200 mA; f1 = 959.95 MHz;

f2= 960.05 MHz.

Fig 2. Two-tone CW power gain and drain efficiency

as functions of peak envelope load power;

typical valu e s

Fig 3. Intermodul at ion dis tortion as a function of

peak envelope load power; typica l values

PL(PEP) (W)

0 20016080 12040

001aah476

(dB)

ηD

(%)

ηD

001aah477

PL(PEP) (W)

0 24016080

−40

−60

−20

IMD

(dBc)

−80

IMD3

IMD5

IMD7

Product data sheet Rev. 02 — 21 January 2010 5 of 11

NXP Semiconductors BLF6G10(LS)-160RN

Power LDMOS transistor

7.4 2-carrier W-CDMA

8. Test information

VDS = 32 V; IDq = 1200 mA; f1 = 952.5 MHz;

f2= 957.5 MHz; carrier spacing 5 MHz. VDS = 32 V; IDq = 1200 mA; f1 = 952.5 MHz;

f2= 957.5 MHz; carrier spacing 5 MHz.

Fig 4. 2-carrier W-CDMA power gain and drain

efficiency as functions of average load power;

typical valu e s

Fig 5. 2-carrier W-CDMA adjacent channel power

ratio as function of average load pow er ;

typical values

001aaj516

PL(AV) (W)

0604020

(dB)

ηD

(%)

ηD

001aah479

PL(AV) (W)

0604020

−40

−60

−20

ACPR

(dBc)

−80

Fig 6. Test circuit for operation at 900 MHz

001aah48

output

50 Ω

input

50 Ω

C4C1 C14

C15 C12 C10

C8 C2 C6 C3 C5 C7 C9 C11 C16

C13

Product data sheet Rev. 02 — 21 January 2010 6 of 11

NXP Semiconductors BLF6G10(LS)-160RN

Power LDMOS transistor

[1] American Technical Ceramics type 100B or capacitor of same quality.

[2] TDK or capacitor of same quality.

The striplines are on a double copper-clad Taconic RF35 Printed-Circuit Board (PCB) with εr=3.5

and thickness = 0.76 mm.

See Table 8 for list of components.

Fig 7. Component layout

001aah48

C15

C14

C12

C13

C5 C9

C7 C11

C16

R1 C8

C10

−

Table 8. List of components (see Figure 6 and Figure 7)

All capaci to rs sho u l d be s old ered vertical l y.

Component Description Value Remarks

C1, C2, C3, C4 multilayer ceramic chip capacitor 68 pF [1]

C5, C6 multilayer ceramic chip capacitor 560 pF [1]

C7, C8 multilayer ceramic chip capacitor 330 nF; 50 V [2]

C9, C10 multilayer ceramic chip capacitor 1.5 μF; 50 V [2]

C11, C12 multilayer c eramic chip capacitor 4.5 μF; 50 V [2]

C13 multilayer ceramic chip capacitor 2.20 pF [1]

C14 multilayer ceramic chip capacitor 2.7 pF [1]

C15 SMD tantalum capacitor 47 μF; 20 V

C16 electrolytic capacitor 220 μF

L1 ferrite SMD bead - Ferroxcube BDS 3/3/8.9-4S 2 or equivalent

R1 SMD resistor 4.7 Ω; 0.1 W

R2 SMD resistor 6.8 Ω; 0.1 W

Product data sheet Rev. 02 — 21 January 2010 7 of 11

NXP Semiconductors BLF6G10(LS)-160RN

Power LDMOS transistor

9. Package outline

Fig 8. Package outline SOT502A

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT502A 99-12-28

03-01-10

0 5 10 mm

scale

Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502

M M

UNIT A

12.83

12.57

0.15

0.08

20.02

19.61

9.53

9.25

19.94

18.92

9.91

9.65

4.72

3.43

cU2

0.25 0.5127.94

1.14

0.89

34.16

33.91

5.33

4.32

3.38

3.12

1.70

1.45

9.50

9.30

inches 0.505

0.495

0.006

0.003

0.788

0.772

19.96

19.66

0.786

0.774

0.375

0.364

0.785

0.745

0.390

0.380

0.186

0.135 0.01 0.021.100

0.045

0.035

1.345

1.335

0.210

0.170

0.133

0.123

0.067

0.057

0.374

0.366

DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)

w1AB

M M M

Product data sheet Rev. 02 — 21 January 2010 8 of 11

NXP Semiconductors BLF6G10(LS)-160RN

Power LDMOS transistor

Fig 9. Package outline SOT502B

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT502B 03-01-10

07-05-09

0 5 10 mm

scale

Earless flanged LDMOST ceramic package; 2 leads SOT502

M M

UNIT A

12.83

12.57

0.15

0.08

20.02

19.61

9.53

9.25

19.94

18.92

9.91

9.65

4.72

3.43

cU2

0.25

1.14

0.89

20.70

20.45

5.33

4.32

1.70

1.45

9.50

9.30

inches 0.505

0.495

0.006

0.003

0.788

0.772

19.96

19.66

0.786

0.774

0.375

0.364

0.785

0.745

0.390

0.380

0.186

0.135 0.010

0.045

0.035

0.815

0.805

0.210

0.170

0.067

0.057

0.374

0.366

DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)

Product data sheet Rev. 02 — 21 January 2010 9 of 11

NXP Semiconductors BLF6G10(LS)-160RN

Power LDMOS transistor

10. Abbreviations

11. Revision history

Table 9. Abbreviations

Acronym Description

3GPP Third Generation Partnership Project

CCDF Complementary Cumulative Distribution Function

CDMA Code Division Multiple Access

CW Continuous Wave

DPCH Dedicated Physical CHannel

EDGE Enhanced Data rates for GSM Evolution

GSM Global System for Mobile communications

LDMOS Laterally Diffused Metal-Oxide Semiconductor

LDMOST Laterally Diffused Metal-Oxide Semiconductor Transistor

PAR Peak-to-Average power Ratio

PDPCH transmission Power of the Dedicated Physical CHannel

RF Radio Frequency

SMD Surface Mounted Device

VSWR Voltage Standing-Wave Ratio

W-CDMA Wideband Code Division Multiple Access

Table 10. Revision history

Document ID Release date Data sheet status Change notice Supersedes

BLF6G10-160RN_10LS-160RN_2 20100121 Product data sheet - BLF6G10-160RN_10LS-160RN_1

Modifications: •Section 1.1 “General description” lower frequency range extended to 700 MHz

from 800 MHz.

•Section 1.2 “Features” lower frequency range extended to 700 MHz from 800 MHz.

•Section 1.3 “Applications” lower frequency range extended to 700 MHz from

800 MHz.

•Section 12 “ Legal information” export control disclaimer added.

BLF6G10-160RN_10LS-160RN_1 20090120 Product data sheet - -

Product data sheet Rev. 02 — 21 January 2010 10 of 11

NXP Semiconductors BLF6G10(LS)-160RN

Power LDMOS transistor

12. Legal information

12.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

12.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not b e relied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semicond uctors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall pre va il.

12.3 Disclaimers

General — In formation in this document is believed to be accurate and

reliable. However, NXP Semiconduct ors does not give any repr esentatio ns or

warranties, expressed or impli ed, as to the accuracy or completeness of such

information and shall have no liability for th e co nsequences of use of such

information.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descripti ons, at any time and without

notice. This document supersedes and replaces all informa tion supplied prior

to the publication hereof .

Suitability for use — NXP Semiconductors product s are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of

NXP Semiconductors products in such equipment or application s and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ra tings System of IEC 60134) may cause permane nt

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other co nditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may af fect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold

subject to the general terms and conditions of commercia l sale, as published

at http://www.nxp.com/profile/terms, including those pertaining to warranty,

intellectual property rights infringement and limitation of liability, unless

explicitly otherwise agreed to in writing by NXP Semiconductors. In case of

any inconsistency or conflict between inf ormation in this document and such

terms and conditions, the latter will prevail.

No offer to sell or license — Nothing i n this document may be interpreted or

construed as an of fer t o sell product s that is open for accept ance or the gr ant,

conveyance or implication of any license under any copyrights, patents or

other industrial or inte llectual property right s.

Export control — This document as well as the item(s) described herein

may be subject to export control regulatio ns. Export might require a prior

authorization from national authorities.

12.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respective ow ners.

13. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contain s data from the objective specification for product development .

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.

NXP Semiconductors BLF6G10(LS)-160RN

Power LDMOS transistor

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 21 January 2010

Document identifier: BLF6G10-1 60RN_10LS-160RN_2

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

14. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 General description . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Thermal characteristics . . . . . . . . . . . . . . . . . . 3

6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Application information. . . . . . . . . . . . . . . . . . . 3

7.1 Ruggedness in class-AB operation . . . . . . . . . 3

7.2 One-tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . 4

7.3 Two-tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . 4

7.4 2-carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . . 5

8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 5

9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7

10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 9

11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9

12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10

12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10

12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10

12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10

13 Contact information. . . . . . . . . . . . . . . . . . . . . 10

14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11