IRF9130 Data Sheet February 1999 -12A, -100V, 0.30 Ohm, P-Channel Power MOSFET These are P-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. They can be operated directly from integrated circuits. File Number 2220.3 Features * -12A, -100V * rDS(ON) = 0.30 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance Symbol Formerly developmental type TA17511. D Ordering Information PART NUMBER IRF9130 PACKAGE TO-204AA G BRAND IRF9130 S NOTE: When ordering, use the entire part number. Packaging JEDEC TO-204AA DRAIN (FLANGE) SOURCE (PIN 2) GATE (PIN 1) 5-8 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 IRF9130 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL IRF9130 -100 -100 -12 -7.5 -48 20 75 0.6 500 -55 to 150 UNITS V V A A A V W W/oC mJ oC 300 oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to TJ = 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage PARAMETER SYMBOL BVDSS ID = -250A, VGS = 0V, (Figure 10) -100 - - V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250A -2 - -4 V VDS = Rated BVDSS, VGS = 0V - - -25 A - - 250 A -12 - - A Zero Gate Voltage Drain Current IDSS VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time ID(ON) IGSS rDS(ON) gfs td(ON) Rise Time tr Turn-Off Delay Time td(OFF) Fall Time VDS > ID(ON) x rDS(ON)MAX, VGS = -10V VGS = 20V - - 100 nA ID = -6.5A, VGS = -10V, (Figures 8, 9) - 0.25 0.30 VDS > ID(ON) x rDS(ON)MAX, ID = -6.5A (Figure 12) 2 3.7 - S VDD = 0.5 x Rated BVDSS, ID -6.5A, RG = 50 RL = 5.7 (Figures 17, 18) MOSFET Switching Times are Essentially Independent of Operating Temperature - 30 60 ns - 70 140 ns - 70 140 ns - 70 140 ns - 25 45 nC - 13 - nC - 12 - nC VDS = -25V, VGS = 0V, f = 1MHz (Figure 11) - 500 - pF - 300 - pF - 100 - pF Measured Between the Contact Screw on the Flange that is Closer to Source and Gate Pins and the Center of Die - 5.0 - nH - 12.5 - nH - - 1.67 oC/W - - 30 oC/W tf Total Gate Charge (Gate to Source + Gate to Drain) Qg(TOT) Gate to Source Charge Qgs Gate to Drain "Miller" Charge Qgd Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS Internal Drain Inductance LD Internal Source Inductance LS VGS = -10V, ID = -15A, VDS = 0.8 x Rated BVDSS Ig(REF) = -1.5mA (Figures 14, 19, 20) Gate Charge is Essentially Independent of Operating Temperature Measured From the Source Lead, 6mm (0.25in) From the Flange and the Source Bonding Pad Modified MOSFET Symbol Showing the Internal Devices Inductances D LD G LS S Thermal Resistance Junction to Case RJC Thermal Resistance Junction to Ambient RJA 5-9 Typical Socket Mount IRF9130 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) ISD ISDM TEST CONDITIONS MIN TYP MAX UNITS - - -12 A - - -48 A TC = 25oC, ISD = -12A, VGS = 0V (Figure 13) - - -1.5 V TJ =150oC, ISD = -12A, dISD/dt = 100A/s TJ = 150oC, ISD = -12A, dISD/dt = 100A/s - 300 - ns - 1.8 - C Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode D G S Source to Drain Diode Voltage (Note 2) Reverse Recovery Time VSD trr Reverse Recovery Charge QRR NOTES: 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 25V, starting TJ = 25oC, L = 5.2mH, RG = 25, peak IAS = 12A. See Figures 15, 16. Typical Performance Curves Unless Otherwise Specified -12.0 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 -9.6 -7.2 -4.8 -2.4 0 0 0 25 50 75 100 TA , CASE TEMPERATURE (oC) 125 25 150 THERMAL IMPEDANCE (oC/W) 50 75 125 100 150 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE ZJC, NORMALIZED TRANSIENT POWER DISSIPATION MULTIPLIER 1.2 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 1 0.5 0.2 0.1 PDM 0.1 0.05 0.02 0.01 0.01 10-5 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC SINGLE PULSE 10-4 10-3 10-2 10-1 t1 , RECTANGULAR PULSE DURATION (s) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 5-10 1 10 IRF9130 Typical Performance Curves Unless Otherwise Specified (Continued) -20 10s 100s 10 1ms OPERATION IN THIS AREA IS LIMITED BY rDS(ON) 10ms 100ms DC 1 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 100 TC = 25oC TJ = MAX RATED SINGLE PULSE 0.1 1 VGS = -10V -16 VGS = -8V -12 VGS = -7V -8 VGS = -6V -4 VGS = -5V VGS = -4V 0 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 -30 -50 -40 VGS = -7V VGS = -8V -8 VGS = -9V VGS = -6V VGS = -10V -6 ID(ON), ON-STATE DRAIN CURRENT (A) -20 PULSE DURATION = 80s -4 VGS = -5V -2 VGS = -4V 0 0 -2 -1 -4 -3 PULSE DURATION = 80s VDS I D(ON) x rDS(ON)MAX -16 TJ = 125oC TJ = 25oC -12 TJ = -55oC -8 -4 0 -5 0 -2 -4 -6 -8 VGS, GATE TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 6. SATURATION CHARACTERISTICS 2.2 PULSE DURATION = 2s VGS = -10V, ID = -4A NORMALIZED DRAIN TO SOURCE ON RESISTANCE VGS = -10V 0.8 0.6 0.4 VGS = - 20V 0.2 0 0 -10 -30 -20 ID, DRAIN CURRENT (A) -40 -10 FIGURE 7. TRANSFER CHARACTERISTICS 1.0 ON RESISTANCE () -20 FIGURE 5. OUTPUT CHARACTERISTICS -10 ID, DRAIN CURRENT (A) -10 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA rDS(ON), DRAIN TO SOURCE VGS = -9V PULSE DURATION = 80s -50 1.8 1.4 1.0 0.6 0.2 -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) NOTE: Heating effect of 2s pulse is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 5-11 FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE IRF9130 Typical Performance Curves Unless Otherwise Specified (Continued) 1000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD 800 1.15 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.25 1.05 0.95 600 CISS 400 COSS 200 0.85 CRSS 0 0.75 -40 0 40 80 120 -10 0 160 TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE -30 -40 -50 FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 5 ISD, SOURCE TO DRAIN CURRENT (A) -100 TJ = -55oC TJ = 25oC 4 TJ = 125oC 3 PULSE DURATION = 80s 2 1 0 -4 -8 -12 TJ = 25oC -1.0 -0.1 -0.4 -20 -16 TJ = 150oC -10 -0.6 I D , DRAIN CURRENT (A) -0.8 -1.0 ID = 15A -5 VDS = -80V VDS = -50V -10 VDS = -20V -15 8 16 24 32 40 Qg(TOT), TOTAL GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 5-12 -1.4 -1.6 FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 0 0 -1.2 VSD, SOURCE TO DRAIN VOLTAGE (V) FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT VGS, GATE TO SOURCE VOLTAGE (V) gfs, TRANSCONDUCTANCE (S) -20 VDS, DRAIN TO SOURCE VOLTAGE (V) -1.8 IRF9130 Test Circuits and Waveforms VDS tAV L 0 VARY tP TO OBTAIN - RG REQUIRED PEAK IAS + VDD DUT 0V VDD tP VGS IAS IAS VDS tP 0.01 BVDSS FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(OFF) td(ON) tr 0 RL - DUT VGS + 10% 10% VDS VDD RG tf VGS 0 90% 90% 10% 50% 50% PULSE WIDTH 90% FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS -VDS (ISOLATED SUPPLY) CURRENT REGULATOR 0 VDS DUT 12V BATTERY 0.2F 50k 0.3F Qgs Qg(TOT) DUT G VGS Qgd D VDD 0 S Ig(REF) IG CURRENT SAMPLING RESISTOR +VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 5-13 0 IG(REF) FIGURE 20. GATE CHARGE WAVEFORMS IRF9130 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. 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