DS26LS32MQML
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SNOSAM6B –OCTOBER 2005–REVISED APRIL 2013
DS26LS32MQML Quad Differential Line Receivers
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1FEATURES DESCRIPTION
The DS26LS32 and DS26LS32A are quad differential
2• High Differential or Common-Mode Input line receivers designed to meet the RS-422, RS-423
Voltage Ranges of ±7V on the DS26LS32. and Federal Standards 1020 and 1030 for balanced
• ±0.2V Sensitivity Over the Input Voltage Range and unbalanced digital data transmission.
on the DS26LS32. The DS26LS32 and DS26LS32A have an input
• DS26LS32 Meet All Requirements of RS-422 sensitivity of 200 mV over the input voltage range of
and RS-423 ±7V. The DS26LS33 has an input sensitivity of
• 6k Minimum Input Impedance 500 mV over the input voltage range of ±15V.
• 100 mV Input Hysteresis on the DS26LS32 The DS26LS32A differs in function from the popular
• Operation From a single 5V Supply DS26LS32 and DS26LS33 in that input pull-up and
pull-down resistors are included which prevent output
• TRI-STATE Outputs, with Choice of oscillation on unused channels.
Complementary Output Enables for Receiving
Directly onto a Data Bus Each version provides an enable and disable function
common to all four receivers and features TRI-STATE
outputs with 8 mA sink capability. Constructed using
low power Schottky processing, these devices are
available over the full military and commercial
operating temperature ranges.
Logic Diagram
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2005–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
DS26LS32MQML
SNOSAM6B –OCTOBER 2005–REVISED APRIL 2013
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Connection Diagram
Top View
Figure 1. CDIP Package
See Package Numbers NFE0016A, NAD0016A
Top View
Figure 2. 20-Lead LCCC Package
See Package Number NAJ0020A
Truth Table(1)
ENABLE ENABLE Input Output
0 1 X Hi-Z
VID ≥VTH (Max) 1
See Note Below VID ≤VTH (Min) 0
(1) Hi-Z = TRI-STATE
Note: Input conditions may be any combination not defined for ENABLE and ENABLE .
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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SNOSAM6B –OCTOBER 2005–REVISED APRIL 2013
Absolute Maximum Ratings (1)
Supply Voltage 7V
Common-Mode Range ±25V
Differential Input Voltage ±25V
Enable Voltage 7V
Output Sink Current 50 mA
Maximum Power Dissipation at 25°C (2)
NFE0016A Package 1666.5 mW
NAJ0020A Package 1875 mW
NAD0016A Package 967.74 mW
Junction Temperature (TJ) +150°C
Thermal Resistance, Junction-to-Ambient θJA
NFE0016A Package 100°C/W
NAJ0020A Package 130°C/W
NAD0016A Package 140°C/W
Thermal Resistance, Junction-to-Ambient θJC See MIL-STD-1835
Storage Temperature Range −65°C to +165°C
Lead Temperature (Soldering, 4 seconds) 260°C
ESD Tolerance (3) 500V
(1) Absolute Maximum Ratings are those values beyond which the safety of the device cannot be verified. They are not meant to imply that
the device should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation.
(2) Derate NFE0016A, package 11.11 mW/°C above 25°C; derate NAJ0020A package 12.5 mW/°C above 25°C; derate NAD0016A
Package 6.4516 mW/°C for above 25°C.
(3) Human body model, 1.5kΩin series with 100pF.
Recommended Operating Conditions
Supply Voltage, VCC 4.5 V to 5.5 V
Temperature, TA−55°C to +125°C
Quality Conformance Inspection
MIL-STD-883, Method 5005 - Group A
Subgroup Description Temp ( °C)
1 Static tests at +25
2 Static tests at +125
3 Static tests at -55
4 Dynamic tests at +25
5 Dynamic tests at +125
6 Dynamic tests at -55
7 Functional tests at +25
8A Functional tests at +125
8B Functional tests at -55
9 Switching tests at +25
10 Switching tests at +125
11 Switching tests at -55
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SNOSAM6B –OCTOBER 2005–REVISED APRIL 2013
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DS26LS32M 883 Electrical Characteristics DC Parameters
The following conditions apply, unless otherwise specified. VCC = 5V Sub-
Parameter Test Conditions Notes Min Max Unit groups
VCC = 5.5V, VIN = 15V (Pin under
test), other inputs -15V, (1) 2.3 mA 1, 2, 3
≤VIN ≤+15V
IIN Input Current VCC = 5.5V, VIN = -15V (Pin under
test), other inputs -15V, (1) -2.8 mA 1, 2, 3
≤VIN ≤+15V
IIL Logical "0" ENABLE Current VCC = 5.5V, VIN = 0.4V (1) -360 uA 1, 2, 3
IIH Logical "1" ENABLE Current VCC = 5.5V, VIN = 2.7V (1) 20 uA 1, 2, 3
IILogical "1" ENABLE Current VCC =5.5V, VIN = 5.5V (1) 100 uA 1, 2, 3
VIC Input Clamp Voltage (ENABLE) VCC = 4.5V, IIN = -18mA (1) -1.5 V 1, 2, 3
VCC = 4.5V, IOH = -440uA,
VOH Logical "1" Output Voltage (1) 2.5 V 1, 2, 3
ΔVIN = 1V, V ENABLE = 0.8V
VCC = 4.5V, IOL = 4mA, (1) .4 V 1, 2, 3
ΔVIN = -1V, V ENABLE = 0.8V
VOL Logical "0" Output Voltage VCC = 4.5V, IOL = 8mA, (1) .45 V 1, 2, 3
ΔVIN = -1V, V ENABLE = 0.8V
VCC = 5.5V, VO= 0V,
IOS (MIN) Output Short Circuit Current (1) -15 mA 1, 2, 3
ΔVIN = 1V
VCC = 5.5V, VO= 0V,
IOS (MAX) Output Short Circuit Current (1) -85 mA 1, 2, 3
ΔVIN = 1V
VCC = 5.5V, All VIN = GND, Outputs
ICC Supply Current (1) 70 mA 1, 2, 3
Disabled
VCC = 5.5V, VO= 0.4V (1) -20 uA 1, 2, 3
IOOff-State Output Current VCC = 5.5V, VO= 2.4V (1) 20 uA 1, 2, 3
VTH Differential Input Voltage -7V ≤VCM ≤7V (1)(2) -0.2 0.2 V 1, 2, 3
RIN Input Resistance -15V ≤VCM ≤15V (1) 6 kohm 1, 2, 3
Logical "0" Input Voltage
VIL VCC = 4.5V (1)(2) 0.8 V 1, 2, 3
(ENABLE)
Logical "1" Input Voltage
VIH VCC = 4.5V (1)(2) 2 V 1, 2, 3
(ENABLE)
(1) For Subgroups 1 and 2, power dissipation must be externally controlled at elevated temperatures.
(2) Parameter tested go-no-go only.
DS26LS32M 883 Electrical Characteristics AC Parameters - Propagation Delay Time
The following conditions apply, unless otherwise specified. VCC = 5V Sub-
Parameter Test Conditions Notes Min Max Unit groups
tPLH Propagation Delay Time CL= 15PF(1) 30 nS 9,11,
tPLH Propagation Delay Time CL= 15PF(1) 120 nS 10
tPHL Propagation Delay Time CL= 15PF(1) 30 nS 9,11,
tPHL Propagation Delay Time CL= 15PF(1) 120 nS 10
ENABLE CL= 5PF(1) 34 nS 9
tPLZ Enable to Output ENABLE CL= 5PF(1) 64 nS 10
ENABLE CL= 5PF(1) 27 nS 11
ENABLE CL= 5PF(1) 32 nS 9,11,
tPHZ Enable to Output ENABLE CL= 5PF(1) 35 nS 10
ENABLE CL= 15PF(1) 34 nS 9
tPZL Enable to Output ENABLE CL= 15PF(1) 65 nS 10
ENABLE CL= 15PF(1) 27 nS 11
(1) Tested at 25°C, specified but not tested at +125°C & −55°C
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SNOSAM6B –OCTOBER 2005–REVISED APRIL 2013
DS26LS32M 883 Electrical Characteristics AC Parameters - Propagation Delay Time (continued)
The following conditions apply, unless otherwise specified. VCC = 5V Sub-
Parameter Test Conditions Notes Min Max Unit groups
ENABLE CL= 15PF(1) 35 nS 9, 11
tPZH Enable to Output ENABLE CL= 15PF(1) 65 nS 10
AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS
Figure 3. Load Test Circuit for TRI-STATE Outputs
(1) Diagram shown for ENABLE low.
(2) Pulse generator for all pulses: Rate = 1.0 MHz; ZO= 50Ω; tr≤6 ns; tf≤6.0 ns.
Figure 4. Propagation Delay
(1) S1 and S2 of load circuit are closed except where shown.
(2) Pulse generator for all pulses: Rate = 1.0 MHz; ZO= 50Ω; tr≤6 ns; tf≤6.0 ns.
Figure 5. Enable and Disable Times
TYPICAL APPLICATIONS
Figure 6. Two-Wire Balanced Interface—RS-422
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SNOSAM6B –OCTOBER 2005–REVISED APRIL 2013
REVISION HISTORY
Date Revision Section Originator Changes
Released
10/20/05 A New Release, Corporate format. R. Malone 1 MDS data sheet converted into Corporate
Changes made in conversion: Ordering data sheet format. Added: SMD reference for
Info. Table, Absolute Ratings, Maximum 883 NSID's, Juction temp., Thermal Resistance
Operating Conditions, Typos in QMLV & θJA and θJC.Changed: Maximum Operating
RH, 883 AC Electrical Characteristics Conditions to Recommended Operating
Parameters Column. Conditions, Enable and Disable Time to Enable
to Output. Deleted max limit: 27nS for tPZH and
added subgroup 11 to max limit 35nS. MDS
data sheet MNDS26LS32–X, Rev. 2B0 will be
Archived.
4/15/2013 B TIS Changed layout of National Data Sheet to TI
format
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PACKAGE OPTION ADDENDUM
www.ti.com 15-Apr-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Top-Side Markings
(4)
Samples
5962-7802006QEA ACTIVE CDIP NFE 16 25 TBD Call TI Call TI -55 to 125 (DS26C32AMJ/883 ~
DS26LS32MJ/883
)
(5962-7802006QEA Q
~ 5962-916400
1MEA Q)
AM26LS32DMB ACTIVE CDIP NFE 16 25 TBD Call TI Call TI -55 to 125 (DS26C32AMJ/883 ~
DS26LS32MJ/883
)
(5962-7802006QEA Q
~ 5962-916400
1MEA Q)
DS26LS32MJ/883 ACTIVE CDIP NFE 16 25 TBD Call TI Call TI -55 to 125 (DS26C32AMJ/883 ~
DS26LS32MJ/883
)
(5962-7802006QEA Q
~ 5962-916400
1MEA Q)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 15-Apr-2013
Addendum-Page 2
(4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
MECHANICAL DATA
J0016A
www.ti.com
J16A (REV L)
NFE0016A
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