TDA8944J - NXP - Pdf.Support

TDA8944J

2 x 7 W stereo Bridge Tied Load (BTL) audio amplifier

Rev. 02 — 14 February 2000 Product specification

1. General description

The TDA8944J is a dual-channel audio po wer amplifier with an output power of

2×7W at an 8Ω load and a 12 V supply. The circuit contains two Bridge Tied Load

(BTL) amplifiers with an all-NPN output st age and st andby/mute logic. The TDA8944J

comes in a 17-pin DIL-bent-SIL (DBS) power package. The TDA8944J is

printed-circuit board (PCB) compatible with all other types in the TDA894x family.

One PCB footprint accommo dates both the mono and the stereo products.

2. Features

Few external components

Fixed gain

Standby and mute mode

No on/off switching plops

Low standby current

High supply voltage ripple rejection

Outputs short-ci rcu it pr ot ec ted t o grou n d, supply and across th e loa d

Thermally pr ot ec te d

Printed-circuit board compatible.

3. Applications

Mains fed applications (e.g. TV sound)

PC audio

Portable audio.

4. Quick reference data

Table 1: Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

VCC supply voltage 6 12 18 V

Iqquiescent supply current VCC =12V; R

L=∞- 2436mA

Istb standby supply current - - 10 μA

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 2 of 22

5. Ordering information

6. Block diagram

Pooutput power THD = 10%; RL=8Ω;

VCC =12V 67- W

THD total harmonic distortion Po= 1 W - 0.03 0.1 %

Gvvoltage gain 31 32 33 dB

SVRR supply vol tage ripple

rejection 50 65 - dB

Table 1: Quick reference data…continued

Symbol Parameter Conditions Min Typ Max Unit

Table 2: Ordering information

Type number Package

Name Description Version

TDA8944J DBS17P plastic DIL-bent-SIL power package;

17 leads (lead length 12 mm) SOT243-1

Fig 1. Block diagram.

wid

MBK933

STANDBY/

MUTE LOGIC SHORT CIRCUIT

AND

TEMPERATURE

PROTECTION

kΩ

12 17

VCC1

VCC

OUT2+

GND1

GND2

SVR

OUT2−

IN2−

IN2+

TDA8944J

VCC2

OUT1+

OUT1−

IN1−

IN1+

MODE

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 3 of 22

7. Pinning information

7.1 Pinning

7.2 Pin description

Fig 2. Pin configuration.

handbook, halfpage

TDA8944J

MBK936

OUT1−

GND1

VCC1

OUT1+

n.c.

IN1+

n.c.

IN1−

IN2−

MODE

SVR

IN2+

n.c.

OUT2+

GND2

VCC2

OUT2−

Table 3: Pi n de scription

Symbol Pin Description

OUT1−1 negative loudspeaker terminal 1

GND1 2 ground channel 1

VCC1 3 supply voltage channel 1

OUT1+4 positive loudspeaker terminal 1

n.c. 5 not connected

IN1+6 positive input 1

n.c. 7 not connected

IN1−8 negative input 1

IN2−9 negative input 2

MODE 10 mode selection input (standby, mute, operating)

SVR 11 half supply voltage decoupling (ripple rejection)

IN2+12 positive input 2

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 4 of 22

8. Functional description

The TDA8944J is a stereo BTL audio power amplifier capable of delivering 2 ×7W

output power to an 8 Ω load at THD = 10%, using a 12 V power supply and an

external heatsink. The voltage gain is fixed at 32 dB.

With the three-level MODE input the device can be switched from ‘standby’ to ‘mute’

and to ‘operating’ mo d e.

The TDA8944J outputs are protected by an internal thermal shutdown protection

mechanism an d a sho r t-c ircu i t pr ot ect ion .

8.1 Input configuration

The TDA8944J inputs can be driven symmetrical (floating) as well as asymmetrical.

In the asymmetr ica l mod e one input pi n is connected via a capacitor to the signa l

ground which should be as close as possible to the SVR (electrolytic) capacitor

ground. Note that the DC level of the input pins is half of the supply voltage VCC, so

coupling capacitors for both pins are necessary.

The input cut-off frequency is:

(1)

For Ri=45kΩ and Ci= 220 nF:

(2)

As shown in Equation 1 and 2, large capacitor values for the inputs are not

necessary; so the switch-on delay during charging of the input capacitors, can be

minimized. This result s in a good low frequency response and good switch-on

behaviour.

Remark: To prevent HF oscillations do not leave the inputs open, connect a capacitor

of at least 1.5 nF across the input pins close to the device.

n.c. 13 not connected

OUT2−14 negative loudspeaker terminal 2

GND2 15 ground chan nel 2

VCC2 16 supply voltage channel 2

OUT2+ 17 positive loudspeaker terminal 2

Table 3: Pi n de scription…continued

Symbol Pin Description

ficut off–() 1

iCi

×()–

------------------------------

fi cut off–() 1

24510

×220×10 9–

×()–

-------------------------------------------------------------------16 Hz==

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 5 of 22

8.2 Power amplifier

The power amplifier is a Bridge Tied Load (BTL) amplifier with an all-NPN output

stage, capable of delivering a peak output current of 2 A.

The BTL principle offers the following advantages:

•Lower peak value of the supply current

•The ripple freq uency on the supply voltage is twice the signal frequency

•No expensive DC-blocking capacitor

•Good low frequency performance.

8.2.1 Output power measurement

The output power as a function of the supply voltage is measured on the output pins

at THD = 10%; see Figure 8. The maximum output power is limited by the maximum

supply voltage of 12 V and the maximum available output current: 2 A repetitive peak

current.

8.2.2 Headroom

Typical CD mu sic requires at least 12 dB (factor 15.85) dynamic headroom –

compare d to the average power output – for transferring the loudest parts without

distortion. At VCC =12V, R

L=8Ω and Po= 4 W at THD = 0.1% (see Figure 6), the

Average Listening Level (ALL) – music power – without any distortion yields:

Po(ALL) = 4 W/15.85 = 252 mW.

The power dissipation can be der ive d fro m F i gu r e 11 on page 10 for 0 dB

respectively 12 dB headroom.

For the average listening level a power dissipation of 4 W can be used for a heatsink

calculation.

8.3 Mode selection

The TDA8944J has three functional modes, which can be sele cte d by app lyin g the

proper DC voltage to pin MODE. See Figure 4 and 5 for the respective DC levels,

which depend on the supply voltage level. The MODE pin can be drive n by a 3-state

logic output stage: e.g. a microcontroller with additional components for DC-level

shifting.

Standby — In this mode the current consumption is very low and the outputs are

floating. The device is in standby mode when (VCC −0.5 V) < VMODE <V

CC, or when

the MODE pin is left floating (high impedance). The power consumption of the

TDA8944J will be reduced to <0.18 mW.

Table 4: Power rating as function of headroom

Headroom Power output (THD = 0.1%) Power dissipation (P)

0 dB Po=4W 8W

12 dB Po(ALL) =252mW 4W

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 6 of 22

Mute — In this mode the amplifier is DC-biased but not operational (no a udio output);

the DC level of the input and output pins remain on half the supply voltage. This

allows the input couplin g and Sup p ly Voltage Ripple Rejection (SVRR) capacitors to

be charged to avoid pop-noise. The device is in mute mode when

3V<V

MODE <(V

CC −1.5 V).

Operating — In this mode the amp lifier is opera ting norma lly. The operatin g mode is

activated at V MODE <0.5V.

8.3.1 Switch-on and switch-off

To avoid audible plops d uring su pply vo lt age switch-on or switch-of f, the device is set

to standby mode before the supply voltage is applied (switch-on) or removed

(switch-off).

The switch-on and switch-off time can be influenced by an RC-circuit on the MODE

pin. Rapid on/off switching of the device or the MODE pin may cause ‘click- and

pop-noise’. This can be prevented by proper timing of the RC-circuit on the MODE

pin.

8.4 Supply Voltage Ripple Rejection (SVRR)

The SVRR is measured with an electrolytic capacitor of 10 μF on pin SVR at a

bandwidth of 10 Hz to 80 kHz. Figure 13 on page 11 illustrates the SVRR as function

of the frequency. A larger capacitor value on the SVR pin improves the ripple

rejection behaviour at the lower frequencies.

8.5 Built-in protection circuits

The TDA8944J contains two types of protection circuits, i.e. short-circuit and thermal

shutdown.

8.5.1 Short-circuit protection

Short-circuit to ground or supply line — This is detected by a so-called ‘missing

current’ detection circuit which measur es the current in the positive supply line and

the current in the ground line. A difference between both currents larger than 0.4 A,

switches the power stage to standby mode (high impedance).

Short-circuit across the load — This is detected by an absolute-current

measurement. An absolute-current larger than 2 A, switches the power stage to

standby mode (high impedance).

8.5.2 Thermal shutdown protection

The junction temperature is measured by a temperature sensor; at a junction

temperature of approximately 150 °C this detection circuit switches the power stage

to standby mode (high impedance).

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 7 of 22

9. Limiting values

10. Thermal characteristics

11. Sta tic characteristics

[1] With a load connected at the outputs the quiescent current will increase, the maximum of this increase being equal to the differential

output voltage offset (ΔVOUT) divided by the load resistance (RL).

[2] The DC output voltage with respect to ground is approximately 0.5VCC.

[3] ΔVOUT =⎪VOUT+ −VOUT−⎪

Table 5: L im iting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage no signal −0.3 +25 V

operating −0.3 +18 V

VIinput voltage −0.3 VCC +0.3 V

IORM repetitive peak output current - 2 A

Tstg storage temperature non-operating −55 +150 °C

Tamb operating ambient temperature −40 +85 °C

Ptot total power dissipation - 18 W

VCC(sc) supply voltage to guarantee short-circuit

protection -15V

Table 6: Thermal characteristics

Symbol Parameter Conditions Value Unit

Rth(j-a) thermal resistance from junction to ambient in free air 40 K/W

Rth(j-mb) thermal resistance from junction to mounting base both channels driven 6.9 K/W

Table 7: Static characteristics

VCC =12V; T

amb =25°C; RL=8Ω; VMODE =0V; V

i= 0 V; measured in test circuit Figure 14; unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

VCC supply voltage operating 6 12 18 V

Iqquiescent supply current RL=∞[1] -2436mA

Istb standby supply current VMODE =V

CC --10μA

VODC output voltage [2] -6-V

ΔVOUT[3] differential output voltage offset - - 200 mV

VMODE mode selection input voltage operating mode 0 - 0.5 V

mute mode 3 - VCC −1.5 V

standby mode VCC −0.5 - VCC V

IMODE mode selection input current 0 < VMODE <V

CC --20μA

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 8 of 22

12. Dynamic characteristics

[1] The noise output voltage is measured at the output in a frequency range from 20 Hz to 20 kHz (unweighted), with a source impedance

Rs=0Ω at the input.

[2] Supply voltage ripple rejection is measured at the output, with a source impedance Rs=0Ω at the input. The ripple voltage is a sine

wave with a frequency fripple and an amplitude of 707 mV (RMS), which is applied to the positive supply rail.

[3] Output voltage in mute mode is measured with an input voltage of 1 V (RMS) in a bandwidth of 20 kHz, so including noise.

Fig 3. Quiescent current as function of supply

voltage. Fig 4. Quiescent current as function of mode voltage.

handbook, halfpage

00481216

VCC (V)

(mA)

MGL954

handbook, halfpage

00481216

VMODE (V)

(mA)

MGL955

VCC = 12 V

Table 8: Dynamic characteristics

VCC =12V; T

amb =25°C; RL=8Ω; f = 1 kHz; VMODE = 0 V; measured in test circuit Figure 14; audio pass band

22 Hz to 22 kHz; unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Pooutput power THD = 10% 6 7 - W

THD = 0.5% 4 5 - W

THD total harmonic distortion Po= 1 W - 0.03 0.1 %

Gvvoltage gain 31 32 33 dB

Zi(dif) differential input impedance 70 90 110 kΩ

Vn(o) noise output voltage [1] -90120μV

SVRR supply voltage ripple rejection fripple = 1 kHz [2] 50 65 - dB

fripple = 100 Hz

to 20 kHz

[2] -60-dB

Vo(mute) output voltage mute mode [3] --50μV

αcs channel separation Rs=0Ω50 75 - dB

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 9 of 22

Fig 5. Output voltage as function of mode voltage.

No bandpass filter applied.

Fig 6. Total harmonic distortion as func tion of output

power. Fig 7. Total harmonic distortion as function of

frequency.

handbook, full pagewidth

2016 VMODE (V)

MGL957

840

(V)

−3

−2

−1

−4

−5

VCC = 12 V

handbook, halfpage

THD

(%)

−2

10110

−1

Po (W)

−1

−2

MGL952

VCC = 12 V

handbook, halfpage

THD

(%)

10 10

f (Hz)

−1

−2

MGL953

Po = 0.1 W

1 W

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 10 of 22

THD = 10%.

Fig 8. Output power as function of supply vol tage. Fig 9. Total power dissipation as function of su pply

voltage.

VCC =12V.

Fig 10. Efficiency as function of output power. Fig 11. Power dissipation as function of output power.

handbook, halfpage

00481216

VCC (V)

(W)

MGL959

RL = 8 Ω

16 Ω

handbook, halfpage

00481216

VCC (V)

Ptot

(W)

MGL960

RL = 8 Ω

16 Ω

handbook, halfpage

100

002468

Po (W)

(%)

MGL962

RL = 16 Ω

8 Ω

handbook, halfpage

002468

Po (W)

(W)

MGL961

RL = 8 Ω

16 Ω

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 11 of 22

No bandpass filter applied.

Fig 12. Channel separation as function of frequency.

VCC =12V; R

s=0Ω; Vripple = 707 mV (peak-to-peak); no bandpass filter applied.

Curves A: inputs short-circuited

Curves B: inputs short-circuited and connected to ground (asymmetrical application)

Fig 13. Supply voltage ripple rejection as function of freque ncy.

handbook, halfpage

−20

−40

−60

−80

−100

10 10

f (Hz)

αcs

(dB)

MGL958

handbook, full pagewidth

SVRR

(dB)

10 f (Hz)

−20

−40

−60

−80

MGL956

CH2

ACH1

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 12 of 22

13. Internal circuitry

Table 9: In te rnal circuitry

Pin Symbol Equivalent circuit

6 and 8 IN1+ and IN1−

12 and 9 IN2+ and IN2−

1 and 4 OUT1−and OUT1+

14 and 17 OUT2−and OUT2+

10 MODE

11 SVR

1.5 kΩ1.5 kΩ

45 kΩ45 kΩ

VCC

MGL946

1 : 1 1 : 1

1/2 VCC

(SVR)

8, 9 6, 1

0 Ω

100 Ω

MGL947

1, 4, 14, 17

1/2 VCC

1 kΩ

10 kΩ

OFF

HIGH MUTE

HIGH

1 kΩ

VCC

MGL949

Standby

20 kΩ

MGL948

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 13 of 22

14. Application information

14.1 Printed-circuit board (PCB)

14.1.1 Layout and grounding

For a high system pe rf or m an ce leve l ce rtain grou n din g te ch niq ue s ar e es se ntia l.

The input reference grounds have to be tied with their respective sour ce grounds and

must have separate tracks from the power ground tracks; this will prevent the large

(output) signal curren ts from interfering with the small AC input signals.

The small-signal ground tracks should be physically located as far as possible from

the power ground tracks. Supply and output tracks should be as wide as possible for

delivering maximum output power.

Fig 14. Application diagram.

, fu

ll pagewidth

316

OUT1−

−

8 Ω

45 kΩ

Symmetrical

input

45 kΩ

8 Ω

OUT1+

IN1−

IN1+

OUT2−

OUT2+

GND

MGL950

IN2−

IN2+

MODE

SVR

220 nF

152

+VC

1000 μ

100 nF

20 kΩ

μF

−

45 kΩ

VCC

signal

GND

TDA8944J

signal

GND

SHORT CIRCUIT

AND

TEMPERATURE

PROTECTION

STANDBY/

MUTE LOGIC

MICROCONTROLLER

Standby

MODE

Mute

C1 C2

1/2 VCC

220 nF

1.5

Asymmetrical

input

220 nF

1/2 VCC 1/2 VCC

1/2 VCC

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 14 of 22

14.1.2 Power supply decoupling

Proper supply byp assing is critical for lo w-noise performa nce and high supply voltage

ripple rejection. The respective capacitor locations should be as close as possible to

the device and grounded to the power ground. Proper power supply decoupling also

prevents oscillations.

For suppressing higher frequency transients (spikes) on the supply line a capacitor

with low ESR – typical 100 nF – has to be placed as close as possible to the device.

For suppressing lower frequency noise and ripple signals, a large electrolytic

capacitor – e.g. 1000 µμF or greater – must be placed close to the device.

The bypass capacitor on the SVR pin reduces the noise an d ripple on the midrail

voltage . For good THD and n oise performance a low ESR cap acitor is recommend ed.

Fig 15. Printed-circuit board layout (s ingle-sided); components view.

wid

MGL951

MUTE

220 nF

100 nF

1.5 nF

1000 μF

10 μF

220 nF

+−

IN2−

IN2+

IN1−

IN1+

OUT1−

OUT1+

OUT2−

OUT2+

VCC

GND

54 mm

56 mm

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 15 of 22

14.2 Thermal behaviour and heatsink calculation

The measured maximum thermal resistance of the IC package, Rth(j-mb) is 6.9 K/W.

A calculation for the heatsink can be made, with the following parameters:

Tamb(max) =50°C

VCC = 12 V and RL=8Ω

Tj(max) = 150 °C.

Rth(tot) is the total thermal resistance between the junction and the ambient

including the heatsink. In the heatsink calculations the value of Rth(mb-h) is ignored.

At VCC = 12 V an d RL=8Ω the measured worstcase sine-wave dissipation is 8 W;

see Figure 11. For Tj(max) = 150 °C the temperature raise - caused by the power

dissipation - is: 150 – 50 = 100 °C.

P×Rth(tot) =100°C

Rth(tot) = 100/8 = 12.5 K/W

Rth(h-a) =R

th(tot) –R

th(j-mb) = 12.5 – 6.9 = 5.6 K/W.

The calculation above is for an application at worstcase (stereo) sine-wave output

signals. In practice music signals will be applied, which decreases the maximum

power dissipation to appro xim at ely ha lf of th e sin e- wa ve po we r dis sipation (se e

Section 8.2.2). This allows for the use of a smalle r he atsink :

P×Rth(tot) =100°C

Rth(tot) = 100/4 = 25 K/W

Rth(h-a) =R

th(tot) –R

th(j-mb) = 25 – 6.9 = 18.1 K/W.

To increase the lifetime of the IC, Tj(max) should be r educed to 125 °C. This requires a

heatsink of approximately 12 K/W for music signals.

15. Test information

15.1 Quality information

The General Quality Specification for Integrated Circu its, SNW-FQ-611 is applicable.

15.2 Test conditions

Tamb =25°C; VCC =12V; f=1kHz; R

L=8Ω; audio pass band 22 Hz to 22 kHz;

unless otherwise specified.

Remark: In the graphs as function of frequency no bandpass filter was applied; see

Figure 7, 12 and 13.

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 16 of 22

16. Package outline

Fig 16. DBS17P package outline.

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

SOT243-1

0 5 10 mm

scale

117

non-concave

99-12-17

03-03-12

BS17P: plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm) SOT243

-1

view B: mounting base side

UNIT A e1

A2bpcD

(1) E(1) Z(1)

deDhLL

mm 17.0

15.5 4.6

4.4 0.75

0.60 0.48

0.38 24.0

23.6 20.0

19.6 10 2.54

0.8

12.2

11.8 1.27

5.08 2.4

1.6

62.00

1.45

2.1

1.8

3.4

3.1 4.3

12.4

11.0

0.4

0.03

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 17 of 22

17. Soldering

17.1 Introduction to soldering through-hole mount packages

This text gives a brief insight to wave, dip and man ua l sold er in g. A mo re in-d ep th

account of soldering ICs ca n be fo und in ou r Data Handbook IC26; Integrated Cir cuit

Packages (document order number 939 8 6 5 2 90011).

Wave soldering is the preferred method for mounting of through -hole mount IC

packages on a printed-circuit board.

17.2 Soldering by dipping or by solder wave

Driven by legislation and environm ental forces the worldwide use of lead-free solder

pastes is increasing. Typical dwell time of the leads in the wave ranges from

3 to 4 seconds at 250 °C or 265 °C, depending on solder material applied, SnPb or

Pb-free respectively.

The total contact time of successive solder waves must not exceed 5 seconds.

The device may be mo un te d up to the sea tin g pla ne , bu t the tem p er ature of the

plastic body must not exceed the specified maximum storage temperature (Tstg(max)).

If the printed-circuit board has been pre-heated, forced cooling may be necessary

immediately after soldering to keep the temperature within the permissible limit.

17.3 Manual soldering

Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the

seating plane o r not mo re than 2 mm above it. If the tempera ture of the sold ering iron

bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit

temperature is between 300 and 400 °C, contact may be up to 5 seconds.

17.4 Package related soldering information

[1] For SDIP packages, the longitudinal axis must be parallel to the transport direction of the

printed-circuit board.

[2] For PMFP packages hot bar soldering or manual soldering is suitable.

Table 10: Suitab ility of throug h-hole mount IC p a ckages for dippin g and wave so ldering

methods

Package Solder ing method

Dipping Wave

DBS, DIP, HDIP, RDBS, SDIP, SIL suitable suitable[1]

PMFP[2] −not suitable

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 18 of 22

18. Revision history

Table 11: Revision history

Rev Date CPCN Description

02 000214 -Product specification; second version; supersedes initial version TDA8944J-01 of

14 April 1999 (9397 750 04881). Modifications:

•Table 1 on page 1: SVRR; Typ value 65 dB → added

•Figure 1 on page 2: Block diagram; pin numbers changed OUT2− → 14 and OUT2+ → 17

•Figure 2 on page 3: Pin configuration; pin numbers changed OUT2− → 14 and OUT2+ → 17

•Section 8 “Functional description”:

–Section 8.1 “Input configuratio n” on page 4 → added.

–Section 8.2 “Power amplifier” on page 5: ........, capable of delivering a peak output

current of 1.5 A → changed to 2 A.

–Section 8.2.1 “Output power measurement” on page 5 → added

–Section 8.2.2 “Headroom” on page 5 → added

•Section 8.3 “Mode selection”:

–Standby mode: VMODE >(V

CC −0.5 V) → changed to (VCC −0.5 V) < VMODE <V

CC; The

power consumption of the TDA8944J will be reduced to <0.18 mW → added.

–Mute mode: the DC level of the input and output pins remain on half the supply

voltage →added;

–2.5 V < VMODE <(V

CC −1.5 V) → changed to 3 V < VMODE <(V

CC −1.5 V)

–Section 8.3.1 “Switch-on and switch-off” on page 6

•Section 8.4 “Supply Voltage Ripple Rejectio n (SVRR)” on page 6 → added

•Section 8.5 “Built-in protection circuits” on page 6 → added

•Table 5 on page 7:

–Ptot value added 18 V

–VCC(sc) value added 15 V

•Table 6 on page 7:

–Rth(j-a) value added 40 K/W

–Rth(j-c) value 10 → changed to 6.9 K/W; condition ‘in free air’ → changed to ‘both channels

driven’

•Table 7 on page 7: VMODE - mute mode - value Min 2.5 → changed to 3 V

•Table 8 on page 8:

–SVRR; Typ values 65 and 60 dB → added

–αcs; Typ value 75 dB → added

•Figure 3 to 13: figures added

•Section 13 “Internal circuitry” on page 12: → added

•Figure 14: figure adjusted

•Section 14.1 “Printed-circuit board (PCB)” on page 13: → added

•Figure 15: figure added

•Section 14.2 “Thermal behaviour and heatsink calculation” on page 15: → added

•Section 15.2 “Test conditions” on page 15: → added

01 990414 -Preliminary specification; initial version.

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 19 of 22

19. Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of devi ce(s) de scrib ed in thi s docum ent may h ave cha nged sin ce thi s docum ent was pu blishe d and may di f fer in case of multiple devices. Th e latest p roduct sta tus

information is available on the Internet at URL http://www.nxp.com.

20. Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included here in and shall have no liability for the consequences of

use of such infor m ation.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product ty pe number(s) and title. A short dat a sheet is in tended

for quick reference only and should not be relied upo n to cont a in det ai led and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

21. Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such in formation.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation -

lost profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconducto rs’ aggreg ate and cumulative lia bility towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liability for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/o r use is at the custo mer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use witho ut f ur th e r testing or mod i fi c ation.

Customers are responsible for the design and operation of their applications

and products using NXP Semiconductors products, and NXP

Semiconductors accepts no liability for any assistance with applications or

customer product design. It is customer’s sole responsibility to determine

whether the NXP Semiconductors product is suitable and fit for the

customer’s applications and products planned, as well as for the planned

application and use of customer ’s third party customer(s). Customers should

provide appropriate design and operating safeguards to minimize the risks

associated with their applications and products.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Terms and conditions of commer cial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights , patents

or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from nation al authorities.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Document status[1] [2] Product status[3] Definition

Objective [short] data sheet Development This document contain s data from the objective specification for product development.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 20 of 22

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,

the product is not suitable for automotive use. It is neither qualified nor tested

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclusion and/or use of

non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and standards,

customer (a) shall use the product without NXP Semiconductors’ warranty of

the product for such automotive applications, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, damages or failed product claims resulting from customer design and

use of the product for automotive applications beyond NXP Semiconductors’

standard warrant y and NXP Semiconductors’ product specifications.

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

Product specification Rev. 02 — 14 February 2000 21 of 22

NXP Semiconductors

provides High Performance Mixed Signal and Standard Product solutions

that leverage its leading RF, Analog, Power Management, Interface, Security

and Digital Processing expertise

Customer notification

This data sheet was changed to reflect the new company name NXP Semiconductors, including new

legal definitions and disclaimers. No changes were made to the tech nical content, except for package

outline drawings which were updated to the latest version.

Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

All rights are reserved. Reproduction in whole or in part is prohibited without the prior

written consent of the copyright owner.

The information presented in this document does not form part of any quotation or

contract, is believed to be accurate and reliable and may be changed without notice. No

liability will be accepted by the publisher for any consequence of its use. Publication

thereof does not convey nor imply any license under patent- or other industrial or

intellectual property rights.

Date of release: 14 February 2000 Document order number: 9397 750 06861

Contents

NXP Semiconductors TDA8944J

2 x 7 W stereo BTL aud io amp lif ie r

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1

5 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2

7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

8 Functional description . . . . . . . . . . . . . . . . . . . 4

8.1 Input configuration . . . . . . . . . . . . . . . . . . . . . . 4

8.2 Power amplifier. . . . . . . . . . . . . . . . . . . . . . . . . 5

8.2.1 Output power measurement. . . . . . . . . . . . . . . 5

8.2.2 Headroom. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

8.3 Mode selection . . . . . . . . . . . . . . . . . . . . . . . . . 5

8.3.1 Switch-on and switch-off. . . . . . . . . . . . . . . . . . 6

8.4 Supply Voltage Ripple Rejection (SVRR). . . . . 6

8.5 Built-in protection circuits . . . . . . . . . . . . . . . . . 6

8.5.1 Short-circuit protection . . . . . . . . . . . . . . . . . . . 6

8.5.2 Thermal shutdown protection . . . . . . . . . . . . . . 6

9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7

10 Thermal characteristics . . . . . . . . . . . . . . . . . . 7

11 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7

12 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8

13 Internal circuitry. . . . . . . . . . . . . . . . . . . . . . . . 12

14 Application information. . . . . . . . . . . . . . . . . . 13

14.1 Printed-circuit board (PCB). . . . . . . . . . . . . . . 13

14.1.1 Layout and grounding. . . . . . . . . . . . . . . . . . . 13

14.1.2 Power supply decoupling . . . . . . . . . . . . . . . . 14

14.2 Thermal behaviour and heatsink calculation . 15

15 Test information. . . . . . . . . . . . . . . . . . . . . . . . 15

15.1 Quality information . . . . . . . . . . . . . . . . . . . . . 15

15.2 Test conditions . . . . . . . . . . . . . . . . . . . . . . . . 15

16 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16

17 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

17.1 Introduction to soldering through-hole mount

packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

17.2 Soldering by dippi ng or by solder wave . . . . . 17

17.3 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 17

17.4 Package related soldering information . . . . . . 17

18 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 18

19 Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 19

20 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

21 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19