BlueCore 2-External Product Data Sheet
TM
BC212015-ds-001b
Product Data Sheet
Pre-Production Information
Description of Functional Blocks
Radio Transceiver and Synthesiser
The receiver features a near-zero IF architecture that
allows the channel filters to be integrated on to the die.
Sufficient out-of-band blocking specification at the LNA
input allows the radio to be used in close proximity to
GSM and W-CDMA cellular phone transmitters without
being de-sensitised. The use of a digital FSK
discriminator means that no discriminator tank is
needed and its excellent performance in the presence
of noise allows BlueCore2-External to exceed the
Bluetooth requirements for co-channel and adjacent
channel rejection. Fast AGC is implemented by
measuring the RSSI on a slot-by-slot basis and
adjusting the front-end LNA gain to keep the first mixer
input signal within a limited range. This improves the
dynamic range of the receiver in interference-limited
environments.
The transmitter features a direct IQ modulator to
minimise the frequency drift during a transmit timeslot
and results in a well controlled modulation index. A
digital baseband transmit filter provides the required
spectral shaping.
The maximum transmit power of +7dBm allows
BlueCore2-External to be used in Class 2 and Class 3
radios and its support for transmit power control allows
a simple implementation for Class 1 with an external
RF power amplifier.
The radio synthesiser is fully integrated with no
requirement for an external VCO screening can,
varactor tuning diodes or LC resonators.
The radio has several built-in automatic calibration
routines to maintain the radio performance within
specification across temperature and ageing. No LNA ,
PA or TX/RX switch is required for Class 2 operation
aross the device’s full operating temperature range.
Auxiliary Features
The device contains two clock sources: one reference
oscillator for the RF carrier frequency and one low
frequency clock oscillator that is used as an interval
timer during sleep modes, i.e., Sniff, Hold or Park.
The reference oscillator requires an external crystal.
Alternatively, the crystal terminals can be driven from
an external reference clock.The reference frequency
can be in the range of 8-32MHz in multiples of
250kHz.
The low frequency clock oscillator requires no external
components. It is calibrated automatically and
maintains an accuracy of better than 250ppm. This
oscillator consumes less than 2µA and is permanently
enabled.
Physical Layer DSP Hardware Engine
Dedicated logic is used for forward error correction,
header error control, cyclic redundancy check,
encryption, data whitening, access code correlation
and audio transcoding to translate between A-law, µ-
law and linear voice data from the host and A-law,
µ-law and Continuously Variable Slope Delta (CVSD)
voice data over the air, voice interpolation for lost
packets and rate mismatches are performed by the
software.
Burst Mode Controller
During radio transmission the Burst Mode Controller
(BMC) constructs a packet from header information
previously loaded into memory-mapped registers by
the software and payload data/voice taken from the
appropriate ring buffer in RAM. During radio
receptions, the burst mode controller stores the packet
header in memory-mapped registers and the payload
data in the appropriate ring buffer in RAM. This
architecture minimises the intervention required by the
processor during transmission and reception.
Microcontroller, Interrupt Controller and
Event Timer
The microcontroller, interrupt controller and event timer
run the Bluetooth software stack and control the radio
and host interfaces. A 16-bit RISC microcontroller is
used for low power consumption and efficient use of
memory.
Memory Management Unit
The memory management unit provides a number of
dynamically allocated ring buffers that hold the data
which is in transit between the host and the air or vice
versa. The dynamic allocation of memory ensures
efficient use of the available RAM and is performed by
a hardware memory management unit to minimise the
overheads on the processor during data/voice
transfers.
RAM
32Kbytes of on-chip RAM is provided and is shared
between the ring buffers used to hold voice/data for
each active connection and the general purpose
memory required by the Bluetooth stack.
ROM
Up to 8Mbits of external Flash or masked programmed
ROM (16 bit data words) can be attached giving
maximum flexibility for running complete applications
on chip. The ROM can be programmed over the
synchronous serial/UART or USB interfaces after the
device is mounted in the target application.
Description of Functional Blocks
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