Product Data Sheet Device Features BlueCore 2-External Low power 1.8V operation TM Small footprint in 96-Ball VFBGA Package (6x6mm) Single Chip Bluetooth System Fully qualified Bluetooth component Full speed class 2 Bluetooth operation with full 7 slave piconet support Support for 8Mbit external Flash October 2001 TM Minimum external components Operates over full industrial temperature T 105C) range (-40 General Description Applications BlueCore2-External is a single chip radio and baseband IC for Bluetooth 2.4GHz radios implemented in CMOS technology. PC Notebooks When used with external ROM containing the CSR Bluetooth software stack, it provides a fully compliant Bluetooth system for data and voice communications. Cellular Handsets Cordless Headsets Personal Digital Assistants (PDAs) Computer Accessories (Compact Flash, PCMCIA and SD cards) 8Mbit FLASH ROM The design is optimised to require few external RF components to facilitate rapid design of the application printed circuit board and therefore the fastest possible time to market and lowest overall cost. SPI RAM RF IN UART/USB 2.4 GHz Radio DSP RF OUT Included in the device are autocalibration and built-inself-test (BIST) routines to simplify development, type approval and production test. All hardware and device firmware is fully compliant with the Bluetooth specification. I/O PIO P PCM XTAL Figure 1: BlueCore2-External System Architecture BC212015-ds-001b BlueCore 2-External Product Data Sheet 0.18m CMOS technology Pre-Production Information Data Sheet BC212013A (UART only version) BC212015A (USB and UART version) Pre-Production Information Product Data Sheet Key Features Key Features Radio Baseband and Software No external trimming is required in production External 8Mbit Flash ROM for complete system solution and application flexibility Extensive built-in-self-test minimises end product final test time Full RF reference designs are available Transmitter Supports Class 2 and Class 3 radios without the need for an external power amplifier or TX/RX switch Supports Class 1 radios with an external power amplifier provided by a power control terminal controlled by an internal 8-bit voltage DAC and by control of an external RF TX/RX switch Receiver Dedicated logic for forward error correction, header error control, access code correlation, demodulation, cyclic redundancy check, encryption bitstream generation, whitening and transmit pulse shaping Trancoders for A-law, -law and linear voice from host and A-law, -law and CVSD voice over air Physical Interfaces Synchronous serial interface up to 4Mbaud for software debugging UART interface with programmable baud rate up to 1.5Mbaud Full speed USB interface supports OHCI and UHCI compliant with USB v1.1 Integrated channel filters Synchronous bidirectional serial programmable audio interface Digital demodulator for better sensitivity and cochannel rejection Optional I2C compatible interface Digitised RSSI available in real time over the HCI Fast AGC for enhanced dynamic range Synthesiser Bluetooth Stack Running on Internal Microcontroller CSR's Bluetooth Protocol Stack runs on-chip in a variety of configurations: Fully integrated synthesiser: no external VCO varactor diode or resonator Standard HCI (UART or USB) Compatible with crystals between 8 and 32MHz (in multiples of 250kHz), or an external clock Fully embedded to RFCOMM, thus reducing host CPU load Auxiliary Features Stand-alone single chip (no host) including virtual machine (VM) programming environment, for instance for headsets and PC peripherals Crystal oscillator with built-in digital trimming Power management includes digital shut down and wake up commands and an integrated low power oscillator for ultra-low Park/Sniff/Hold mode power consumption Device can be used with an external master oscillator and provides a `clock request signal' to control external clock source Page 2 of 21 More information on the CSR Bluetooth Software Stack and software development tools is available in separate documentation from CSR. Package Options 96-Ball VFBGA 8x8x1.0mm 0.65mm Pitch 96-Ball VFBGA 6x6x1.0mm 0.5mm Pitch Pre-Production Information BC212015-ds-001b TM Up to +4dBm RF transmit power with level control from the on-chip 6-bit DAC over a dynamic range greater than 30dB 32Kbyte on-chip RAM allows full speed Bluetooth data transfer, mixed voice and data, plus full 7 slave piconet operation BlueCore 2-External Product Data Sheet Operation with common TX/RX terminals simplifies external matching circuitry and eliminates external antenna switch BC212015-ds-001b Pre-Production Information PIO[1] / TXEN AUX DAC PA -45 IQ MOD RF Transmitter +45 RSSI Tune Fref /N/N+1 DAC ADC Demodulator RF synthesiser RF Synthesiser VDD_VCO AUX_DAC TX_B TX_A XTAL_IN IQ DEMOD XTAL_OUT RF Receiver LNA Memory management unit Event timer Microcontroller RISC micro-controller Baseband and Logic Burst mode controller Interrupt controller Physical layer hardware engine DSP VDD_CORE TM VDD_ANA RF_IN VDD_MEM Clock generation USB Programmable I/O External Memory Driver Audio PCM Interface UART Synchronous Serial Interface VDD_PADS 16 19 VSS_PIO AIO[0] AIO[1] AIO[2] VSS_PADS TEST_EN VSS_MEM VSS_CORE VSS_ANA LOOP_FILTER VSS_VCO BlueCore 2-External Product Data Sheet PIO(0)/RXEN Memory mapped control/ status RESET RAM PIO[2]/USB_PULL_UP PIO[3]/USB_WAKE_UP PIO[4]/USB_ON PIO[5]/USB_DETACH PIO[6]/CLK_REQ PIO[7]/RAM_CSB PIO[8] PIO[9] PIO[10] PIO[11] VDD_PIO D[15:0] A[18:0] WEB REB CSB PCM_CLK PCM_SYNC PCM_OUT PCM_IN UART_CTS UART_RTS UART_RX UART_TX SPI_MISO SPI_MOSI SPI_CLK SPI_CSB USB_D- USB_D+ Product Data Sheet Device Diagram Device Diagram VSS_RADIO VDD_RADIO Figure 2: BlueCore2-External Device Diagram Page 3 of 21 Product Data Sheet Device Pinout Diagram Device Pinout Diagram(2) Orientation from top of device VSS_PIO USB_WAKE _UP PIO[0] / RXEN VDD_RADIO RF_IN PIO[1] / TXEN AUX_DAC VSS_RADIO SPI_CSB SPI_MOSI USB_D-(1) USB_D+ (1) VDD_CORE PIO[2] / (1) USB_PULL_UP SPI_MISO SPI_CLK UART_CTS UART_RTS PIO[6] / CLK_REQ PIO[9] PIO[10] PIO[11] VSS PCM_CLK VSS_CORE VDD_PADS PCM_IN PCM_SYNC UART_RX CSB VSS_MEM PIO[8] A[0] REB VDD_MEM PIO[7] / RAM_CSB A[1] WEB A[2] UART_TX PCM_OUT VSS_PADS TX_B VSS_RADIO RESET A[3] A[4] A[5] TX_A VSS_RADIO TEST_EN A[6] A[7] A[8] VDD_VCO VSS_VCO VDD_RADIO A[9] A[10] A[11] LOOP_FILTER VSS_VCO VDD_ANA VSS_ANA XTAL_IN XTAL_OUT D[14] D[11] D[8] D[5] A[12] A[13] A[14] A[15] AIO[0] D[15] D[12] D[9] D[6] D[0] A[16] A[17] A[18] VSS_ANA AIO[1] D[13] D[10] D[7] D[4] D[1] D[2] D[3] AIO[2] Note: (1) (2) USB functions are available on BC212015A only. Device pinout diagram is the same for both 8x8x1mm package (DN) and 6x6x1mm package (EN). Figure 3: BlueCore2-External Device Pinout Page 4 of 21 Pre-Production Information BC212015-ds-001b TM PIO[4] / USB_ON (1) PIO[3] / (1) PIO[5] / (1) USB DETACH BlueCore 2-External Product Data Sheet VDD_PIO Product Data Sheet Device Terminal Functions Device Terminal Functions Terminal Name Pad Type Ball Description Radio RF_IN E1 Single ended receiver input PIO[1] / TXEN Bidirectional with weak internal pull-up/down C2 Control output for external PA Class 1 only (=PIO[1]) PIO[0] / RXEN Bidirectional with weak internal pull-up/down C1 Control output for external LNA (if fitted) (=PIO[0]) TX_A Analog G1 Transmitter output/Switched Receiver input TX_B Analog F1 Complement of TX_A AUX_DAC Analog D2 Voltage DAC output XTAL_IN Analog L1 For crystal or external clock input XTAL_OUT Analog L2 Drive for crystal LOOP_FILTER Analog J1 Connection to external PLL loop filter REB CMOS output, tristatable with internal weak pull-up D10 Read enable for external memory (active low) WEB CMOS output, tristatable with internal weak pull-up E10 Write enable for external memory (active low) CSB CMOS output, tristatable with weak internal pull-up C10 Chip select for external memory (active low) A[18:0] CMOS output (1) Address lines D[15:0] Bidirectional with weak internal pull-down (1) Data bus CMOS output, tristatable with weak internal pull-down B9 Synchronous data output PCM_IN CMOS input with weak internal pull-down B10 Synchronous data input PCM_SYNC Bidirectional with weak internal pull-down B11 Synchronous data strobe PCM_CLK Bidirectional with weak internal pull-down B8 Synchronous data clock UART_TX CMOS output C8 UART data output UART_RX CMOS input with weak internal pull-down C9 UART data input UART_RTS CMOS output, tristatable with internal weak pull-up B7 UART ready to send UART_CTS CMOS input with weak internal pull-down B6 UART clear to send Synthesiser and Oscillator TM External Memory Port PCM Interface PCM_OUT USB and UART USB_D+ (2) Bidirectional A7 USB data plus USB_D- (2) Bidirectional A6 USB data minus Note: (1) (2) See Address and Data Bus tables at the end of this section. These terminals are available on BC212015A only. BC212015-ds-001b Pre-Production Information BlueCore 2-External Product Data Sheet Analog Page 5 of 21 Product Data Sheet Terminal Name Device Terminal Functions Pad Type Ball Description Test and Debug F3 Reset if high SPI_CSB CMOS input with weak internal pull-up A4 Chip select for Synchronous Serial Interface SPI_CLK CMOS input with weak internal pull-down B5 Synchronous Serial Interface Clock SPI_MOSI CMOS input with weak internal pull-down A5 Synchronous Serial Interface data input SPI_MISO CMOS output, tristatable with weak internal pull-down B4 Synchronous Serial Interface data output TEST_EN CMOS input with strong internal pull-down G3 For test purposes only (leave unconnected) PIO[2] /USB_PULL_UP (1) Bidirectional with programmable weak internal pull-up/down B3 PIO or USB pull-up (via 1.5k resistor to USB_D+) PIO[3] /USB_WAKE_UP (1) Bidirectional with programmable weak internal pull-up/down B2 PIO or Output goes high to wake up PC when in USB mode PIO[4] /USB_ON Bidirectional with programmable weak internal pull-up/down B1 PIO or USB on (input senses when VBUS is high, wakes BlueCore2-External) Bidirectional with programmable weak internal pull-up/down A3 PIO line or chip detaches from USB when this input is high PIO[6] / CLK_REQ Bidirectional with programmable weak internal pull-up/down C3 PIO line or clock request for external clock line PIO[7] / RAM_CSB Bidirectional with programmable weak internal pull-up/down E3 Programmable Input/Output line PIO[8] Bidirectional with programmable weak internal pull-up/down D3 Programmable Input/Output line PIO[9] Bidirectional with programmable weak internal pull-up/down C4 Programmable Input/Output line PIO[10] Bidirectional with programmable weak internal pull-up/down C5 Programmable Input/Output line PIO[11] Bidirectional with programmable weak internal pull-up/down C6 Programmable Input/Output line AIO[0] Bidirectional K3 Programmable Input/Output line AIO[1] Bidirectional L4 Programmable Input/Output line AIO[2] Bidirectional J3 Programmable Input/Output line TM CMOS input with weak internal pull-down PIO Port (1) PIO[5] / USB_DETACH (1) Note: (1) USB functions are available on BC212015A only. Page 6 of 21 BlueCore 2-External Product Data Sheet RESET Pre-Production Information BC212015-ds-001b Product Data Sheet Device Terminal Functions Power Supplies and Control D1, H3 Positive supply connection for RF circuitry VDD_VCO VDD H1 Positive supply for VCO and synthesiser circuitry VDD_ANA VDD K1 Positive supply for analogue circuitry VDD_CORE VDD A8 Positive supply for internal digital circuitry VDD_PIO VDD A1 Positive supply for PIO & AUX DAC VDD_PADS VDD A10 Positive supply for all other Input/Output VDD_MEM VDD D11 Positive supply for external memory port & AIO VSS_RADIO VSS E2, F2,G2 Ground connections for RF circuitry VSS_VCO VSS J2, H2 Ground connections for VCO and synthesiser VSS_ANA VSS L3, K2 Ground connections for analogue circuitry VSS_CORE VSS A9 Ground connection for internal digital circuitry VSS_PIO VSS A2 Ground connection for PIO & AUX DAC VSS_PADS VSS A11 Ground connection for Input/Output except memory port VSS_MEM VSS C11 Ground connection for external memory port VSS VSS C7 Ground connection for internal package shield Address Lines Data Bus Terminal Ball Terminal Ball A[0] D9 D[0] K8 A[1] E9 D[1] L9 A[2] E11 D[2] L10 A[3] A[4] F9 F10 D[3] D[4] L11 L8 A[5] F11 D[5] J7 A[6] G9 D[6] K7 A[7] G10 D[7] L7 A[8] A[9] G11 H9 D[8] J6 D[9] K6 A[10] H10 D[10] L6 A[11] H11 D[11] J5 A[12] J8 D[12] K5 A[13] J9 D[13] L5 A[14] J10 D[14] J4 A[15] J11 D[15] K4 A[16] K9 A[17] K10 A[18] K11 BC212015-ds-001b Pre-Production Information Page 7 of 21 TM VDD BlueCore 2-External Product Data Sheet VDD_RADIO Product Data Sheet Electrical Characteristics Electrical Characteristics Absolute Maximum Ratings Min Max Storage Temperature -40C +105C -0.4V 1.9V -0.4V 3.6V VSS-0.4V VDD+0.4V Supply Voltage: VDD_RADIO, VDD_VCO, VDD_ANA, VDD_CORE Supply Voltage: VDD_PADS, VDD_PIO, VDD_MEM Other Terminal Voltages (except 5V tolerant) Recommended Operating Conditions Min Max Operating Temperature range -40C 105C 1.70V 1.90V 1.70V 3.60V Supply Voltage: VDD_RADIO, VDD_VCO, VDD_ANA, VDD_CORE Supply Voltage: VDD_PADS, VDD_PIO, VDD_MEM TM Operating Condition Input/Output Terminal Characteristics VDD_CORE, VDD_RADIO, VDD_VCO and VDD_ANA are at 1.8V unless shown otherwise VDD_PADS, VDD_PIO and VDD_MEM are at 3.0V unless shown otherwise Digital Terminals Min Typ Max Unit -0.4 -0.4 0.7VDD - +0.8 +0.4 VDD+0.4 V V V +10 -5 -5 -1 - +200 -1 -1 +5 A A A A VDD-0.2 VDD-0.4 - 0.2 0.4 - V V V V Tri-state Leakage Current (See input current except for) SPI_MISO, PCM_OUT, UART_RTS CSB, WEB, REB: (VDD=3.0V) (VDD=1.8V) -1 -1 - +5 +2 A A CI Input Capacitance 2.5 - 10 pF Input Voltage VIL input logic level low (VDD=3.0V) (VDD=1.8V) VIH input logic level high Input Current TEST_EN input high IIH SPI_CSB input low IIL PIO with pull up selected input low IIL All other inputs, in any state II (0VVIN<VDD) Output Voltage VOL output logic level low, (IO = 4.0mA), VDD=3.0V VOL output logic level low, (IO = 4.0mA), VDD=1.8V VOH output logic level high, (IO = 4.0mA), VDD=3.0V VOH output logic level high, (IO = 4.0mA), VDD=1.8V Note: Current drawn into a pin is defined as positive, current supplied out of a pin is defined as negative. Page 8 of 21 Pre-Production Information BlueCore 2-External Product Data Sheet Rating BC212015-ds-001b Product Data Sheet Electrical Characteristics Input/Output Terminal Characteristics (continued) Power-on Reset Min Typ Max Unit 1.4 1.6 0.2 - V V V USB Terminals Min Typ Max Unit 0.7VDD_PADS - 0.3VDD_PADS - V V Input leakage current, VSS_PADS<VIN<VDD_PADS -1 - 1 A CI Input Capacitance 2.5 - 10 pF Output levels to correctly terminated USB cable VOL output logic level low VOH output logic level high 0 2.8 - 0.2 VDD_PADS V V Min Typ Max Unit 8 bits mV VDD_PIO +0.2 0.2 VDD_PIO +1 V mA V V A Input threshold VIL input logic level low VIH input logic level high Auxiliary DAC Resolution Output Step Size 13 Output voltage Voltage range (IO = 0) Current range Minimum output voltage (IO = 200A) Maximum output voltage (IO = -10mA) Tristate leakage current VSS_PIO -10 0 VDD_PIO-0.3 -1 Accuracy Gain Error Offset Linearity Settling Time (50pF load) Crystal Oscillator Crystal frequency (1) Digital trim range (1) (2) Trim step size (2) Negative tranconductance 5% 3 Monotonic 5 LSB s Min Typ Max Unit 8.0 - 32.0 MHz 5 6.2 8 pF - 0.1 - pF 2.0 - - mS Note: Integer multiple of 250kHz. The difference between the local capacitance at minimum and maximum settings of the internal digital trim.The same setting of the digital trim is applied to both XTAL_IN and XTAL_OUT. (1) (2) Current drawn into a pin is defined as positive, current supplied out of a pin is defined as negative. BC212015-ds-001b Pre-Production Information Page 9 of 21 TM - BlueCore 2-External Product Data Sheet VDD falling threshold VDD rising threshold Hysteresis Product Data Sheet Electrical Characteristics Radio Characteristics VDD = 1.8V Temperature = 20C Frequency=2.441GHz Receiver Min Typ Max Bluetooth Specification Unit - -70 dBm Maximum received signal at 0.1% BER(1) - -5.0 - -20 dBm C/I Co-channel - 9 - 11 dB - -2.0 - 0 dB - -34 - -30 dB - -43 - -40 dB - -12 - -9 dB - -30 - -39 dBm - -7 - - dBm - dBm (1) Adjacent channel selectivity C/I 1MHz (1) 2nd adjacent channel selectivity C/I 2MHz (1) 3rd adjacent channel selectivity C/I 3MHz Image rejection C/I (1) (2) (1) (3) Maximum level of intermodulation interferers Maximum level of GSM signal at 1.8GHz (1) (4) (5) Maximum level of W-CDMA signal at 1.8GHz (5) - -9.5 - Maximum level of W-CDMA signal at 2.2GHz (5) - -11 - Transmitter Min Typ Max Maximum RF transmit power (1) - RF power control range - dBm Bluetooth Specification Unit 7.0 - -6 to +4 dBm - 30 - 16 dB - 2.0 - - dB 20dB bandwidth for modulated carrier - 900 - 1000 kHz 2nd adjacent channel transmit power - -52 - -20 dBm - -57 - -40 dBm (1) RF power range control resolution 3rd adjacent channel transmit power (1) (1) Notes: Measured according to the Bluetooth specification. Up to five spurious responses within Bluetooth limits are allowed. (3) At carrier -3MHz. (4) Measured at f1-f2=5MHz. (5) For 0.1% BER with wanted input at -67dBm, and with the RF filter removed from the circuit. (1) (2) Results shown are referenced to input of the RF balun. Current Consumption(1) VDD = 1.8V Temperature = 20C Mode Avg Peak Unit SCO connection HV3 (1s interval sniff mode) (Slave) 28 - mA SCO connection HV3 (1s interval sniff mode) (Master) 28 - mA SCO connection HV1 (Slave) 53 - mA SCO connection HV1 (Master) 53 - mA ACL data transfer 115.2kbps UART (Master) 15 - mA ACL data transfer 720kbps USB (Slave) 61 - mA ACL data transfer 720kbps USB (Master) 61 - mA ACL connection, Sniff Mode 40ms interval, 38.4kbps UART 4 - mA ACL connection, Sniff Mode 1.28s interval, 38.4kbps UART 0.5 - mA Parked Slave, 1.28s beacon interval, 38.4kbps UART 0.6 - mA Deep Sleep Mode 15 - A Peak RF current during RF burst 80 - mA Note: Current consumption is for BC212015A and includes current supplied to external 3V Flash ROM. 1.8V Flash ROM will further reduce this figure. (1) Page 10 of 21 Pre-Production Information BC212015-ds-001b TM -85 (1) BlueCore 2-External Product Data Sheet - Sensitivity at 0.1% BER Product Data Sheet Description of Functional Blocks Description of Functional Blocks Physical Layer DSP Hardware Engine Radio Transceiver and Synthesiser The maximum transmit power of +7dBm allows BlueCore2-External to be used in Class 2 and Class 3 radios and its support for transmit power control allows a simple implementation for Class 1 with an external RF power amplifier. The radio synthesiser is fully integrated with no requirement for an external VCO screening can, varactor tuning diodes or LC resonators. The radio has several built-in automatic calibration routines to maintain the radio performance within specification across temperature and ageing. No LNA , PA or TX/RX switch is required for Class 2 operation aross the device's full operating temperature range. Auxiliary Features The device contains two clock sources: one reference oscillator for the RF carrier frequency and one low frequency clock oscillator that is used as an interval timer during sleep modes, i.e., Sniff, Hold or Park. The reference oscillator requires an external crystal. Alternatively, the crystal terminals can be driven from an external reference clock.The reference frequency can be in the range of 8-32MHz in multiples of 250kHz. The low frequency clock oscillator requires no external components. It is calibrated automatically and maintains an accuracy of better than 250ppm. This oscillator consumes less than 2A and is permanently enabled. BC212015-ds-001b Burst Mode Controller During radio transmission the Burst Mode Controller (BMC) constructs a packet from header information previously loaded into memory-mapped registers by the software and payload data/voice taken from the appropriate ring buffer in RAM. During radio receptions, the burst mode controller stores the packet header in memory-mapped registers and the payload data in the appropriate ring buffer in RAM. This architecture minimises the intervention required by the processor during transmission and reception. Microcontroller, Interrupt Controller and Event Timer The microcontroller, interrupt controller and event timer run the Bluetooth software stack and control the radio and host interfaces. A 16-bit RISC microcontroller is used for low power consumption and efficient use of memory. Memory Management Unit The memory management unit provides a number of dynamically allocated ring buffers that hold the data which is in transit between the host and the air or vice versa. The dynamic allocation of memory ensures efficient use of the available RAM and is performed by a hardware memory management unit to minimise the overheads on the processor during data/voice transfers. RAM 32Kbytes of on-chip RAM is provided and is shared between the ring buffers used to hold voice/data for each active connection and the general purpose memory required by the Bluetooth stack. ROM Up to 8Mbits of external Flash or masked programmed ROM (16 bit data words) can be attached giving maximum flexibility for running complete applications on chip. The ROM can be programmed over the synchronous serial/UART or USB interfaces after the device is mounted in the target application. Pre-Production Information Page 11 of 21 TM The transmitter features a direct IQ modulator to minimise the frequency drift during a transmit timeslot and results in a well controlled modulation index. A digital baseband transmit filter provides the required spectral shaping. Dedicated logic is used for forward error correction, header error control, cyclic redundancy check, encryption, data whitening, access code correlation and audio transcoding to translate between A-law, law and linear voice data from the host and A-law, -law and Continuously Variable Slope Delta (CVSD) voice data over the air, voice interpolation for lost packets and rate mismatches are performed by the software. BlueCore 2-External Product Data Sheet The receiver features a near-zero IF architecture that allows the channel filters to be integrated on to the die. Sufficient out-of-band blocking specification at the LNA input allows the radio to be used in close proximity to GSM and W-CDMA cellular phone transmitters without being de-sensitised. The use of a digital FSK discriminator means that no discriminator tank is needed and its excellent performance in the presence of noise allows BlueCore2-External to exceed the Bluetooth requirements for co-channel and adjacent channel rejection. Fast AGC is implemented by measuring the RSSI on a slot-by-slot basis and adjusting the front-end LNA gain to keep the first mixer input signal within a limited range. This improves the dynamic range of the receiver in interference-limited environments. Product Data Sheet CSR Bluetooth Software Stack CSR Bluetooth Software Stack BlueCore2-External is supplied with Bluetooth stack firmware that runs on its microcontroller and is resident in the external Flash memory. The stack occupies 4Mbits of storage. Piconets: up to seven slaves. Power Saving: Hold, Sniff and Park Audio: full support for SCO Role Switch: can reverse master/slave relationship Device Firmware Upgrade BlueCore2-External is supplied with boot loader software which implements a standard Device Firmware Upgrade (DFU) capability. This allows new firmware to be uploaded to the external Flash memory through BlueCore2-External's UART/USB ports. Application Specific Software Development Environment Firmware supplied with BlueCore2-External contains a protected user software execution environment as a Virtual Machine (VM). The user may write custom application code to run on the BlueCore VM using the BlueLab software development kit, available separately from CSR. This code will then execute alongside the main BlueCore firmware. The user is able to make calls to the BlueCore firmware for various operations. The execution environment is structured so the user application does not adversely affect the main software routines, thus ensuring that the Bluetooth stack software component does not need requalification when the application is changed. Using the VM and BlueLab, the user is able to develop applications such as a cordless headset or other profiles without the requirement of a host controller. BlueLab is supplied with example code, including a full implementation of the headset profile. Additional Software for Host Implementation A companion device, BlueCore2-PC can be ordered which includes software for a full Windows 98/ME or Windows 2000 Bluetooth host-side stack and application together with the IC hardware described in this datasheet. Contact CSR for more details. Additional Software for Other Embedded Applications When the upper layers of the Bluetooth protocol stack are run as firmware on BlueCore2-External a UART software driver is supplied that presents the HCI, L2CAP, RFCOMM and Service discovery APIs to higher Bluetooth stack layers running on the host. The code is provided as `C' source or object code. Other software drivers can be developed on request. Contact CSR Sales for more information. Casira Development System This is available to allow the evaluation of BlueCore2External hardware and software and as the base of a toolkit for developing host software. Contact CSR Sales for more information. Page 12 of 21 Pre-Production Information BC212015-ds-001b TM Data integrity: Channel Quality Driven Data Rate (CQDDR) and RSSI The supplied software stack is a full implementation of Bluetooth up to and including HCI, so all profiles and associated applications are supported. BlueCore 2-External Product Data Sheet The BlueCore Stack Software is compliant with the Bluetooth v1.1 specification. It implements all the features described in the specification, including optional features. Profiles Supported Via HCI Product Data Sheet External Interfaces External Interfaces Transmitter/Receiver Inputs/Output Asynchronous Serial Data Port (UART) and USB Port UART_TX, UART_RX, UART_RTS, and UART_CTS form a conventional asynchronous data serial port. The interface is designed to operate correctly when connected to other UART devices such as the NS16550A. The signalling levels are 0V and VDD_PADS. The interface is programmable over a variety of bit rates; no, even or odd parity; one or two stop bits and hardware flow control on or off. The default condition on power-up is pre-assigned in the external Flash memory. The maximum UART data rate is 1.5Mbit/s. Two-way hardware flow control is implemented by UART_RTS and UART_CTS. UART_RTS is an output and is active low. UART_CTS is an input and is active low. These signals operate according to normal industry convention. The port carries a number of logical channels: HCI data (both SCO and ACL), HCI commands and events, L2CAP API, RFCOMM API, Service Discovery API and device management. For the UART, these are combined into a robust tunnelling protocol, BlueCore Serial Protocol (BCSP), where each channel has its own software flow control and cannot block other data channels. In addition, the Bluetooth specification part H4 format is supported. Alternatively a firmware version is available to support full speed (12Mbit/s) USB. USB_D+ and USB_D- are available on dedicated terminals. Both Open Host Controller Interface (OHCI) and Upper Host Controller Interfaces (UHCI) are supported. The firmware in Flash can be downloaded through this port by DFU if the CSR-supplied boot loader is first programmed. BC212015-ds-001b PCM_OUT, PCM_IN, PCM_CLK, PCM_SYNC carry up to three bidirectional channels of voice data, each at 8 ks/s. The format of the PCM samples can be 8-bit A-law, 8-bit -law, 13-bit linear or 16-bit linear. The PCM_CLK and PCM_SYNC terminals can be configured as inputs or outputs depending on whether BlueCore2-External is the master or slave of the PCM interface. BlueCore2-External interfaces directly to PCM audio devices such as the: Qualcomm MSM 3000 series and MSM 5000 series CDMA devices, OKI MSM7705 four channel /A-law codec, Motorola MC145481 8-bit /A-law codec, Motorola MC145483 13-bit linear codec and the Mitel MT93LI6 Echo cancelling codec. BlueCore2-External is also compatible with the Motorola SSI interface. TM Synchronous Serial Port BlueCore2-External is a slave device using terminals SPI_MOSI, SPI_MISO, SPI_CLK and SPI_CSB. This interface is used for program emulation/debug and IC test. It is also the means by which the external Flash ROM may be programmed `in situ' before any 'boot' program is loaded. The designer should be aware that no security protection is built into the hardware or firmware associated with this port. Parallel PIO Port Fifteen lines of programmable bidirectional I/O are provided. PIO[11:0] are powered from VDD_PIO and AIO[2:0] are powered from VDD_MEM. PIO[0] and PIO[1] are normally dedicated to TXEN and RXEN, but they are available for general use. Any of the PIO lines can be configured as interrupt request lines or as wake-up lines from sleep modes. PIO[6] can be configured as a request line for an external clock source. This is useful when the clock to BlueCore2External is provided from a system ASIC. I2C Interface PIO[3] and PIO[2] can be used to form a master I2C interface. The interface is formed using software to drive these lines and is thus suited only to relatively slow functions such as driving a dot matrix LCD display, a keyboard scanner or an EEPROM. Pre-Production Information Page 13 of 21 TM For Class 1 operation the RF_IN ball is provided, which is single-ended and presents a capacitive input. A swing of up to 0.5V rms can be tolerated at this terminal. An external antenna switch can be connected to RF_IN. PCM Codec Interface BlueCore 2-External Product Data Sheet Terminals TX_A and TX_B form a balanced current output. They require a DC connection to VDD and should be connected through a balun to the antenna. The output impedance is capacitive and remains constant irrespective of whether the transmitter is enabled or disabled. For Class 2 operation these terminals also act as differential receive input terminals with an internal TX/RX switch. Firmware shipped with BlueCore2-External includes security features to prevent misuse of this upgrade facility. Product Data Sheet Application Information Application Information Transmit and receive port impedances for 8x8x1mm package TX_A (Transmit Mode) 120 140 100 90 80 1.00 70 2.00 0.50 130 50 150 160 20 5.00 170 180 0.00 0.0 0.20 0.50 1.00 2.00 -2.00 -0.50 -120 -110 -1.00 -100 1.0 -90 -80 -70 0 -10 -170 0.20 0.50 120 130 140 90 80 1.00 -30 130 40 140 2.00 20 1.0 0 180 0.00 0.0 -10 -170 -30 -110 -2.00 -1.00 -100 -90 -80 -70 90 80 1.00 70 60 2.00 0.50 50 40 30 5.00 0.20 0.50 1.00 2.00 5.00 0 -10 -5.00 -20 -150 -50 -130 1: ZRTX_A(2402GHz) = (7.65 - j28.8) 2: ZRTX_A(2480GHz) = (7.65 - j27.2) -40 -2.00 -0.50 -120 1.0 -30 21 -140 1.0 20 10 -60 0.0 100 110 -160 -0.20 -40 -0.50 1.0 0.20 170 -5.00 -20 21 160 10 5.00 -160 -0.20 -120 -80 150 -170 -130 -90 -50 -60 -70 0.0 50 5.00 -140 -100 1.0 120 0.20 -150 -1.00 -110 1: ZTTX_B(2402GHz) = (13.9 - j22.8) 2: ZTTX_B(2480GHz) = (13.3 - j20.85) 170 1.00 -2.00 -0.50 -120 60 2.00 0.50 -5.00 -20 TX_B (Receive Mode) 70 0.50 0.20 0 -40 -130 30 180 0.00 0.0 5.00 -140 -50 150 160 2.00 -150 1.0 20 -10 TX_A (Receive Mode) 100 1.00 21 -160 -0.20 1: ZTTX_A(2402GHz) = (12.7 - j21.95) 2: ZTTX_A(2480GHz) = (12.7 - j20.75) 110 40 5.00 -60 0.0 50 10 -40 -130 2.00 0.20 180 0.00 0.0 -30 -140 60 30 170 -5.00 -20 -150 70 -110 -1.00 -100 -90 -80 -70 -50 -60 0.0 1.0 1: ZRTX_B(2402GHz) = (7.55 - j31.1) 2: ZRTX_B(2480GHz) = (7.45 - j28.8) Note: TX_A is in antiphase with TX_B. ZTTX_A, ZTTX_B are the output impedances of ports TX_A and TX_B with BlueCore2-External in transmit mode. ZRTX_A, ZRTX_B are the output impedances of ports TX_A and TX_B with BlueCore2-External in receive mode. Figure 4: TX_A and TX_B Transmit and Receive modes impedance data Page 14 of 21 Pre-Production Information BC212015-ds-001b TM 21 160 10 5.00 -170 -160 -0.20 80 150 30 0.20 90 1.00 0.50 140 40 100 110 120 60 BlueCore 2-External Product Data Sheet 130 110 TX_B (Transmit Mode) Product Data Sheet Application Information Typical Radio Performance 20 10 0 -10 BlueCore 2-External Product Data Sheet -20 dBm -30 -40 -50 -60 -70 -80 TM -90 -100 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 Temperature (C) Minimum allowed transmit power (Class 2) Minimum allowed sensitivity BlueCore2-External minimum detectable signal strength BlueCore2-External transmit power Note: Results obtained using CSRs evaluation circuit, see figure 9. Figure 5: Transmit power and receive sensitivity versus temperature 200 150 100 50 0 -50 -100 -150 -200 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 Notes: Results obtained using CSRs evaluation circuit, see figure 9. Transmit power: 7dBm. Data: complete DH5 packet including pre-amble. Temperature: 20C. Figure 6: Transmitter Eye Diagram BC212015-ds-001b Pre-Production Information Page 15 of 21 Product Data Sheet Application Information 10 0 (1) (1) -20 -30 (2) -40 (2) -50 -60 -70 2.433 2.435 2.437 2.439 2.441 2.443 2.445 2.447 2.449 2.451 Frequency (GHz) Notes: Maximum allowed adjacent channel power (f=f0 + 2MHz). Maximum allowed adjacent channel power (f=f0 + 3MHz). Measurement resolution bandwidth = 100kHz. Results obtained using CSR's evaluation circuit, see figure 9. Temperature: 20C. (1) (2) Figure 7: Wideband transmit spectrum 10 0 Power (dBm) -10 -20 (1) (1) -30 -40 -50 -60 2.4400 2.4405 2.4410 2.4415 2.4420 Frequency (GHz) Notes: Maximum allowed 20dB bandwidth. Measurement resolution bandwidth = 10kHz. Results obtained using CSR's evaluation circuit, see figure 9. Temperature: 20C. (1) Figure 8: Narrowband transmit spectrum Page 16 of 21 Pre-Production Information BC212015-ds-001b TM -80 2.431 BlueCore 2-External Product Data Sheet Power (dBm) -10 A B C 1 RF IN/OUT Z=50 GND GND GND GND PIN CON2 4 3 2 1 5 C17 4u7 IN C16 10n GND MDR741F GND OUT F1 VSUP 2 4 1 3 C18 47p 3 1 VIN CE 2 C15 4u7 5 T1 HHM-1517 VOUT U3 XC6204B182MR 1 L1 6n8 1V8 3 4 1V8 5 C2 2p2 C1 2p2 E1 3 L3 3n3 L2 3n3 C13 NF F1 G1 AUX_DAC D2 RX_IN C14 220p R2 180k TX_B TX_A AUX_DAC RX_IN 1V8 H3 D1 VDD_RADIO VDD_RADIO C4 47p 4 1V8 K1 VDD_ANA C5 10n 1V8 H1 VDD_VCO D 2 6 BYP 4 GND 2 TUNE J1 3 4 C6 47p VSUP C7 10n VSUP 5 C8 10n 1V8 R1 0R C9 10n VSUP BlueCore2-External (USB Version) BC212015A VSS VSS A8 F8 NC NC NC NC NC C1 C2 C4 D2 D3 2 5 D4 NC/A19 VSS_VCO1 H2 A_18 A_17 A_16 A_15 A_14 A_13 A_12 A_11 A_10 A_9 A_8 A_7 A_6 A_5 A_4 A_3 A_2 A_1 A_0 K11 K10 K9 J11 J10 J9 J8 H11 H10 H9 G11 G10 G9 F11 F10 F9 E11 E9 D9 C3 B2 F5 F4 F3 F1 F2 E4 E3 E1 E2 B1 B3 B4 A2 A1 A3 A4 A5 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 VSS_VCO2 VSS VSS_ANA2 VSS_RADIO VSS_RADIO VSS_RADIO VSS_CORE VSS_PADS VSS_PIO VSS_MEM J2 C7 L3 F2 G2 E2 A9 A11 A2 C11 A1 VDD_PIO A10 VDD_PADS A8 VDD_CORE D11 VDD_MEM L1 C10 3p3 XTAL_IN 6 XT1 16MHz TSX-8 C11 10p 6 L2 XTAL_OUT K2 VSS_ANA1 D_15 D_14 D_13 D_12 D11 D_10 D_9 D_8 D_7 D_6 D_5 D_4 D_3 D_2 D_1 D_0 K4 J4 L5 K5 J5 L6 K6 J6 L7 K7 J7 L8 L11 L10 L9 K8 F7 E6 E7 D6 C7 C6 B7 B6 E5 E8 D5 D8 C8 C5 B8 B5 VDDQ VDD U1 BC02 PIO_11 PIO_10 PIO_9 PIO_8 PIO_7 PIO_6 PIO_5 PIO_4 PIO_3 PIO_2 PIO_1 PIO_0 F6 D7 10 12 8 5 17 19 14 7 16 9 28 30 6 A4 B5 A5 B4 A7 A6 C9 C8 B6 B7 G3 K3 L4 F3 J3 7 C12 10n 29 1 3 15 13 18 11 B11 B8 B10 B9 2 4 27 26 24 25 22 20 23 21 R3 1k VSUP C6 C5 C4 D3 E3 C3 A3 B1 B2 B3 C2 C1 C3 100n 7 VSUP TEST_EN AIO_0 AIO_1 RST AIO_2 UART_RX UART_TX UART_CTS UART_RTS USB_DP USB_DN SPI_CSB SPI_CLK SPI_MOSI SPI_MISO PCM_SYNC PCM_CLK PCM_IN PCM_OUT SST39VF800-90-4CBK U2 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 CSB REB WEB C10 D10 E10 A6 A7 D1 Pre-Production Information CEB OEB WEB BC212015-ds-001b TM Figure 9: Evaluation circuit for BlueCore2-External module from which the data sheet test measurements were obtained Page 17 of 21 TO CASIRA GND GND GND TEST_A TEST_B RESET UART_RX UART_TX UART_CTS UART_RTS USB_DP USB_DN SPI_CSB SPI_CLK SPI_MOSI SPI_MISO PCM_SYNC PCM_CLK PCM_IN PCM_OUT PIO_7 PIO_6 PIO_5 PIO_4 PIO_3 PIO_2 PIO_1 PIO_0 3V15 3V15_PA CON1 BlueCore 2-External Product Data Sheet 1 8 8 A B C D Product Data Sheet Evaluation Circuit Product Data Sheet Package Dimensions Package Dimensions Top View Bottom View D D1 PIN 1 CORNER PIN A1 A A B C D D E E 10X e E1 E F F G G H H J J K K L BlueCore 2-External Product Data Sheet B C 2 3 4 5 6 7 8 9 11 10 11 10 9 8 7 6 5 4 3 2 TM L 1 1 Ob 1 DETAIL K 3 0.1 Z (A3) A (A2) SEE DETAIL K A1 Z 2 SEATING PLANE BC212015DN and BC212013DN DIM MIN MAX A 0.8 1 A1 0.2 0.3 b 0.45 REF 1 DIMENSION b IS MEASURED AT THE MAXIMUM SOLDER BALL DIAMETER PARALLEL TO DATUM PLANE Z. 2 DATUM Z IS DEFINED BY THE SPHERICAL CROWNS OF THE SOLDER BALLS. 3 PARALLELISM MEASUREMENT SHALL EXCLUDE ANY EFFECT OF MARK ON TOP SURFACE OF PACKAGE. 0.35 0.25 D 8 BSC E 8 BSC e 0.65 BSC D1 6.5 BSC E1 6.5 BSC 8x8x1mm VFBGA NOTES 0.22 REF A2 A3 VFBGA 96 BALLS 8X8X1mm (JEDEC MO-225) BC212015EN and BC212013EN DIM MIN MAX A 0.8 1 A1 0.2 0.3 b 0.45 REF D 6 BSC E 6 BSC e 0.5 BSC D1 5 BSC E1 5 BSC MM 6x6x1mm VFBGA 1 DIMENSION b IS MEASURED AT THE MAXIMUM SOLDER BALL DIAMETER PARALLEL TO DATUM PLANE Z. 2 DATUM Z IS DEFINED BY THE SPHERICAL CROWNS OF THE SOLDER BALLS. 3 PARALLELISM MEASUREMENT SHALL EXCLUDE ANY EFFECT OF MARK ON TOP SURFACE OF PACKAGE. 0.35 0.25 UNIT NOTES 0.22 REF A2 A3 0.08 Z VFBGA 96 BALLS 6X6X1mm (JEDEC MO-225) UNIT MM Figure 10: BlueCore2-External package dimensions Page 18 of 21 Pre-Production Information BC212015-ds-001b Product Data Sheet Ordering and Contact Information Ordering and Contact Information Package Interface Version Shipment Method BC212015ADN-E4 8x8x1mm USB and UART Tape and reel BC212015ADN-Y1 8x8x1mm USB and UART Tray (dry pack) BC212013ADN-E4 8x8x1mm UART only Tape and reel BC212013ADN-Y1 8x8x1mm UART only Tray (dry pack) BC212015AEN-E4 6x6x1mm USB and UART Tape and reel BC212015AEN-Y1 6x6x1mm USB and UART Tray (dry pack) BC212013AEN-E4 6x6x1mm UART only Tape and reel BC212013AEN-Y1 6x6x1mm UART only Tray (dry pack) Packaging Options: 2Kpcs Taped & Reeled (E4) 348pcs Tray (5 Trays to a box) (Y1) TM BlueCore 2-External Product Data Sheet Order Number Contact CSR Worldwide CSR USA CSR Head Office 1651 N. Collins Blvd. Suite 210 Richardson TX75080 USA Tel: +1 972 238 2300 Fax: +1 972 231 1440 e-mail: sales@csr.com Cambridge Science Park Milton Road Cambridge, CB4 0WH United Kingdom Tel: +44 (0) 1223 692 000 Fax: +44 (0) 1223 692 001 e-mail: sales@csr.com CSR Denmark Novi Science Park Niels Jernes Vej 10 9220 Aalborg East Denmark Tel: +45 72 200 380 Fax: +45 96 354 599 e-mail: sales@csr.com CSR Singapore Blk 5, Ang Mo Kio Industrial Park 2A AMK Tech II, #07-08 Singapore 567760 Tel: +65 484 2212 Fax: +65 484 2219 e-mail: sales@csr.com CSR Japan CSR KK Miyasaka LK Building 3F 43-23, 3 Chome Shimorenjaku Mitaka-shi, Tokyo Japan 181-0013 Tel: +81 (0) 422 40 4760 Fax: +81 (0) 422 40 4765 e-mail: sales@csr.com CSR Korea #104-404, Kukje Sanjang Apt Shinlim 10-Dong, Kwanak-Ku Seoul 151-767, Korea e-mail: sales@csr.com To contact a CSR representative, please go to www.csr.com/contacts.htm BC212015-ds-001b Pre-Production Information Page 19 of 21 Product Data Sheet Status of Information Status of Information The progression of CSR Product Data Sheets follows the following format: a) Advance Information b) Pre-Production Information Final pinout and mechanical dimensions. All electrical specifications may be changed by CSR without notice. c) Production Information The status of this Data Sheet is Pre-Production Information. Life Support Policy and Use in Safety-Critical Applications CSR's products are not authorised for use in life-support or safety-critical applications. Trademarks, Patents and Licenses BlueCore and BlueLab are trademarks of CSR. Bluetooth and the Bluetooth logos are trademarks owned by Bluetooth SIG Inc, USA and licensed to CSR. All other product, service, and company names are trademarks, registered trademarks, or service marks of their respective owners. The publication of this information does not imply that any license is granted under any patent or other rights owned by CSR. CSR reserves the right to make technical changes to its products as part of its development programme. While every care has been taken to ensure the accuracy of the contents of this document, CSR cannot accept responsibility for any errors. CSR Ltd 2001 Page 20 of 21 Pre-Production Information BC212015-ds-001b TM Final Data Sheet including the guaranteed minimum and maximum limits for the electrical specifications. Production Data Sheets supersede all previous document versions. BlueCore 2-External Product Data Sheet Information for designers on the target specification for a CSR product in development. All detailed specifications including pinouts and electrical specifications may be changed by CSR without notice. Product Data Sheet Date: Revision: Reason for Change: September 2001 a Latest information for BlueCore2-External October 2001 b Application information added BlueCore 2-External Product Data Sheet BlueCore2-External Product Data Sheet BC212015-ds-001b October 2001 TM BC212015-ds-001b Pre-Production Information Page 21 of 21