19-4994; Rev 1; 9/11 KIT ATION EVALU LE B A IL A AV 76V, APD, Dual Output Current Monitor The DS1842A integrates the discrete high-voltage components necessary for avalanche photodiode (APD) bias and monitor applications. A precision voltage-divider network is used in conjunction with an external DC-DC controller and FET to create a boost DC-DC converter. A current clamp limits current through the APD and also features an external shutdown. The precision voltage-divider network is provided for precise control of the APD bias voltage. The device also includes a dual current mirror to monitor the APD current. Features 76V Maximum Boost Voltage Current Monitor with a Wide 1A to 2mA Range, Fast 50ns Time Constant, and 10:1 and 5:1 Ratio 2mA Current Clamp with External Shutdown Precision Voltage Feedback Multiple External Filtering Options 3mm x 3mm, 14-Pin TDFN Package with Exposed Pad Ordering Information Applications APD Biasing GPON ONU and OLT TEMP RANGE PIN-PACKAGE DS1842AN+ PART -40C to +85C 14 TDFN-EP* DS1842AN+T&R -40C to +85C 14 TDFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. T&R = Tape and reel. *EP = Exposed pad. Typical Application Circuit 3.3V FBIN CBULK DS1842A PWM MIRIN R1 CURRENT MIRROR ADC FBOUT MIR1 R2 GPIO CLAMP EP GND CURRENT LIMIT MIR2 EXTERNAL MONITOR MIROUT ROSA DS4830 APD TIA ADC ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 DS1842A General Description DS1842A 76V, APD, Dual Output Current Monitor ABSOLUTE MAXIMUM RATINGS Voltage Range on CLAMP Relative to GND...................................................-0.3V to +12V Voltage Range on MIRIN, MIROUT, FBIN MIR1, and MIR2 Relative to GND........................-0.3V to +80V Voltage Range on FBOUT Relative to GND ..........-0.3V to +6.0V Continuous Power Dissipation (TA = +70C) TDFN (derate 24.4mW/C above +70C).................1951.2mW Operating Junction Temperature Range ...........-40C to +150C Storage Temperature Range .............................-55C to +135C Lead Temperature (soldering, 10s) .................................+300C Soldering Temperature (reflow) .......................................+260C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) TDFN Junction-to-Ambient Thermal Resistance (JA) ............41C/W Junction-to-Case Thermal Resistance (JC) ...................8C/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. ELECTRICAL CHARACTERISTICS (TA = -40C to +85C, unless otherwise noted.) PARAMETER CLAMP Voltage CLAMP Threshold Maximum MIROUT Current SYMBOL CONDITIONS MIN VCLAMP 0 VCLT 1.25 1.8 IMIROUT CLAMP = low TYP MAX UNITS 11 V 1.8 2.35 V 2.75 3.85 mA CLAMP = high A MIR1 to MIROUT Ratio KMIR1 MIR2 to MIROUT Ratio KMIR2 MIR1, MIR2 Rise Time (20%/80%) tRC (Note 2) 30 Shutdown Temperature T SHDN (Note 3) +150 C Hysteresis Temperature THYS (Note 3) 5 C Leakage on CLAMP IIL Resistor-Divider Ratio (R1/R2) KR 15V < VMIRIN < 76V, IMIROUT > 1A 15V < VMIRIN < 76V, IMIROUT > 1A 10 0.096 0.100 0.104 A/A 0.192 0.200 0.208 A/A -1 TA = +25C, VFBIN = 76V Resistor-Divider End-to-End Resistance +1 59.5 Resistor-Divider Tempco RRES TA = +25C, VFBIN = 76V 308 A 60.25 50 385 Note 2: Rising MIROUT transition from 10A to 1mA; VMIRIN = 40V, 2.5k load. Note 3: Not production tested. Guaranteed by design. 2 ns _______________________________________________________________________________________ ppm/C 481 k 76V, APD, Dual Output Current Monitor MIRIN CURRENT vs. MIROUT CURRENT (VMIRIN = 40V) 1000 100 DS1842A toc02 DS1842A toc01 100 90 80 MIRIN CURRENT (A) MIRIN CURRENT (A) 10,000 MIRIN CURRENT vs. TEMPERATURE (VMIRIN = 40V, IMIROUT = 250nA) 70 60 50 40 30 20 10 10 0 10 1 100 1000 10,000 -20 0 40 60 80 MIRIN CURRENT vs. TEMPERATURE (VMIRIN = 40V, IMIROUT = 2mA) MIR ERROR vs. TEMPERATURE (IMIROUT = 1A) DS1842A toc04 VMIRIN = 40V ERROR (%) 1 3 2 100 2 DS1842A toc03 4 MIR2 0 MIR1 -1 1 -2 0 -20 0 20 40 60 80 -40 100 -20 0 MIR ERROR vs. TEMPERATURE (IMIROUT = 1mA) 40 60 80 100 MIR ERROR vs. MIROUT CURRENT 2 VMIRIN = 40V DS1842A toc05 2 VMIRIN = 40V 1 ERROR (%) 1 0 20 TEMPERATURE (C) TEMPERATURE (C) MIR2 DS1842A toc06 -40 ERROR (%) 20 TEMPERATURE (C) 5 MIRIN CURRENT (mA) -40 MIROUT CURRENT (A) MIR2 0 MIR1 MIR1 -1 -1 -2 -2 -40 -20 0 20 40 60 TEMPERATURE (C) 80 100 1 10 100 1000 10,000 MIROUT CURRENT (A) _______________________________________________________________________________________ 3 DS1842A Typical Operating Characteristics (TA = +25C, unless otherwise noted.) Typical Operating Characteristics (continued) (TA = +25C, unless otherwise noted.) MIROUT CLAMP CURRENT vs. MIRIN VOLTAGE MIR ERROR vs. MIRIN VOLTAGE 3.4 3.3 IMIR2 = 1mA 3.2 IMIROUT (mA) ERROR (%) DS1842A toc08 IMIR2 = 1A 1 3.5 DS1842A toc07 2 0 IMIR1 = 1A IMIR1 = 1mA TA = -40C 3.1 3.0 TA = +25C 2.9 2.8 -1 TA = +85C 2.7 2.6 2.5 -2 20 30 40 50 60 70 20 30 40 50 60 MIRIN VOLTAGE (V) MIRIN VOLTAGE (V) RESISTOR-DIVIDER RATIO vs. FBIN VOLTAGE RESISTOR-DIVIDER RATIO vs. TEMPERATURE DS1842A toc11 60.1 60.00 70 80 80 100 VFBIN = 40V 59.95 RATIO (KR) 60.0 59.9 59.90 59.8 59.85 59.7 59.80 10 20 30 40 50 FBIN VOLTAGE (V) 4 10 80 DS1842A toc12 10 RATIO (KR) DS1842A 76V, APD, Dual Output Current Monitor 60 70 80 -40 -20 0 20 40 60 TEMPERATURE (C) _______________________________________________________________________________________ 76V, APD, Dual Output Current Monitor Block Diagram TOP VIEW DS1842A 1 MIR2 2 GND 3 FBOUT 4 CLAMP 5 GND 6 14 MIROUT + MIR1 MIRIN R2 CURRENT MIRROR 12 FBIN 11 N.C. MIR1 MIR2 10 N.C. 9 N.C. 8 N.C. 7 CURRENT LIMIT CLAMP *EP GND FBIN 13 MIRIN DS1842A R1 FBOUT THERMAL SHUTDOWN TDFN *EXPOSED PAD. EP GND MIROUT Pin Description PIN NAME 1 MIR1 FUNCTION Current Mirror Monitor Output, 10:1 Ratio 2 MIR2 Current Mirror Monitor Output, 5:1 Ratio 3, 6, 7 GND Ground Connection for Device. Connect directly to ground plane. 4 FBOUT Feedback Output. Resistor-divider output. Clamp Input. Disables the current mirror output (MIROUT). 5 CLAMP 8-11 N.C. No Connection 12 FBIN Feedback Input. Resistor-divider input. 13 MIRIN Current Mirror Input 14 MIROUT -- EP Current Mirror Output. Connect to APD bias pin. Exposed Pad. Connect directly to the same ground plane as GND. Detailed Description The DS1842A contains discrete high-voltage components required to create an APD bias voltage and to monitor the APD bias current. The device's mirror outputs are a current that is a precise ratio of the output current across a large dynamic range. The mirror response time is fast enough to comply with GPON Rx burst-mode monitoring requirements. The device has a built-in current-limiting feature to protect APDs. The APD current can also be shut down by CLAMP or thermal shutdown. The resistor-divider is used in conjunction with a DC-DC boost controller and FET to precisely create the APD bias voltage. Current Mirror The DS1842A has two current mirror outputs. One is a 10:1 mirror connected at MIR1, and the other is a 5:1 mirror connected to MIR2. _______________________________________________________________________________________ 5 DS1842A Pin Configuration 76V, APD, Dual Output Current Monitor DS1842A Thermal Shutdown MIR1 CLAMP As a safety feature, the DS1842A has a thermal-shutdown circuit that turns off the MIROUT and MIRIN currents when the internal die temperature exceeds TSHDN. These currents resume after the device has cooled. Precision Voltage-Divider REF Figure 1. Current Clamp from Current Feedback The mirror output is typically connected to an ADC using a resistor to convert the mirrored current into a voltage. The resistor to ground should be selected such that the maximum full-scale voltage of the ADC is reached when the maximum mirrored current is reached. For example, if the maximum monitored current through the APD is 2mA with a 1V ADC full scale, and the 10:1 mirror is used, then the correct resistor is approximately 5k. If both MIR1 and MIR2 are connected together, the correct resistor is 1.6k. The mirror response time is dominated by the amount of capacitance placed on the output. For burst-mode Rx systems where the fastest response times are required (approximately a 50ns time constant), a 3.3pF capacitor and external op amp should be used to buffer the signal sent to the ADC. For continuous mode applications, a 10nF capacitor is all that is required on the output. The DS1842A includes a resistor-divider to use as the feedback network for the boost converter. The DS1842A resistor-divider ratio, KR (R1/R2), is tightly controlled, allowing the boost converter output to be set with very high precision. KR can pair with the DS1875's internal DC-DC boost controller. KR can also be easily modified by adding external series/parallel resistors; however, the temperature coefficient of the external resistors must be considered. Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 14 TDFN-EP T1433+2 21-0137 90-0063 Current Clamp The DS1842A has a current clamping circuit to protect the APD by limiting the amount of current from MIROUT. There are three methods of current clamping available: 1) Internally Defined Current Limit The device's current clamp circuit automatically clamps the current when it exceeds the maximum MIROUT current. 2) External Shutdown Signal The CLAMP pin can completely shut down the current from MIROUT. The CLAMP pin is active high. 3) Precise Level Set by External Feedback Circuit A feedback circuit is used to control the level applied to the CLAMP pin. Figure 1 shows an example feedback circuit. 6 _______________________________________________________________________________________ 76V, APD, Dual Output Current Monitor REVISION NUMBER REVISION DATE 0 10/09 1 9/11 DESCRIPTION Initial release PAGES CHANGED -- Removed references to the internal switch FET and renamed pins accordingly; updated the soldering information in the Absolute Maximum Ratings section; added the Package Thermal Characteristics section; removed the FET Typical Operating Characteristics graphs 1, 2, 4, 5, 6 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 7 (c) 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc. 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