8/29/03
www.irf.com 1
AUTOMOTIVE MOSFET
PD - 94639A
HEXFET® Power MOSFET
VDSS = 40V
RDS(on) = 5.5mΩ
ID = 75A
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low on-
resistance per silicon area. Additional features of
this design are a 175°C junction operating tempera-
ture, fast switching speed and improved repetitive
avalanche rating . These features combine to make
this design an extremely efficient and reliable device
for use in Automotive applications and a wide variety
of other applications.
S
D
G
Description
●Advanced Process Technology
●Ultra Low On-Resistance
●175°C Operating Temperature
●Fast Switching
●Repetitive Avalanche Allowed up to Tjmax
Features
IRF4104
IRF4104S
IRF4104L
D2Pak
IRF4104S
TO-220AB
IRF4104 TO-262
IRF4104L
Absolute Maximum Ratings
Parameter Units
ID @ TC = 25°C Co nti n uous D r ai n C ur rent, VGS @ 10V (Silicon Limited)
ID @ TC = 100° C Co nti n uous D r ai n C ur rent, VGS @ 10V A
ID @ TC = 25°C Co nti n uous D r ai n C ur rent, VGS @ 10V (Packa
g
e limited)
IDM
P
u
l
se
d
D
ra
i
n
C
urrent
c
PD @TC = 25°C Power Dissipation W
Linear D era ting Factor W/°C
VGS Gat e- to-Source Vo ltag e V
EAS (Thermally limited)
Si
n
gl
e
P
u
l
se
A
va
l
anc
h
e
E
ner
gy
d
mJ
EAS (Teste d )
Si
n
gl
e
P
u
l
se
A
va
l
anc
h
e
E
ner
gy
T
este
d
V
a
l
ue
h
IAR
A
va
l
anc
h
e
C
urrent
c
A
EAR
R
epet
i
t
i
ve
A
va
l
anc
h
e
E
ner
gy
g
mJ
TJ Operating Juncti on and
TSTG Stor ag e Tem per atur e Ra ng e ° C
Soldering Temperature, for 10 seconds
Mo unt ing T orque, 6-32 or M 3 s c r ew
i
Therm al R esistan ce Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.05 °C/W
RθCS Ca s e- to- Sink , Fl at Grease d S u r fac e
i
0.50 –––
RθJA Junc tio n- t o- Ambient
i
––– 62
RθJA Junc tio n- t o- Ambient ( P CB Moun t )
j
––– 40
220
120
See Fig. 12a, 12 b, 15 , 16
140
0.95
± 20
Max.
120
84
470
75
-5 5 to + 175
300 ( 1.6mm fr om ca se )
10 lbf
y
in (1.1N
y
m)
IRF4104S/L
2www.irf.com
Electrical Characterist ics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
V(BR)DSS D r ai n- to-Sou r c e B reakdow n Volta ge 40 ––– ––– V
∆V(BR)DSS
/
∆TJ Breakdow n Voltage Temp. Coefficient ––– 0.032 ––– V/°C
RDS(on) Stati c D rain- to- Sour c e O n- R e s i s tanc e ––– 4. 3 5.5 mΩ
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V
gfs For wa rd Transconductance 63 ––– ––– V
IDSS Dr ai n- to- Sour c e Leak age Cu r rent ––– ––– 20 µA
––– ––– 250
IGSS Gate-to- Sou r c e For war d Lea kag e ––– ––– 200 nA
Gate- to- Sour c e R ev e r s e Leaka ge ––– ––– -20 0
QgTotal Gate Charge ––– 68 100
Qgs Gate- to- Sour c e C ha r ge ––– 21 ––– nC
Qgd Gate-to-Drain ("Mille r " ) Char ge ––– 27 –––
td(on) Turn-On Delay Time ––– 16 –––
trRise Ti me ––– 13 0 –––
td(off) Turn-Off Delay Ti me ––– 38 – –– n s
tfFall Time ––– 77 –––
LDInternal Drain Inductance ––– 4.5 ––– Between lead,
nH 6mm (0.25in.)
LSInt er nal Source Inducta nce ––– 7.5 ––– from package
and center of die contact
Ciss Input Capacitance ––– 3000 –––
Coss Output Capacitance ––– 660 –––
Crss Reve rse Tr a ns fer Capac ita nc e ––– 380 ––– pF
Coss Output Capacitance ––– 2160 –––
Coss Output Capacitance ––– 560 –––
Coss ef f. Ef fec t iv e O utput C ap ac it a nce ––– 850 –––
Source-Drain Ratin
g
s and Characteristics
Par a me te r Min. Ty p. Max . Units
ISContinuous Source Curr ent ––– ––– 75
(Body Diode) A
ISM Pulsed Source Current ––– ––– 470
(Body Diode)
c
VSD Diod e For ward Voltage –– – ––– 1.3 V
trr Reverse Recovery Time ––– 23 35 ns
Qrr Rev e r s e R ec ov er y C ha r ge ––– 6. 8 10 nC
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
VDS = 10V , I D = 75A
ID = 75A
VDS = 32V
Conditions
VGS = 10V
e
VGS = 0V
VDS = 25V
ƒ = 1. 0M H z
VGS = 20V
VGS = -20V
MOSFET symbol
showing the
integra l revers e
p-n ju nction diode.
TJ = 25°C, IS = 75A, VGS = 0V
e
TJ = 25°C, IF = 75 A , V DD = 20V
di /dt = 100A/µ s
e
Conditions
VGS = 0V, ID = 25 0µA
Refere nce to 25 °C, ID = 1m A
VGS = 10V, ID = 75A
e
VDS = VGS, ID = 250µ A
VDS = 40V , V GS = 0V
VDS = 40V , V GS = 0V , TJ = 125°C
VGS = 0 V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0 V, VDS = 32V, ƒ = 1.0MH z
VGS = 0V, VDS = 0V to 32V
f
VGS = 10V
e
VDD = 20V
ID = 75A
RG = 6.8 Ω
IRF4104S/L
www.irf.com 3
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance
Vs. Drain Current
0.1 110 100
VDS, Dr ain-to- Source Voltage (V )
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
4.5V
20µs PU LSE WIDTH
Tj = 25° C
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
ID, Drain-to-Source Current (A)
4.5V 20µs PULSE WIDTH
Tj = 175° C
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
4 6 8 10 12
VGS, Gat e-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (
A)
TJ = 25°C
TJ = 175°C
VDS = 15V
20µs PU LSE WIDTH
0 20406080100
ID, Drai n-to-S ource Current (A)
0
20
40
60
80
100
120
Gfs, Forward Transconductance (S)
TJ = 25°C
TJ = 175°C
VDS = 10V
380µs PU LSE WIDTH
IRF4104S/L
4www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
110 100
VDS, Dr ain-to-Source Voltage (V)
0
1000
2000
3000
4000
5000
C, Capacitance (pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
0 20406080100
QG Total Gate Charge (nC)
0
4
8
12
16
20
VGS, Gate-to-Source Voltage (V)
VDS= 32V
VDS= 20V
ID= 75A
0.2 0.6 1.0 1.4 1.8
VSD, Source-toDr ain Voltage (V)
0.1
1.0
10.0
100.0
1000.0
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
0 1 10 100 1000
VDS , Dr ain-toS ource Voltage (V)
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175° C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
IRF4104S/L
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature Fig 10. Normalized On-Resistance
Vs. Temperature
-60 -40 -20 020 40 60 80 100 120 140 160 180
TJ , Junction Temperature (° C)
0.5
1.0
1.5
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 75A
VGS = 10V
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangul ar Pulse D uration ( s ec)
0.001
0.01
0.1
1
10
Thermal Response ( Z thJC )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
25 50 75 100 125 150 175
TC , Case Temperatur e (°C)
0
20
40
60
80
100
120
ID , Drain Current (A)
LIMITED BY PACKAGE
Ri (°C/W) τi (sec)
0.371 0.000272
0.337 0.001375
0.337 0.018713
τJ
τJ
τ1
τ1τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
τ
τC
Ci i/Ri
Ci= τi/Ri
IRF4104S/L
6www.irf.com
Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 14. Threshold Voltage Vs. Temperature
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
-75 -50 -25 025 50 75 100 125 150 175
TJ , Tem perature ( °C )
1.0
2.0
3.0
4.0
VGS(th) Gate threshold Voltage (V)
ID = 250µA
25 50 75 100 125 150 175
Starti ng TJ, Junction Temperature (° C)
0
100
200
300
400
500
EAS, Single Pulse Avalanche Energy (mJ)
ID
TOP 11A
16A
BOTTOM 75A
IRF4104S/L
www.irf.com 7
Fig 15. Typical Avalanche Current Vs.Pulsewidth
Fig 16. Maximum Avalanche Energy
Vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3· BV·Zth]
EAS (AR) = PD (ave)·tav
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02
tav (sec)
0.1
1
10
100
1000
Avalanche Current (A)
0.05
Dut y Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
25 50 75 100 125 150 175
Starti ng TJ , Junction Temperature (°C)
0
20
40
60
80
100
120
140
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1% Duty Cy cle
ID = 75A
IRF4104S/L
8www.irf.com
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
VGS=10V
VDD
ISD
Driver Gate Drive
D.U.T. ISD Waveform
D.U.T. VDS Waveform
Inductor Curent
D = P.W.
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
VDS
90%
10%
VGS t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
IRF4104S/L
www.irf.com 9
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
L EAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
- B -
1.32 (.0 52)
1.22 (.0 48)
3X 0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
4.69 (.185)
4.20 (.165)
3X 0.93 (.037)
0.69 (.027)
4.06 (.160)
3.55 (.140)
1.15 (.045)
MIN
6.47 (.255)
6.10 (.240)
3.78 (.149)
3.54 (.139)
- A -
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (. 555)
13.47 (. 530)
3X 1.40 (.055)
1.15 (.045)
2.54 (.100)
2X
0.36 (.014) M B A M
4
1 2 3
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT I NC LUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE:
IN THE ASSEMBLY LINE "C"
T HIS IS AN IRF 1010
LOT CODE 1789
AS S E MBL E D ON WW 19, 1997 PART NUMBER
ASSEMBLY
LOT CODE
DAT E CODE
YEAR 7 = 1997
LINE C
WEEK 19
LOGO
RECT IFIER
INT ERNATIONAL
EXAMPLE : T HIS IS AN IR F1010
LOT CODE 1789
AS S E MB LE D ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
INT ERNATIONAL
RECT IFIER
LOGO
LOT CODE
PART NUMBER
DAT E CODE
For GB Production
IRF4104S/L
10 www.irf.com
D2Pak Part Marking Information
F 530S
T HIS IS AN IRF 530S WIT H
LOT CODE 8024
AS S EMBL E D ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
AS S E MB L Y
LOT CODE
INT ERNAT IONAL
RECTIFIER
LOGO
PART NUMB ER
DAT E CODE
YE AR 0 = 2000
WE E K 02
LINE L
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
DAT E CODE
IN THE ASSEMBLY LINE "L"
AS S EMBL E D ON WW 02, 2000
T HIS IS AN IRF 530S WIT H
LOT CODE 8024 INT ERNAT IONAL
LOGO
RECTIFIER
LOT CODE
PART NUMB ER
F 530S
For GB Production
IRF4104S/L
www.irf.com 11
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXA
M
PLE:THIS IS A
N IRL3103L
LOT C
O
DE 1789
A
SSEM
BLY
PA
RT NUMBER
DA
TE C
ODE
W
EEK 19
LINE C
LO
T C
ODE
YEA
R 7 = 1997
A
SSEM
BLED O
N WW
19, 1997
IN THE A
SSEM
BLY LINE "C
"LOG
O
REC
TIFIER
INTERNA
TIONA
L
IGBT
1- GATE
2- COLLEC-
TOR
IRF4104S/L
12 www.irf.com
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101]market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 08/03
TO-220AB package is not recommended for Surface Mount Application.
D2Pak Tape & Reel Information
3
4
4
TRR
FEED DIRECTIO N
1.85 (.073)
1.65 (.065)
1.60 (.0 63)
1.50 (.0 59)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTIO N
10.90 (.4 29)
10.70 (.4 21) 16.10 (.634 )
15.90 (.626 )
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.60 9)
15.22 (.60 1)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0 145)
0.342 (.0 135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60. 00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIM ETER.
3. DIMENSION ME ASURED @ HUB.
4. I NCLUDES FLANGE DISTORTION @ OUTER EDGE.
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.04mH
RG = 25 Ω, IAS = 75A, V GS =10V. Part not
recommended for use above this value.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the
same charging time as Coss while VDS is rising
from 0 to 80% VDSS .
Notes:
Limited by T Jmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
This is only applied to TO-220AB pakcage.
This is applied to D2Pak, when mounted on 1" square PCB (FR-
4 or G-10 Material). For recommended footprint and soldering
techniques refer to application note #AN-994.
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
