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© 2012 Exar Corporation 8/11 Rev. 2.1.0
THEORY OF OPERATION
APPLICATIONS
The typical application circuit of the adjustable
output voltage option and the fixed output
voltage option are shown below.
Fig. 22: Adjustable Output Voltage Version
Fig. 23: Fixed Output Voltage Version
INDUCTOR SELECTION
Inductor ripple current and core saturation are
two factors considered to select the inductor
value.
Eq. 1:
IN
OUT
OUTLV
V
V
Lf
I1
1
Equation 1 shows the inductor ripple current
as a function of the frequency, inductance, VIN
and VOUT. It is recommended to set the ripple
current between 30% to 40% of the maximum
load current. A low ESR inductor is preferred.
CIN AND COUT SELECTION
A low ESR input capacitor can prevent large
voltage transients at VIN. The RMS current
rating of the input capacitor is required to be
larger than IRMS calculated by:
Eq. 2:
IN
OUTINOUT
OMAXRMS V
VVV
II
The ESR rating of the capacitor is an important
parameter to select COUT. The output ripple
VOUT is determined by:
Eq. 3:
OUT
LOUT Cf
ESRIV 81
Higher values, lower cost ceramic capacitors
are now available in smaller sizes. These
capacitors have high ripple currents, high
voltage ratings and low ESR that makes them
ideal for switching regulator applications. As
COUT does not affect the internal control loop
stability, its value can be optimized to balance
very low output ripple and circuit size. It is
recommended to use an X5R or X7R rated
capacitors which have the best temperature
and voltage characteristics of all the ceramics
for a given value and size.
OUTPUT VOLTAGE – ADJUSTABLE VERSION
The adjustable output voltage version is
determined by:
Eq. 4:
1
2
16.0 R
R
VVOUT
THERMAL CONSIDERATIONS
Although the SP6669 has an on board over
temperature circuitry, the total power
dissipation it can support is based on the
package thermal capabilities. The formula to
ensure safe operation is given in note 1.
PCB LAYOUT
The following PCB layout guidelines should be
taken into account to ensure proper operation
and performance of the SP6669:
1- The GND, SW and VIN traces should be kept
short, direct and wide.
2- VFB pin must be connected directly to the
feedback resistors. The resistor divider
network must be connected in parallel to the
COUT capacitor.
3- The input capacitor CIN must be kept as
close as possible to the VIN pin.
4- The SW and VFB nodes should be kept as
separate as possible to minize possible effects
from the high frequency and voltage swings of
the SW node.