© 2011 Microchip Technology Inc. Preliminary DS70657D-page 1
dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X, and
PIC24EPXXXGP/MC20X
Operating Conditions
• 3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS
•3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS
Core: 16-bit dsPIC33E/PIC24E CPU
• Code-efficient (C and Assembly) archit ecture
• Two 40-bit wide accumulators
• Single- cy c l e (MAC/MPY) with dual data fetch
• Single-cycle mixed-sign MUL plus hardware divide
• 32-bit multiply support
Clock Management
• 0.9% internal oscillator
• Programmable PLLs and oscillator clock sources
• Fail-Safe Clock Monitor (FSCM)
• Independent Watchdog Timer (WDT)
• Fast wake-up and start-up
Power Management
• Low-power management modes (Sleep, Idle, Doze)
• Integrated Power-on Reset and Brown-out Reset
• 0.6 mA/MHz dynamic current (typical)
•30 µA I
PD current (typical)
High-Speed PWM
• Up to three PWM pairs with independent timing
• Dead time for rising and falling edges
• 7.14 ns PWM resolution
• PWM support for:
- DC/DC, AC/DC, Inverters, PFC, Lighting
- BLDC, PMSM, ACIM, SRM
• Programmable Fault inputs
• Flexible trigger configurations for ADC conversions
Advanced Analog Features
• ADC module:
- Configurable as 10-bit, 1.1 Msps with four S&H or
12-bit, 500 ksps with one S&H
- Six analog inputs on 28-pin devices and up to 16
analog inputs on 64-pin devices
• Flexible and indep endent ADC trigger sources
• Up to three Op amp/Comparators with direct connection
to the ADC module:
- Additional dedicated comparator
- Programmable references with 32 voltage points
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ cap acitive touch sensing
- Provides high-resolution time measurement (1 ns)
- On-chip temperature measurement
Timers/Output Compare/Input Capture
• 12 general purpose timers:
- Five 16-bit and up to two 32-bit timers/counters
- Four OC modules configurable as timers/counters
- PTG module with two configurable timers/counters
- 32-bit Quadrature Encoder Interface (QEI) module
configurable as a timer/counter
• Four IC modules
• Peripheral Pin Select (PPS) to allow function remap
• Peripheral Trigger Generator (PTG) for scheduling
complex sequences
Communication Interfaces
• Two UART modules (17.5 Mbps)
- With support for LIN 2.0 protocols and IrDA®
• Two 4-wire SPI modules (15 Mbps)
• ECAN™ module (1 Mbaud) CAN 2.0B support
•Two I
2C™ modules (up to 1 Mbaud) with SMBus
support
• PPS to allow function remap
• Programmable Cyclic Redundancy Check (CRC)
Direct Memory Access (DMA)
• 4-channel DMA with user-selectable priority arbitration
• UART, SPI, ADC, ECAN, IC, OC, and Timers
Input/Output
• Sink/Source 15 mA or 10 mA, pin-specific for
standard VOH/VOL, up to 22 or 14 mA, respectively
for non-standard VOH1
• 5V-tolerant pins
• Selectable open drain, pull-ups, and pull-downs
• Up to 5 mA overvoltage clamp current
• Exter na l int errupts on all I/O pins
Qualification and Class B Support
• AEC-Q100 REVG (Grade 1 -40ºC to +125ºC) planned
• AEC-Q100 REVG (Grade 0 -40ºC to +150ºC) planned
• Class B Safety Library, IEC 60730
Debugger Development Support
• In-circuit and in-a pplication programming
• Two program and two complex data breakpoints
• IEEE 1149.2-compatible (JTAG) boundary scan
• Trace and run-time watch
Packages
Type SPDIP SOIC SSOP QFN-S QFN VTLA TQFP
Pin Count 28 28 28 28 44 64 36 44 44 64
I/O Pins 21 21 21 21 35 53 25 35 35 53
Contact Lead/Pitch .100'' 1.27 0.65 0.65 0.65 0.50 0.50 0.50
Dimensions 1.365x.240x.120'' 17.9x7.50x2.05 10.50x7.80x2 6x6x0.9 8x8x0.9 9x9x.9 5x5x0.5 6x6x0.5 10x10x1
Note: All dimensions are in millimeters (mm) unless specified.
16-bit Micr ocontrollers and Digital Signal Contr ollers (up to 256 KB Flash
and 32 KB SRAM) with High-Speed PWM, Op amps, and Advanced Analog
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
DS70657D-page 2 Preliminary © 2011 Microchip Technology Inc.
dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X, AND
PIC24EPXXXGP/MC20X PRODUCT
FAMILIES
The device names, pin counts, memory sizes, and
peripheral availability of each device are listed in
Table 1 (General Purpose Families) and Table 2 (Motor
Control Families). Their pinout diagrams appear on the
following pages.
TABLE 1: dsPIC33EPXXXGP50X and PIC24EPXXXGP20X GENERAL PURPOSE FAMILIES
Device
Page Erase Size (Instructions)
Program Flash Memory (Kbytes)
RAM (Kbyte)
Remappable Peripherals
I2C™
CRC Generator
10-bit/12-bit ADC (Channels)
Op amps/Comparators
CTMU
PTG
I/O Pins
Pins
Packages
16-bit/32-bit Timers
Input Capture
Output Compare
UART
SPI(2)
ECAN™ Technology
External Interrupts(3)
PIC24EP32GP202 512 32 4
54422—32162/3
(1) Yes Yes 21 28
SPDIP,
SOIC,
SSOP,
QFN-S
PIC24EP64GP202 1024 64 8
PIC24EP128GP202 1024 128 16
PIC24EP256GP202 1024 256 32
PIC24EP32GP203 512 32 4 54422—32183/4YesYes2536VTLA
PIC24EP64GP203 1024 64 8
PIC24EP32GP204 512 32 4
54422—32193/4YesYes3544
VTLA,
TQFP,
QFN
PIC24EP64GP204 1024 64 8
PIC24EP128GP204 1024 128 16
PIC24EP256GP204 1024 256 32
PIC24EP64GP206 1024 64 8
5 4 4 2 2 — 3 2 1 16 3/4 Yes Yes 53 64 TQFP,
QFN
PIC24EP128GP206 1024 128 16
PIC24EP256GP206 1024 256 32
dsPIC33EP32GP502 512 32 4
54422132162/3
(1) Yes Yes 21 28
SPDIP,
SOIC,
SSOP,
QFN-S
dsPIC33EP64GP502 1024 64 8
dsPIC33EP128GP502 1024 128 16
dsPIC33EP256GP502 1024 256 32
dsPIC33EP32GP503 512 32 4 54422132183/4YesYes2536VTLA
dsPIC33EP64GP503 1024 64 8
dsPIC33EP32GP504 512 32 4
54422132193/4YesYes3544
VTLA,
TQFP,
QFN
dsPIC33EP64GP504 1024 64 8
dsPIC33EP128GP504 1024 128 16
dsPIC33EP256GP504 1024 256 32
dsPIC33EP64GP506 1024 64 8
544221321163/4YesYes5364
TQFP,
QFN
dsPIC33EP128GP506 1024 128 16
dsPIC33EP256GP506 1024 256 32
Note 1: On 28-pin devices, Compar ator 4 does not have external co nnections. Refer to Section 25.0 “Op amp/Comparator Module” for det ails.
2: Only SPI2 is remappable.
3: INT0 is not remappable.
© 2011 Microchip Technology Inc. Preliminary DS70657D-page 3
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
TABLE 2: dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X MOTOR CONTROL FAMILIES
Device
Page Erase Size (Instructions)
Program Flash Memory (Kbytes)
RAM (Kbytes)
Remappable Peripherals
I2C™
CRC Generator
10-bit/12-bit ADC (Channels)
Op amps /C om par ator s
CTMU
PTG
I/O Pins
Pins
Packages
16-bit/32-bit Timers
Input Capture
Output Compare
Motor Control PWM(4)
(Channels)
Quadrature Encoder Interface
UART
SPI(2)
ECAN™ Technology
External Interrupts(3)
PIC24EP32MC202 512 32 4
544 6 122—32162/3
(1) Yes Yes 21 28
SPDIP,
SOIC,
SSOP,
QFN-S
PIC24EP64MC202 1024 64 8
PIC24EP128MC202 1024 128 16
PIC24EP256MC202 1024 256 32
PIC24EP32MC203 512 32 4 5 4 4 6 1 2 2 — 3 2 1 8 3/4 Yes Yes 25 36 VTLA
PIC24EP64MC203 1024 64 8
PIC24EP32MC204 512 32 4
5 4 4 6 1 2 2 — 3 2 1 9 3/4 Yes Yes 35 44 VTLA,
TQFP,
QFN
PIC24EP64MC204 1024 64 8
PIC24EP128MC204 1024 128 16
PIC24EP256MC204 1024 256 32
PIC24EP64MC206 1024 64 8
5 4 4 6 1 2 2 — 3 2 1 16 3/4 Yes Yes 53 64 TQFP,
QFN
PIC24EP128MC206 1024 128 16
PIC24EP256MC206 1024 256 32
dsPIC33EP32MC202 512 32 4
544 6 122—32162/3
(1) Yes Yes 21 28
SPDIP,
SOIC,
SSOP,
QFN-S
dsPIC33EP64MC202 1024 64 8
dsPIC33EP128MC202 1024 128 16
dsPIC33EP256MC202 1024 256 32
dsPIC33EP32MC203 512 32 4 5 4 4 6 1 2 2 — 3 2 1 8 3/4 Yes Yes 25 36 VTLA
dsPIC33EP64MC203 1024 64 8
dsPIC33EP32MC204 512 32 4
5 4 4 6 1 2 2 — 3 2 1 9 3/4 Yes Yes 35 44 VTLA,
TQFP,
QFN
dsPIC33EP64MC204 1024 64 8
dsPIC33EP128MC204 1024 128 16
dsPIC33EP256MC204 1024 256 32
dsPIC33EP64MC206 1024 64 8
5 4 4 6 1 2 2 — 3 2 1 16 3/4 Yes Yes 53 64 TQFP,
QFN
dsPIC33EP128MC206 1024 128 16
dsPIC33EP256MC206 1024 256 32
dsPIC33EP32MC502 512 32 4
544 6 122132162/3
(1) Yes Yes 21 28
SPDIP,
SOIC,
SSOP,
QFN-S
dsPIC33EP64MC502 1024 64 8
dsPIC33EP128MC502 1024 128 16
dsPIC33EP256MC502 1024 256 32
dsPIC33EP32MC503 512 32 4 544 6 122132183/4YesYes2536
VTLA
dsPIC33EP64MC503 1024 64 8
dsPIC33EP32MC504 512 32 4
544 6 122132193/4YesYes3544
VTLA,
TQFP,
QFN
dsPIC33EP64MC504 1024 64 8
dsPIC33EP128MC504 1024 128 16
dsPIC33EP256MC504 1024 256 32
dsPIC33EP64MC506 1024 64 8
544 6 1221321163/4YesYes5364
TQFP,
QFN
dsPIC33EP128MC506 1024 128 16
dsPIC33EP256MC506 1024 256 32
Note 1: On 28-pin devices, Comparator 4 does not have external connectio ns. Refer to Se ction 25.0 “Op amp/Comparator Module” for det ails.
2: Only SPI2 is remappable.
3: INT0 is not remappable.
4: Only the PWM F a ul ts ar e re m a ppable.
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
DS70657D-page 4 Preliminary © 2011 Microchip Technology Inc.
Pin Diagrams
28-Pin SPDIP/SOIC/SSOP
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
= Pins are up to 5V tolerant
128
227
326
425
524
623
722
821
920
10 19
11 18
12 17
13 16
14 15
PIC24EPXXXGP202
dsPIC33EPXXXGP502
MCLR AVDD
AN0/OA2OUT/RA0 AVSS
AN1/C2IN1+/RA1 RPI47/T5CK/RB15
PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 RPI46/T3CK/RB14
PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 RPI45/CTPLS/RB13
PGEC1/AN4/C1IN1+/RPI34/RB2 RPI44/RB12
PGED1/AN5/C1IN1-/RP35/RB3 TDI/RP43/RB11
TDO/RP42/RB10
OSC1/CLKI/RA2 VCAP
OSC2/CLKO/RA3 VSS
RP36/RB4 TMS/ASDA1/SDI1/RP41/RB9
CVREF2O/RP20/T1CK/RA4 TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8
VDD SCK1/RP39/INT0/RB7
PGED2/ASDA2/RP37/RB5 PGEC2/ASCL2/RP38/RB6
VSS
128
227
326
425
524
623
722
821
920
10 19
11 18
12 17
13 16
14 15
PIC24EPXXXMC202
dsPIC33EPXXXMC202/502
MCLR AVDD
AN0/OA2OUT/RA0 AVSS
AN1/C2IN1+/RA1 RPI47/PWM1L/T5CK/RB15
PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 RPI46/PWM1H/T3CK/RB14
PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 RPI45/PWM2L/CTPLS/RB13
PGEC1/AN4/C1IN1+/RPI34/RB2 RPI44/PWM2H/RB12
PGED1/AN5/C1IN1-/RP35/RB3 TDI/RP43/PWM3L/RB11
TDO/RP42/PWM3H/RB10
OSC1/CLKI/RA2 VCAP
OSC2/CLKO/RA3 VSS
FLT32/RP36/RB4 TMS/ASDA1/SDI1/RP41/RB9
CVREF2O/RP20/T1CK/RA4 TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8
VDD SCK1/RP39/INT0/RB7
PGED2/ASDA2/RP37/RB5 PGEC2/ASCL2/RP38/RB6
VSS
© 2011 Microchip Technology Inc. Preliminary DS70657D-page 5
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
Pin Diagrams (Continued)
28-Pin QFN-S(3) = Pins are up to 5V tolerant
28 27 26 25 24 23 22
8 9 10 11 12 13 14
3
18
17
16
15
4
5
7
1
2 20
19
6
21
PIC24EPXXXGP202
dsPIC33EPXXXGP502
TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8
SCK1/RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
VDD
CVREF2O/RP20/T1CK/RA4
RP36/RB4
RPI45/CTPLS/RB13
RPI44/RB12
TDI/RP43/RB11
TDO/RP42/RB10
VCAP
VSS
TMS/ASDA1/SDI1/RP41/RB9
RPI46/T3CK/RB14
RPI47/T5CK/RB15
AVSS
AVDD
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1
VSS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notifica tion (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be
connected to VSS externally.
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
DS70657D-page 6 Preliminary © 2011 Microchip Technology Inc.
Pin Diagrams (Continued)
28-Pin QFN-S(3) = Pins are up to 5V tolerant
28 27 26 25 24 23 22
8 9 10 11 12 13 14
3
18
17
16
15
4
5
7
1
2 20
19
6
21
PIC24EPXXXMC202
dsPIC33EPXXXMC202/502
TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8
SCK1/RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
VDD
CVREF2O/RP20/T1CK/RA4
FLT32/RP36/RB4
RPI45/PWM2L/CTPLS/RB13
RPI44/PWM2H/RB12
TDI/RP43/PWM3L/RB11
TDO/RP42/PWM3H/RB10
VCAP
VSS
TMS/ASDA1/SDI1/RP41/RB9
RPI46/PWM1H/T3CK/RB14
RPI47/PWM1L/T5CK/RB15
AVSS
AVDD
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1
VSS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notifica tion (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be
connected to VSS externally.
© 2011 Microchip Technology Inc. Preliminary DS70657D-page 7
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
Pin Diagrams (Continued)
36-Pin VTLA(3)
1
10
33 32 31 30 29 28
2
3
4
5
6
24
23
22
21
20
19
11 12 13 14 15
7
8
9
34
35
36
16 17 18
27
26
25
= Pins are up to 5V tol e ran t
PIC24EP32GP203
TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8
RPI45/CTPLS/RB13
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
VDD
VSS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
SDA2/RPI24/RA8
RPI46/T3CK/RB14
RPI47/T5CK/RB15
AVSS
AVDD
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1
RPI44/RB12
TDI/RP43/RB11
TDO/RP42/RB10
VCAP
VSS
RP56/RC8
TMS/ASDA1/SDI1/RP41/RB9
SCK1/RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
VDD
VSS
CVREF2O/RP20/T1CK/RA4
VDD
SCL2/RP36/RB4
VDD
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The metal pad at the bottom of the device is not connected to any pins and is recomme nded to be
connected to VSS externally.
dsPIC33EP32GP503
PIC24EP64GP203
dsPIC33EP64GP503
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
DS70657D-page 8 Preliminary © 2011 Microchip Technology Inc.
Pin Diagrams (Continued)
36-Pin VTLA(3) = Pins are up to 5V tolerant
1
10
33 32 31 30 29 28
2
3
4
5
6
24
23
22
21
20
19
11 12 13 14 15
7
8
9
34
35
36
16 17 18
27
26
25
PIC24EP32MC203
TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8
RPI45/PWM2L/CTPLS/RB13
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
VDD
VSS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
SDA2/RPI24/RA8
RPI46/PWM1H/T3CK/RB14
RPI47/PWM1L/T5CK/RB15
AVSS
AVDD
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1
RPI44/PWM2H/RB12
TDI/RP43/PWM3L/RB11
TDO/RP42/PWM3H/RB10
VCAP
VSS
RP56/RC8
TMS/ASDA1/SDI1/RP41/RB9
SCK1/RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
VDD
VSS
CVREF2O/RP20/T1CK/RA4
VDD
FLT32/SCL2/RP36/RB4
VDD
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notifi cation (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be
connected to VSS externally.
dsPIC33EP32MC203/503
PIC24EP64MC203
dsPIC33EP64MC203/503
© 2011 Microchip Technology Inc. Preliminary DS70657D-page 9
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
Pin Diagrams (Continued)
44-Pin TQFP = Pins are up to 5V tolerant
44
43
42
41
40
39
38
37
36
35
34
133
232
331
430
529
628
727
826
925
10 24
11 23
12
13
14
15
16
17
18
19
20
21
22
PIC24EPXXXGP204
TCK/CVREF1O/ASCL1/RP40/T4CK/RB8TDO/RA10
RPI45/CTPLS/RB13 PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
AN8/C3IN1+/U1RTS/BCLK1/RC2
VDD
VSS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
SDA2/RPI24/RA8
SCL2/RP36/RB4
TDI/RA7
RPI46/T3CK/RB14
RPI47/T5CK/RB15
AVSS
AVDD
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1
RPI44/RB12
RP43/RB11
RP42/RB10
VCAP
VSS
RP57/RC9
RP56/RC8
RP55/RC7
RP54/RC6
TMS/ASDA1/RP41/RB9
RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
VDD
VSS
SCL1/RPI53/RC5
SDA1/RPI52/RC4
SCK1/RPI51/RC3
SDI1/RPI25/RA9
CVREF2O/SDO1/RP20/T1CK/RA4
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notifica tion (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
dsPIC33EPXXXGP504
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
DS70657D-page 10 Preliminary © 2011 Microchip Technology Inc.
Pin Diagrams (Continued)
44-Pin TQFP = Pins are up to 5V tolerant
44
43
42
41
40
39
38
37
36
35
34
133
232
331
430
529
628
727
826
925
10 24
11 23
12
13
14
15
16
17
18
19
20
21
22
PIC24EPXXXMC204
TCK/CVREF1O/ASCL1/RP40/T4CK/RB8TDO/RA10
RPI45/PWM2L/CTPLS/RB13 PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
AN8/C3IN1+/U1RTS/BCLK1/FLT3/RC2
VDD
VSS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
SDA2/RPI24/RA8
FLT32/SCL2/RP36/RB4
TDI/RA7
RPI46/PWM1H/T3CK/RB14
RPI47/PWM1L/T5CK/RB15
AVSS
AVDD
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1
RPI44/PWM2H/RB12
RP43/PWM3L/RB11
RP42/PWM3H/RB10
VCAP
VSS
RP57/RC9
RP56/RC8
RP55/RC7
RP54/RC6
TMS/ASDA1/RP41/RB9
RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
VDD
VSS
SCL1/RPI53/RC5
SDA1/RPI52/RC4
SCK1/RPI51/RC3
SDI1/RPI25/RA9
CVREF2O/SDO1/RP20/T1CK/RA4
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notifica tion (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
dsPIC33EPXXXMC204/504
© 2011 Microchip Technology Inc. Preliminary DS70657D-page 11
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
Pin Diagrams (Continued)
44-Pin VTLA(3) = Pins are up to 5V tolerant
PIC24EPXXXGP204
1
12
41 40 39 38 37 36 35 34
2
3
4
5
6
7
8
30
29
28
27
26
25
24
23
13 14 15 16 17 18 19
9
10
11 22
20 21
33
32
31
424344
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
AN8/C3IN1+/U1RTS/BCLK1/RC2
VDD
VSS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
SDA2/RPI24/RA8
SCL2/RP36/RB4
TCK/CVREF1O/ASCL1/RP40/T4CK/RB8
RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
VDD
VSS
SCL1/RPI53/RC5
SDA1/RPI52/RC4
SCK1/RPI51/RC3
SDI1/RPI25/RA9
CVREF2O/SDO1/RP20/T1CK/RA4
RPI45/CTPLS/RB13
RPI44/RB12
RP43/RB11
RP42/RB10
VCAP
VSS
RP57/RC9
RP56/RC8
RP55/RC7
RP54/RC6
TMS/ASDA1/RP41/RB9
TDO/RA10
TDI/RA7
RPI46/T3CK/RB14
RPI47/T5CK/RB15
AVSS
AVDD
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notifica tion (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be
connected to VSS externally.
dsPIC33EPXXXGP504
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
DS70657D-page 12 Preliminary © 2011 Microchip Technology Inc.
Pin Diagrams (Continued)
44-Pin VTLA(3) = Pins are up to 5V tolerant
PIC24EPXXXMC204
1
12
41 40 39 38 37 36 35 34
2
3
4
5
6
7
8
30
29
28
27
26
25
24
23
13 14 15 16 17 18 19
9
10
11 2220 21
33
32
31
424344
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
AN8/C3IN1+/U1RTS/BCLK1/FLT3/RC2
VDD
VSS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
SDA2/RPI24/RA8
FLT32/SCL2/RP36/RB4
TCK/CVREF1O/ASCL1/RP40/T4CK/RB8
RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
VDD
VSS
SCL1/RPI53/RC5
SDA1/RPI52/RC4
SCK1/RPI51/RC3
SDI1/RPI25/RA9
CVREF2O/SDO1/RP20/T1CK/RA4
RPI45/PWM2L/CTPLS/RB13
RPI44/PWM2H/RB12
RP43/PWM3L/RB11
RP42/PWM3H/RB10
VCAP
VSS
RP57/RC9
RP56/RC8
RP55/RC7
RP54/RC6
TMS/ASDA1/RP41/RB9
TDO/RA10
TDI/RA7
RPI46/PWM1H/T3CK/RB14
RPI47/PWM1L/T5CK/RB15
AVSS
AVDD
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notifica tion (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be
connected to VSS externally.
dsPIC33EPXXXMC204/504
© 2011 Microchip Technology Inc. Preliminary DS70657D-page 13
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
Pin Diagrams (Continued)
44-Pin QFN(3) = Pins are up to 5V tolerant
44 43 42 41 40 39 38 37 36 35
12 13 14 15 16 17 18 19 20 21
3
30
29
28
27
26
25
24
23
4
5
7
8
9
10
11
1
232
31
6
22
33
34
PIC24EPXXXGP204
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
AN8/C3IN1+/U1RTS/BCLK1/RC2
VDD
VSS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
SDA2/RPI24/RA8
SCL2/RP36/RB4
TCK/CVREF1O/ASCL1/RP40/T4CK/RB8
RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
VDD
VSS
SCL1/RPI53/RC5
SDA1/RPI52/RC4
SCK1/RPI51/RC3
SDI1/RPI25/RA9
CVREF2O/SDO1/RP20/T1CK/RA4
RPI45/CTPLS/RB13
RPI44/RB12
RP43/RB11
RP42/RB10
VCAP
VSS
RP57/RC9
RP56/RC8
RP55/RC7
RP54/RC6
TMS/ASDA1/RP41/RB9
TDO/RA10
TDI/RA7
RPI46/T3CK/RB14
RPI47/T5CK/RB15
AVSS
AVDD
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notifica tion (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be
connected to VSS externally.
dsPIC33EPXXXGP504
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
DS70657D-page 14 Preliminary © 2011 Microchip Technology Inc.
Pin Diagrams (Continued)
44-Pin QFN(3) = Pins are up to 5V tolerant
44 43 42 41 40 39 38 37 36 35
12 13 14 15 16 17 18 19 20 21
3
30
29
28
27
26
25
24
23
4
5
7
8
9
10
11
1
232
31
6
22
33
34
PIC24EPXXXMC204
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
AN8/C3IN1+/U1RTS/BCLK1/FLT3/RC2
VDD
VSS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
SDA2/RPI24/RA8
FLT32/SCL2/RP36/RB4
TCK/CVREF1O/ASCL1/RP40/T4CK/RB8
RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
VDD
VSS
SCL1/RPI53/RC5
SDA1/RPI52/RC4
SCK1/RPI51/RC3
SDI1/RPI25/RA9
CVREF2O/SDO1/RP20/T1CK/RA4
RPI45/PWM2L/CTPLS/RB13
RPI44/PWM2H/RB12
RP43/PWM3L/RB11
RP42/PWM3H/RB10
VCAP
VSS
RP57/RC9
RP56/RC8
RP55/RC7
RP54/RC6
TMS/ASDA1/RP41/RB9
TDO/RA10
TDI/RA7
RPI46/PWM1H/T3CK/RB14
RPI47/PWM1L/T5CK/RB15
AVSS
AVDD
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notifica tion (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be
connected to VSS externally.
dsPIC33EPXXXMC204/504
© 2011 Microchip Technology Inc. Preliminary DS70657D-page 15
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
Pin Diagrams (Continued)
64-Pin TQFP = Pins are up to 5V tolerant
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
148
247
346
445
544
643
742
841
940
10 39
11 38
12 37
13 36
14 35
15 34
16 33
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
TDI/RA7
RPI46/T3CK/RB14
RPI47/T5CK/RB15
RP118/RG6
RPI119/RG7
RP120/RG8
MCLR
RPI121/RG9
V
SS
V
DD
AN10/RPI28/RA12
AN9/RPI27/RA11
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/V
REF
-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/V
REF
+/AN3/OA1OUT/RPI33/CTED1/RB1
TDO/RA10
RPI45/CTPLS/RB13
RPI44/RB12
RP43/RB11
RP42/RB10
RP97/RF1
RPI96/RF0
V
DD
V
CAP
RP57/RC9
RD6
RD5
RP56/RC8
RP55/RC7
RP54/RC6
TMS/ASDA1/RP41/RB9
TCK/CV
REF
1
O
/ASCL1/RP40/T4CK/RB8
RC13
RP39/INT0/RB7
RPI58/RC10
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
RD8
V
SS
OSC2/CLKO/RC15
OSC1/CLKI/RC12
V
DD
SCL1/RPI53/RC5
SDA1/RPI52/RC4
SCK1/RPI51/RC3
SDI1/RPI25/RA9
CV
REF
2
O
/SDO1/RP20/T1CK/RA4
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AV
DD
AV
SS
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
AN8/C3IN1+/U1RTS/BCLK1/RC2
AN11/C1IN2-
(3)
/U1CTS/RC11
V
SS
V
DD
AN12/C2IN2-
(3)
/U2RTS/BCLK2/RE12
AN13/C3IN2-
(3)
/U2CTS/RE13
AN14/RPI94/RE14
AN15/RPI95/RE15
SDA2/RPI24/RA8
SCL2/RP36/RB4
Note 1: The RPn/RPIn pins can be used by an y remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CN Gx). Se e Section 11.0 “I/
O Ports” for more information.
3: This pin is not available as an input when OPMODE (CMxCON<10>) = 1.
dsPIC33EP64GP506
PIC24EP64GP206
PIC24EP128GP206
PIC24EP256GP206
dsPIC33EP128GP506
dsPIC33EP256GP506
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
DS70657D-page 16 Preliminary © 2011 Microchip Technology Inc.
Pin Diagrams (Continued)
64-Pin TQFP = Pins are up to 5V tolerant
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
148
247
346
445
544
643
742
841
940
10 39
11 38
12 37
13 36
14 35
15 34
16 33
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
TDI/RA7
RPI46/PWM1H/T3CK/RB14
RPI47/PWM1L/T5CK/RB15
RP118/RG6
RPI119/RG7
RP120/RG8
MCLR
RPI121/RG9
V
SS
V
DD
AN10/RPI28/RA12
AN9/RPI27/RA11
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/
V
REF
-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/
V
REF
+/AN3/OA1OUT/RPI33/CTED1/RB1
TDO/RA10
RPI45/PWM2L/CTPLS/RB13
RPI44/PWM2H/RB12
RP43/PWM3L/RB11
RP42/PWM3H/RB10
RP97/RF1
RPI96/RF0
V
DD
V
CAP
RP57/RC9
RD6
RD5
RP56/RC8
RP55/RC7
RP54/RC6
TMS/ASDA1/RP41/RB9
TCK/
CV
REF
1
O
/ASCL1/RP40/T4CK/RB8
RC13
RP39/INT0/RB7
RPI58/RC10
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
RD8
V
SS
OSC2/CLKO/RC15
OSC1/CLKI/RC12
V
DD
SCL1/RPI53/RC5
SDA1/RPI52/RC4
SCK1/RPI51/RC3
SDI1/RPI25/RA9
CV
REF
2
O
/SDO1/RP20/T1CK/RA4
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AV
DD
AV
SS
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
AN8/C3IN1+/U1RTS/
BCLK1/
FLT3/RC2
AN11/C1IN2-
(3)
/U1CTS/FLT4/RC11
V
SS
V
DD
AN12/C2IN2-
(3)
/U2RTS/
BCLK2/
RE12
AN13/C3IN2-
(3)
/U2CTS/RE13
AN14/RPI94/RE14
AN15/RPI95/RE15
SDA2/RPI24/RA8
FLT32
/SCL2/RP36/RB4
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 “I/
O Ports” for more information.
3: This pin is not available as an input when OPMODE (CMxCON<10> ) = 1.
PIC24EP64MC206
dsPIC33EP64MC206/506
PIC24EP128MC206
PIC24EP256MC206
dsPIC33EP128MC206/506
dsPIC33EP256MC206/506
© 2011 Microchip Technology Inc. Preliminary DS70657D-page 17
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
Pin Diagrams (Continued)
64-Pin QFN(4) = Pins are up to 5V tolerant
TDO/RA10
RPI45/CTPLS/RB13
RPI44/RB12
RP43/RB11
RP42/RB10
RP97/RF1
RPI96/RF0
V
DD
V
CAP
RP57/RC9
RD6
RD5
RP56/RC8
RP55/RC7
RP54/RC6
TMS/ASDA1/RP41/RB9
TCK/
CV
REF
1
O
/ASCL1/RP40/T4CK/RB8
RC13
RP39/INT0/RB7
RPI58/RC10
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
RD8
V
SS
OSC2/CLKO/RC15
OSC1/CLKI/RC12
V
DD
SCL1/RPI53/RC5
SDA1/RPI52/RC4
SCK1/RPI51/RC3
SDI1/RPI25/RA9
CV
REF
2
O
/SDO1/RP20/T1CK/RA4
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AV
DD
AV
SS
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
AN8/C3IN1+/U1RTS/
BCLK1/
RC2
AN11/C1IN2-
(3)
/U1CTS/RC11
V
SS
V
DD
AN12/C2IN2-
(3)
/U2RTS/
BCLK2/
RE12
AN13/C3IN2-
(3)
/U2CTS/RE13
AN14/RPI94/RE14
AN15/RPI95/RE15
SDA2/RPI24/RA8
SCL2/RP36/RB4
TDI/RA7
RPI46/T3CK/RB14
RPI47/T5CK/RB15
RP118/RG6
RPI119/RG7
RP120/RG8
MCLR
RPI121/RG9
V
SS
V
DD
AN10/RPI28/RA12
AN9/RPI27/RA11
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/
V
REF
-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/
V
REF
+/AN3/OA1OUT/RPI33/CTED1/RB1
PIC24EP64GP206
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
148
247
346
445
544
643
742
841
940
10 39
11 38
12 37
13 36
14 35
15 34
16 33
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Note 1: The RPn/RPIn pins can be used by an y remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CN Gx). Se e Section 11.0 “I/
O Ports” for more information.
3: This pin is not available as an input when OPMODE (CMxCON<10>) = 1.
4: The metal pad at the bottom of the device is not connected to any pins and is recommended to be
connected to VSS externally.
dsPIC33EP64GP506
PIC24EP128GP206
PIC24EP256GP206
dsPIC33EP128GP506
dsPIC33EP256GP506
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
DS70657D-page 18 Preliminary © 2011 Microchip Technology Inc.
Pin Diagrams (Continued)
64-Pin QFN(4) = Pins are up to 5V tolerant
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
148
247
346
445
544
643
742
841
940
10 39
11 38
12 37
13 36
14 35
15 34
16 33
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
TDO/RA10
RPI45/PWM2L/CTPLS/RB13
RPI44/PWM2H/RB12
RP43/PWM3L/RB11
RP42/PWM3H/RB10
RP97/RF1
RPI96/RF0
V
DD
V
CAP
RP57/RC9
RD6
RD5
RP56/RC8
RP55/RC7
RP54/RC6
TMS/ASDA1/RP41/RB9
TCK/
CV
REF
1
O
/ASCL1/RP40/T4CK/RB8
RC13
RP39/INT0/RB7
RPI58/RC10
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
RD8
V
SS
OSC2/CLKO/RC15
OSC1/CLKI/RC12
V
DD
SCL1/RPI53/RC5
SDA1/RPI52/RC4
SCK1/RPI51/RC3
SDI1/RPI25/RA9
CV
REF
2
O
/SDO1/RP20/T1CK/RA4
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AV
DD
AV
SS
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
AN8/C3IN1+/U1RTS/
BCLK1/
FLT3/RC2
AN11/C1IN2-
(3)
/U1CTS/FLT4/RC11
V
SS
V
DD
AN12/C2IN2-
(3)
/U2RTS/
BCLK2/
RE12
AN13/C3IN2-
(3)
/U2CTS/RE13
AN14/RPI94/RE14
AN15/RPI95/RE15
SDA2/RPI24/RA8
FLT32
/SCL2/RP36/RB4
TDI/RA7
RPI46/PWM1H/T3CK/RB14
RPI47/PWM1L/T5CK/RB15
RP118/RG6
RPI119/RG7
RP120/RG8
MCLR
RPI121/RG9
V
SS
V
DD
AN10/RPI28/RA12
AN9/RPI27/RA11
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/
V
REF
-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/
V
REF
+/AN3/OA1OUT/RPI33/CTED1/RB1
Note 1: The RPn/RPIn p ins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 “I/O
Ports” for more information.
3: This pin is not available as an input when OPMODE (CMxCON<10>) = 1.
4: The metal pad at the bottom of the device is not connected to any pins and is recommended to be
connected to VSS externally.
PIC24EP64MC206
dsPIC33EP64MC206/506
PIC24EP128MC206
PIC24EP256MC206
dsPIC33EP128MC206/506
dsPIC33EP256MC206/506