236 54199 /74199 8-Bit Parailel-in, Parallel-Out Shift Register (J-K Input to First Stage) Schottky TTL =| ~ High-Speed TTL _|_ Low-Power Schottky TTL | Standard TTL Low-Power TTL . Package Package Packaze |) Package | Device Type . ig . | Package | P? Te TP [MICH P [mcr] Oovee TYP! Fc Tp [m| cr Device Type CFT T.1. . | __ EFF {| |_| SN 54199 __ {sd : __ SN 74199 JO ND, Po | | [J ruseng9Fugaisa 0@) FAIRCHILD L [YP remnes tease 0b] POT 7 MOTOROLA fs : TET J | _ | DM54199 Te, FO NSC. | DH 74199 _ Sta Fo, [4] Po = _. _ ft | . | PHILIPS - TI + | n7a195 To _ S 54199 FOINQ] [90] SIGNETICS t nr 7at89 FOnd) ee = SIEMENS [rua bit _ et I FUvITSU - | pt i+ -4 - f HITACHI THD 74199 toled ~~ | | Pe _. | MITSUBISHI r [53399 _ | nec ! L ee TO Co Electrical Characteristics SN54199 /SN74199 Function Table a ee * $9@ (See Note 2) absolute maximum ratings over operating free-air temperature range aa aay a spear ao [RAE on a we Supply voltage, VCC Operating free-ai L i x . rr {Input | Input voltage 6. 5V_ Wi temperature range * t L x j . x , x0 S80 eco ono _ [Storage temperature range H i ' Low x 0 ono Bn = 3 H L t tok x L lan [fn n recommended operating conditions y * cyt |e | x lee eae x a 1 | x O* i x Ono Spo OPO AHO N NO! Lee oes (ee cen fron Yow te fh ot Supply voltage, VCO 4.5 High-level output current, OH Low-level output current, OL. Clock frequency, foiock Width of clock or clear pulse, tw Mode-control setup. time, tsetup Data setup time, tsetup Hold time at any input, thoid Operating free-air temperature, TA Functional Block Deerem ale ed ih Leh & 4 eg electrical characteristics over recommended operating free-air temperature range | ; l am PARAMETER * TEST CONDITIONS ft | VIH High-level input voltage eL0cm Vu Lowdevel input voltage vi Input clamp voltage Voc=MIN, =~ 12mA VOH High-level output voltage Voc =MIN, ViIH = 2V, Vit =0. 8V, Voc =MIN, VoL Low-level output voltage Vice OV. h input current at maxirnum | Voc =MAX, input voltage Net High-level input current Voc =MAX, bt Mie Low-level input current Voc =MAX, 10S Short-circuit output current @| Voc =MAX oc Supply current Voc =MAX, See Note | tmax. Maximum input count frequency} tPHL | from clear tPHL | from clock 1 Voc = 5. APLH | from clock TA =25C [OL = 150F. RL =4002. Pin Assignments (Top View) positive logic: see function table 1 Semiat iarurs Yee 19a ea . With all outputs open, Clock inhibit, Ciear and Shift - Load grounded, and, 4. 5 On0, Qp0, Ico, --OHO =the level of OA, OB, or OC thru OH, respectively, my a a S gxbcn GAD | 3] 3 4 a a typical clear, shift, load inhibit sequences cron + PUTT ' 199 8-BIT SHIFT REGISTER applied to J, K.and Inputs A thru H.1GG is tested with a momentary GND, then 4, 5V, applied to ciack. =the level of steady: state input at ioputs A thru H, respectively. before the indicated steady-state input conditions were established. QAn, 2Bn:-OGn=the level of 94 or OB thru QG, respectively, before the most: recemt transition of the clock. + For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable device type. +All typical values are at VCC = 5V, TA =25U. @Not more than one output should be shorted at a time. * IPLH =propagation delay time, low-to- high-level output tPHL = propagation delay tine, high-to-tow-level output