IRF3315S/L
PRELIMINARY HEXFET® Power MOSFET
PD - 9.1617B
Absolute Maximum Ratings
11/19/97
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.6
RθJA Junction-to-Ambient ( PCB Mounted,steady-state)** – – – 4 0
Thermal Resistance
°C/W
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V21
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V15 A
IDM Pulsed Drain Current 84
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 94 W
Linear Derating Factor 0.63 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy 350 mJ
IAR Avalanche Current12 A
EAR Repetitive Avalanche Energy9.4 mJ
dv/dt Peak Diode Recovery dv/dt 2.5 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
lAdvanced Process Technology
lSurface Mount (IRF3315S)
lLow-profile through-hole (IRF3315L)
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
Description
VDSS = 150V
RDS(on) = 0.082Ω
ID = 21A
2
D P a k
TO-262
S
D
G
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRF3315L) is available for low-
profile applications.
IRF3315S/L
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 150 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.187 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.082 ΩVGS = 10V, ID = 12A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 17 ––– ––– S VDS = 50V, ID = 12A
––– ––– 25 µA VDS = 150V, VGS = 0V
––– ––– 250 VDS = 120V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 nA VGS = -20V
QgTotal Gate Charge ––– ––– 95 ID = 12A
Qgs Gate-to-Source Charge ––– ––– 11 nC VDS = 120V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 47 VGS = 10V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 9.6 ––– VDD = 75V
trRise Time ––– 32 ––– ID = 12A
td(off) Turn-Off Delay Time ––– 49 ––– RG = 5.1Ω
tfFall Time ––– 38 ––– RD = 5.9Ω, See Fig. 10
Between lead,
––– ––– and center of die contact
Ciss Input Capacitance ––– 1300 ––– VGS = 0V
Coss Output Capacitance ––– 300 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 160 ––– ƒ = 1.0MHz, See Fig. 5
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
IGSS
ns
IDSS Drain-to-Source Leakage Current
nH
7.5
LSInternal Source Inductance
VDD = 25V, starting TJ = 25°C, L = 4.9 mH
RG = 25Ω, IAS = 12A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Notes:
ISD ≤ 12A, di/dt ≤ 140A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Uses IRF3315 data and test conditions
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode)
––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 12A, VGS = 0V
trr Reverse Recovery Time ––– 174 260 n s TJ = 25°C, IF = 12A
Qrr Reverse Recovery Charge ––– 1.2 1.7 µC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
S
D
G
A
21
84
IRF3315S/L
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
1
10
100
0.1 1 10 100
20µs PULSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
3.0
T , Junction Temperature( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
21A
1
10
100
0.1 1 10 100
20µs PULSE WIDTH
T = 175 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
1
10
100
4 5 6 7 8 9 10
V = 50V
20µs PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 175 C
J°
IRF3315S/L
1 10 100
0
500
1000
1500
2000
2500
3000
V , Drain-to-Source Voltage (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1MHz
+ C
+ C
C SHORTED
GS
iss gs gd , ds
rss gd
oss ds gd
Ciss
Coss
Crss
020 40 60 80 100
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
12
V = 30V
DS
V = 75V
DS
V = 120V
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage Fig 8. Maximum Safe Operating Area
0.1
1
10
100
0.2 0.5 0.8 1.1 1.4
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J°
T = 175 C
J°
1
10
100
1000
1 10 100 1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Single Pulse
T
T = 175 C
= 25 C
°°
J
C
V , Drain-to-Source Voltage (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
A
IRF3315S/L
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RGD.U.T.
10V
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
25 50 75 100 125 150 175
0
5
10
15
20
25
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectan
g
ular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRF3315S/L
Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
25 50 75 100 125 150 175
0
200
400
600
800
1000
Starting T , Junction Temperature( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
4.9A
8.5A
12A
IRF3315S/L
Peak Diode Recovery dv/dt Test Circuit
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
* VGS = 5V for Logic Level Devices
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
IRF3315S/L
D2Pak Package Outline
D2Pak
Part Marking Information
10.16 (.400)
R EF.
6.47 (.255)
6.18 (.243)
2.61 (.103)
2.32 (.091)
8.89 (.350)
RE F.
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
5.28 (.208)
4.78 (.188)
4.69 (.185)
4.20 (.165)
10.54 (.415)
10.29 (.405)
- A -
2
1 3 15.49 (.610)
14.73 (.580)
3X 0.93 (.037)
0.69 (.027)
5.08 (.200 )
3X 1.40 (.055)
1.14 (.045)
1.78 (.070)
1.27 (.050)
1.40 (.055)
MAX .
NOTES:
1 D IMEN SIONS AF TER SOL DER DIP.
2 D IM E NS IO N ING & TOLE RA N C IN G P ER AN S I Y 14.5M , 1982.
3 CONTROLLIN G DIMENSION : INCH.
4 HEATSINK & LEAD DIM ENSION S DO NOT INCLUDE BURRS.
0.55 (.022)
0.46 (.018)
0.25 (.010) M B A M MINIMUM RECOMMENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082)
2 X
LEAD ASSIGNM ENTS
1 - GA TE
2 - DR AIN
3 - SO URCE
2.54 (.100)
2 X
PART NUMBER
INTERNATIONAL
RECT IF IER
L OGO DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
ASSEMBL Y
LO T C ODE
F530S
9 B 1 M
9246
A
IRF3315S/L
Package Outline
TO-262 Outline
TO-262
Part Marking Information
IRF3315S/L
Tape & Reel Information
D2Pak
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 11/97
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421) 16 .10 (.63 4)
15 .90 (.62 6)
1.75 (.069 )
1.25 (.049 )
11.60 (.457)
11.40 (.449) 15 .42 (.609 )
15.22 (.601 )
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.06 3)
1.50 (.05 9)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
2 7 .40 (1.0 7 9 )
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197 )
M A X .
26.40 (1.039)
24.40 (.961)
NOTES :
1 . COMFOR MS T O E IA - 4 18 .
2. CONTROLLING DIM ENSION: M ILLIM ETER.
3. D IM ENSIO N MEASUR ED @ HU B.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
