CP00300-TVX0698 1
P
RELIMINARY
D
ATA
S
HEET
Z90231/233/234/239 1
Z8 DIGITAL TELEVISION CONTROLLERS
FEATURES
Z8-Based CMOS Microcontroller for Consum-
er Television, Cable Box, and Satellite Re-
ceiver Applications
42-Pin SDIP Package except Z90239 (124 PGA)
Z8® MCU Core at 6 MHz
Mask ROM sizes Available in 16 and 24KB
Ten 6-bit Pulse Width Modulators
One 14-bit Pulse Width Modulator
On-Chip Infrared (IR) Capture Registers
Four Channel 4-bit Analog-to-Digital Converter
Twenty Seven General Purpose I/O Pins
I2C Master Serial Communication Port
On Screen Display (OSD) Section
Supports Displays up to 10 rows by 24 Columns with
256 Characters
Character Cell Resolution of 14 Pixels by 18 Scan lines
Variable Inte r-row Spacing from 0–15 Horizon tal Scan
Lines
Foreground and Background Colors Fully Programma-
ble by Character
GENERAL DESCRIPTION
The Z9023X Digital Tele vision Controller (DTC) family is
ZiLOG’s latest and most powerful Z8-based DTC product
offering . These part s feature larger syst em RAM and ROM
options, together with a host of new features including a new
color palette system, flexible inter-row spacing, higher
character cell resolution, background mesh effect, dedicated
I.R. capture registers, on-chip Analog-to-Digital conver-
sion, and a hardware Master mode I 2C interface. The famil-
iar Z8 core in combination with these advanced features
makes the Z9023X family an ideal choice for low to mid-
range televisions in both PAL and NTSC markets.
The Z9023X family consists of three basic device types; ICE
Chip (Z90239), ROM Mask Parts (Z90233/Z90234), and
OTP Part (Z 90231). The OTP (Z90231) supports fiel d pro-
grammable 32KB system ROM. ICE Chip (Z90239) is used
in Z90239 Emulator and ProtoPak. As described above,
Z90233 supports 16KB system ROM and Z90234 supports
24KB system ROM for mask.
The Z9021X family takes full advantage of the Z8’s ex-
panded register file space to offer greater flexibility in On
Screen Displa y creation.
Note: All signals with an overline, “ ”, are active Low. For ex-
ample, B/: (WORD is active Low, only); %/W (BYTE
is active Low, only).
Device ROM
(KB) RAM
(Bytes) I/O
Lines1Voltage
Range
Z90231 32(OTP) 236 27 4.5V to 5.5V
Z90233 16 236 27 4.5V to 5.5V
Z90234 24 236 27 4.5V to 5.5V
Z90239 32(ext.) 236 27 4.5V to 5.5V
Note: +VEQWPVUCNNOWZGF+1RQTV
Part_Number
Z8 Digital Television Controllers ZiLOG
2 P R E L I M I N A R Y CP00300-TVX0698
GENERAL DESCRIPTION (Continued)
Power connections follow conventional descriptions below:
Connection Circuit Device
Power VCC VDD
Ground GND VSS, AVSS
Figure 1. Functional Block Diagram
-
2TQITCO41/
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29/
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29/
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DKV
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4'5'6
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2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
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15&:
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29/
29/
29/
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2
2
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Z90231/233/234/239
ZiLOG Z8 Digital Television Controllers
CP00300-TVX0698 P R E L I M I N A R Y 3
PIN IDENTIFICATION
Figure 2. 42-Pin SIDP Pin Identification
29/2
29/2
29/2
29/2
29/2
29/2
29/2
2
2#&%
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2#&%
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2
2
2
229/
229/
229/
229/
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25#
25%.-
25#
25%.-
2
2
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8
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Part_Number
Z8 Digital Television Controllers ZiLOG
4 P R E L I M I N A R Y CP00300-TVX0698
PIN IDENTIFICATION (Continued)
Table 1. Z90231/2 33/2 34 42- Pi n SDIP Package
Pin Number Pin Function I/O/PWR Reset State Name Note
34 +5 Volts PWR PWR VDD
30,13 0 Volts PWR PWR VSS, AVSS
36 Infra Red remote capture input I I IRIN
1 14-bit Pulse Width Modulator output O I PWM11 1
20,19,18,17,2,3,4,5,6,7 6-bit Pulse Width Modulator output O I PWM[10:1] 1
7,6,5,4,3,2,1 Bit Programmable Input/Output ports I/O I P5[6:0]
42,41,40,39,38,37,35,21 Bit programmable Input/Output ports I/O I P2[7:0]
21 Half tone output O I HLFTN
40,42 I2C Data I/O I SDATA0,1
39,41 I2C Clock I/O I SCLK0,1
16,12,10,9 Bit programmable Input/Output ports I/O I P6[3:0]
20,19,18,17,15,14,11,8 Bit programmable Input/Output ports I/O I P4[7:0]
31 Crystal oscill ato r inp ut I I XTAL1
32 Crystal oscillator output O O XTAL 2
28 Dot clock oscillator inpu t I I OSDX1
29 Dot clock oscillator output O O OSDX2
26 Horizontal Sync I I HSYNC
27 Vertical Sync I I VSYNC
25 Video blank O O VBLANK
24,23,22 Video R,G,B O O R,G,B
9,10,11,12 4-bit Analog to Digital converter input AI I ADC[3:0]
33 Device reset I I /RESET
Note:
1. It is Input on POR. It must be configured to be output ports for PWM applications
Z90231/233/234/239
ZiLOG Z8 Digital Television Controllers
CP00300-TVX0698 P R E L I M I N A R Y 5
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This
rating is a s tress rat ing only. Operation of the device at any
conditi on above thos e indicat ed in the oper ational s ections
of these s pecificati ons is not implied. Expo sure to absolut e
maximum rating conditions for extended periods may affect
device reliability
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test con-
dition s as not ed. All volt ag es a re ref er enced to GND. Pos -
itive current flows into the referenced pin (Figure 3).
Symbol Parameters Min Max Units Notes
VDD Power Supply Voltage –0.3 +7 V
VIInput Voltage –0.3 VDD+0.3 V
VOOutput Voltage –0.3 VDD+0.3 V
IOH Output Current High –10 mA per pin
IOH Output Current High –100 mA per device
IOL Output Current Low 20 mA p er pin
IOL Output Current Low 200 mA per device
TAOperating Temperature 0 70 oC
TSTG Storage Temperature –55 150 oC
Figure 3. Test Load Diagram
+5V
From Output
Under Test
150 pF 9.1 kΩ
2.1 kΩ
Part_Number
Z8 Digital Television Controllers ZiLOG
6 P R E L I M I N A R Y CP00300-TVX0698
DC CHARACTERISTICS
6#Q%VQQ%8&&8VQ8(15%/*\
Symbol Parameter Min Typical Max Units Conditions
VDD Power Supply Voltage 4.5 5.00 5.5 V
VIH Input Voltage High 0.7VDD VDD V
VIL Input Voltage Low 0 0.2VDD V
VIHC Input XTAL/Osc in High 0.7VDD VCC V
VILC Input XTAL/Osc In Low 0 0.07VDD V
VOH_ST Output Voltage High VDD–0.4 4.75 V IOH=–2mA for standard drive
VOL_ST Output Voltage Low 0.16 0.4 V IOL=2.00mA for standard drive
VOH_LE Output Voltage High VDD–0.4 V IOH=–0.98mA for low EMI drive
VOL_LE Output Voltage Low 0.4 V IOL=0.66mA for low EMI drive
VHY Schmitt Hysteresis 0.1VDD 0.8 V
IIR Reset Input Current –46 –80 uA VRL=0V
IIL Input Leakage –3.0 0.01 3.0 uA 0V,VDD
IOL Tri-State Leakage –3.0 0.02 3.0 uA 0V,VDD
ICC Supply Current 25 40 mA All inputs at rail;outputs floating
ICC1 HALT Mode Current 3.2 6 mA All inputs at rail;outputs floating
ICC2 STOP Mode Current 0.1 10 uA All inputs at rail;outputs floating
Note: 6[RKECNXCNWGUOGCUWTGFCV
Q
%/KPKOWOCPF/CZKOWOXCNWGUKPFKECVGFHTQO
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Q
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Z90231/233/234/239
ZiLOG Z8 Digital Television Controllers
CP00300-TVX0698 P R E L I M I N A R Y 7
AC CHARACTERISTICS
No Symbol Parameter Min Max Unit
1T
pC Input cloc k per io d 166 100 0 ns
2T
rC, TfC Clock input raise and fall 25 ns
3T
wC Input cloc k width 35 ns
4T
wHSYNCL Timer input low width 70 ns
5T
wHSYNCH Timer input high width 3TpC
6T
pHSYNC Timer input period 8TpC
7T
rHSYNC, TrHSYNC Timer input raise and fall 100 ns
8T
wIL Int request input low 70 ns
9T
wIH Int request input high 3TpC
10 TdPOR Power-On reset delay 25 100 ms
11 TdLVIRES Low voltage detect to internal
RESET condition 200 ns
12 TwRES Reset minimum width 5TpC
13 TdHsOl Hsync start to Vosc stop 2TpV3T
pV
14 TdHsOh Hsync start to Vosc start 1TpV
Part_Number
Z8 Digital Television Controllers ZiLOG
8 P R E L I M I N A R Y CP00300-TVX0698
AC TI M I N G DIAG RA MS
Figure 4. Timing Diagram
:6#. *
5;0%
+430
8
%%
+PVGTPCN4'5'6
'ZVGTPCN4'5'6
*
5;0%
15%:
Z90231/233/234/239
ZiLOG Z8 Digital Television Controllers
CP00300-TVX0698 P R E L I M I N A R Y 9
Pre-Characterization Product:
The product represented by this CPS is newly introduced and
ZiLOG has not completed the full characterization of the
product. The CPS states what ZiLOG knows about this product
at this time, but additional features or non-conformance with
some aspects of the CPS may be found, either by ZiLOG or its
customers in the course of further application and
characterization work. In addition, ZiLOG cautions that delivery
may be uncertain at times, due to start-up yield issues.
© 1998 by ZiLOG, Inc. All rights reserved. No part of this
document may be copied or reproduced in any form or by any
means without the prior written consent of ZiLOG, Inc. The
information in this document is subject to change without notice.
Devices sold by ZiLOG, Inc. are covered by warranty and patent
indemnification provisions appearing in ZiLOG, Inc. Terms and
Condition s of Sale only.
ZILOG, INC. MAKES NO WARRANTY, EXPRESS,
STATUTORY, IMPLIED OR BY DESCRIPTION,
REGARDING THE INFORMATION SET FORTH HEREIN
OR REGARDING THE FREEDOM OF THE DESCRIBED
DEVICES FROM INTELLECTUAL PROPERTY
INFRINGEMENT. ZILOG, INC. MAKES NO WARRANTY
OF MERCHANTABILITY OR FITNESS FOR ANY
PURPOSE.
ZiLOG, Inc. shall not be responsible for any errors that may
appear in this document. ZiLOG, Inc. makes no commitment to
update or keep current the information contained in this
document.
ZiLOG’s products are not authorized for use as critical
components in life support devices or systems unless a specific
written agreement pertaining to such intended use is executed
between the customer and ZiLOG prior to use. Life support
devices or systems are those which are intended for surgical
implantat ion into the b ody, or which sustains life whose fail ure
to perform, when properly used in accordance with instructions
for use provided in the labeling, can be reasonably expected to
result in significant injury to the user.
ZiLOG, Inc.
910 East Hamilton Avenue, Suite 110
Campbell, CA 95008
Telephone (408) 558-8500
FAX 408 558-8300
Internet: http://www.zilog.com
