January 2006 1 MIC705/06/07/08
MIC705/06/07/08 Micrel, Inc.
MIC705/706/707/708
µP Supervisory Circuit
General Description
The MIC705, MIC706, MIC707, and MIC708 are inexpensive
mircoprocessor supervisory circuit that monitors power sup-
plies in microprocessor based systems. The circuit functions
include a watchdog timer, microprocessor reset, backup
battery switchover, power failure warning and a debounced
manual reset input.
The MIC705 and MIC706 offer a watchdog timer function
while the MIC707 and MIC708 have an active high reset
output in addition to the active low reset output.
Supply voltage monitor levels of 4.65V and 4.4V are available.
The MIC705 and MIC707 have a nominal reset threshold level
of 4.65V while the MIC706 and MIC708 have a 4.4V nominal
threshold level. When the supply voltage drops below the
respective reset threshold level, /RESET is asserted.
Typical Application
VCC
RESET
µP
RESET
VCC
MIC705
MIC706
+5V (Regulated)
MR
WDI
I/O Line
PFO
Interrupt
PFI
DC Voltage
(Unregulated)
Manual
Reset
WDO
NMI
Features
Debounced manual reset input is TTL/CMOS
Compatible
Watchdog timer, 1.6s (MIC705/706)
4.65V or 4.40V Precision Voltage Monitor
Early power fail warning or low battery detect
Applications
Automotive systems
Intelligent systems
Critical microprocessor power monitoring
Battery powered computers
Computers
Controllers
Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
Ordering Information
Part Number Temperature Range Package
Standard Pb-Free
MIC70_N MIC70_NY –40ºC to +85ºC 8-Pin PDIP
MIC70_M MIC70_MY –40ºC to +85ºC 8-Pin SOIC
MIC705/06/07/08 Micrel, Inc.
MIC705/06/07/08 2 January 2006
Pin Configuration
1
2
3
4
VCC
GND
PFI
8
7
6
5
WDO
RESET
WDI
PFO
MIC705
MIC706
MR
PFO
1
2
3
4
VCC
GND
PFI
8
7
6
5
RESET
RESET
NC
PFO
MIC707
MIC708
MR
PFO
8-Pin PDIP Package
8-Pin SOIC Package
Pin Description
Pin Number Pin Number Pin Name Pin Function
MIC705/06 MIC707/08
1 1 /MR Manual Reset Input forces /RESET to assert when pulled below 0.8V. An
internal pull-up current of 250µA on this input forces it high when left floating.
this input can also be driven from TTL or CMOS logic.
2 2 VCC Primary supply input, +5V
3 3 GND IC ground pin, 0V reference
4 4 PFI Power Fail Input. Internally connected to the power fail comparator which
is referenced to 1.25V. The Power Fail Output (/PFO) remains high if PFI
is above 1.25V. PFI should be connected to GND or VOUT if the power fail
comparator is not used.
5 5 /PFO Power Fail Output. The power fail comparator is independent of all other
function on this device.
6 N/A WDI Watch Dog Input. The WDI input monitors microprcessor activity, an internal
watchdog timer resets itself with each transition on the watchdog input. If the
WDIpin is held high or low for longer than the watchog timeout period, /WDO
is forced to active low. the watchdog function can be diabled by floating the
WDI pin.
N/A 6 N/C Not Internally Connected
7 7 /RESET /RESET is asserted if either VCCgoes below the reset threshold voltage or
by low signal on the manual reset input (/MR). /RESET remains asserted for
one reset timeout period (200ms) after VCC exceeds the reset threshold volt-
age or after the manual reset pin transition from low to high. The watchdog
timer will not assert /RESET unless /WDO is connected to /MR
8 N/A /WDO Output for the Watchdog Timer. The watchdog timer resets itself with each
transition o the watchdog input. If the WDI pin is held high or low for longer
than the watchdog timeout period, /WDO is forced low. /WDO will also be
forced low id VCC is below the reset threshold voltageand will remain low
until VCC returns to a valid level.
N/A 8 RESET RESET is the compliment of /RESET and is asserted if either VCC goes be-
low the reset threshold voltage or by a low signal on the manual reset input
(/MR). RESET is suitable for microprocessor systems that use active high
reset.
January 2006 3 MIC705/06/07/08
MIC705/06/07/08 Micrel, Inc.
Electrical Characteristics(3)
VCC = 4.75V to 5.5V for MIC705/07; VCC = 4.5V to 5.5V for MIC706/08; TA = Operating Temperature Range, bold values indicate
–40°C ≤ TA ≤ +85°C; unless noted
Parameter Conditions Min. Typ. Max Units
Operating Voltage Range, VCC MIC70_ 1.4 5.5 V
Supply Current MIC70_ 60 µA
Reset Voltage Threshold MIC705, MIC707
MIC706, MIC708
4.50
4.25
4.65
4.4
4.75
4.5
V
V
Reset Threshold Hysteresis 40 mV
Reset Pulse Width, tRS 140 200 280 ms
/RESET Output Voltage ISource = 80µA
ISink = 3.2mA
MIC70_C, ISink = 50µA, VCC = 1.4V
VCC - 1.5V
0.4
0.3
V
V
V
RESET Output Voltage ISource = 80µA
ISink = 3.2mA
VCC - 1.5V
0.4
V
V
Watchdog Timeout Period, tWD 1.0 1.6 2.25 sec
WDI Minimum Input Pulse, tWP VIL = 0.4V, VIH = 80% of VCC 50 ns
WDI Threshold Voltage VIH, VCC = 5V
VIL, VCC = 5V
3.5
0.8
V
V
WDI Input Current WDI = 0V
WDI = VCC
-150 -50
50
150
µA
µA
WDO Output Voltage ISource = 800µA
ISink = 1.2mA
VCC - 1.5V
0.4
V
V
/MR Pull-Up Current /MR = 0V 100 250 600 µA
/MR Pulse Width, tMR 150 ns
/MR Input Threshold VIL
VIH
2.0
0.8 V
V
/MR to Reset Output Delay, tMD 250 ns
PFI Input Threshold VCC = 5V 1.2 1.25 1.3 V
PFI Input Current -25 0.01 +25 nA
/PFO Output Voltage ISink = 3.2mA
VCC = 5V, ISource = 800µA
VCC - 1.5V
0.4 V
V
Note 1. Exceeding the absolute maximum rating may damage the device.
Note 2. The device is not guaranteed to function outside its operating rating.
Note 3. Specification for packaged product only.
Absolute Maximum Ratings(1)
Terminal Voltage
VCC ..........................................................–0.3V to +6.0V
All other inputs .............................–0.3V to (VOUT + 0.3V)
Input Current
VCC, Gnd ................................................................ 25mA
Output Current (all outputs) ........................................ 20mA
Lead Temperature (soldering, 10 sec.) ...................... 300°C
Storage Temperature ................................ –65°C to +150°C
Operating Ratings(2)
Operating Temperature Range
MIC70_N ................................................ –40°C to +85°C
MIC70_M ................................................ –40°C to +85°C
Power Dissipation (PDIP) ........................................ 475mW
Power Dissipation (SOP) ......................................... 400mW
MIC705/06/07/08 Micrel, Inc.
MIC705/06/07/08 4 January 2006
Timing Diagram
Timing Diagram for Reset
January 2006 5 MIC705/06/07/08
MIC705/06/07/08 Micrel, Inc.
Block Diagrams
* 4.4V for MIC706
MIC705/MIC706 Block diagram
µ
* 4.4V for MIC708
MIC707/MIC708 Block diagram
MIC705/06/07/08 Micrel, Inc.
MIC705/06/07/08 6 January 2006
Applications Information
Battery Switchover Section
The MIC691/693 monitors the supply voltage applied to the
VCC pin. Whenever VCC falls below the reset threshold voltage
and VBATT, the device enters battery-backup mode. When this
happens, the auxiliary supply on VBATT is routed through a
low impedance PMOS switch to the VOUT pin. The VOUT pin
is capable of sourcing up to 25mA when in the backup mode.
VCC is routed to VOUT through a large PMOS switch during
normal operation (VCC > VBATT) and can source continuous
currents of up to 250mA. VOUT can be used to drive CMOS
RAM. The BATT ON Pin can be used to indicate the status
of battery backup mode or as the base drive for an external
pass transistor when VOUT has to source more than 25mA
in battery-backup mode. VCC is connected to VOUT and the
substrate whenever VCC exceeds the reset threshold. If
VBATT is connected to a voltage source that is greater than
0.6V above VCC, the parasitic diode of the VBATT switch will
conduct from the VBATT to the substrate.
Microprocessor Reset
The /RESET pin is asserted whenever VCC falls below the
reset threshold voltage. The reset pin remains asserted for a
period of 200ms after VCC has risen above the reset thresh-
old voltage. The reset timeout period can also be selected
by the end user, see Table 1. The reset function ensures the
microprocessor is properly reset and powers up into a known
condition after a power failure. /RESET will remain valid with
VCC as low as 1.4V and when auxiliary power is connected
to VBATT (VBATT > 2.0V), the reset pin will remain valid with
VCC from 0V to 5.5V.
Chip Enable Gating
The MIC691/693 also include memory protection circuitry
which inhibits the writing of memory during a power fail con-
dition. During normal operation, chip enable transitions are
gated througha series transmission gate from /CE IN to /CE
OUT. The typical propagation delay through the chip enable
gating circuitry is 2ns. /CE OUT follows /CE IN unless VCC
drops below the reset threshold voltage, at which time /CE OUT
will remain high until VCC returns to a valid level. EEPROMs
can be write protected in a similar manner by connecting the
/CE OUT pin to the store or write input.
Power Fail Warning
An additional comparator which is independent of the other
functions on the MIC691/693 is provided for early warning
of power failure. An external voltage divider can be used to
compare unregulated DC to an internal 1.25V reference. The
voltage divider ratio on the input of the power-fail comparator
(PFI) can be chosen so as to trip the power fail comparator a
few milliseconds before VCC falls below the maximum reset
threshold voltage. The output of the power-fail comparator
(/PFO) can be used to interrupt the microprocessor when
used in this mode and execute shut-down procedures prior
to power loss. Hysteresis can be added to this comparator
with external resistors, as is commonly done with any com-
parator. When VCC < VBATT - 1.2V (typ.), the power-fail
comparator is turned off and /PFO is pulled low in order to
conserve power.
+
-
1.25V
R1
R2
Unregulated DC
PFO
PFI
Power Fail Comparator
Watchdog Timer
The microprocessor can be monitored by connecting the
WDI pin (watchdog input) to a bus line or an I/O line. If a
transition doesn't occur on the WDI pin with in the watchdog
timeout (Table 1.), the microprocessor is reset. /RESET will
remain asserted for 200ms when this occurs. A minimum
pulse of 100ns or any transition low-to-high or high-to-low
on the WDI pin will reset the watchdog timer. The output of
the watchdog timer (WDO) will remain high, if WDI sees a
valid transition within the watchdog period or if VCC falls
below the reset threshold as the watchdog timer is disabled
when this happens.
January 2006 7 MIC705/06/07/08
MIC705/06/07/08 Micrel, Inc.
Package Information
0.260
0.240
0.400
0.370
0.023
0.015
0.110
0.090
0.150
0.120
0.150
0.125
0.035
0.015
0.370
0.300
0.310
0.290
8-Pin PDIP (N)
8-Pin SOIC (M)
MICREL INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com
This information furnished by Micrel in this data sheet is believed to be accurate and reliable. However no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's
use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2000 Micrel, Inc.