Switched Capacitor Interfacing 6 Application Note
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Notice R is replaced by a capacitor and two switches. The function of the resistor is now approximated by
transferring charge from vi(t) to the inverting input of the opamp at intervals determined by clocks 1 and 2.
To ensure complete charge transfer 1 and 2 must not overlap as shown in Figure 7.
An approximate analysis of Figure 6 reveals the average current through the switches is
)v-(v
R
1
i
or
)v-(v
T
C
T
q
i
1i
1i
1
Where:
1
C
T
R
Looking back at the previous example for a pole frequency of 3000Hz, using T=10s (fclk=100kHz), yields
C1=1.885 pF. Hence, the integrator can be realized with two capacitors that track with process and
temperature. No longer is the absolute value of the capacitors important, only their ratio.
t
φ1
on
off
φ2
on
off
T
T
t
Figure 7: Non-overlapping clocks for SC Integrator
4. Anti-aliasing and Smoothing Filters for SCNs [2]
SCFs approximate active-RC filters by replacing resistors with switched capacitors. As the clock frequency
(sampling rate) tends towards infinity the SCF becomes equivalent to the continuous time filter. In other
words, higher clock frequency yields a better approximation of the desired response. Also, higher clock
frequency lessens the requirements of the anti-aliasing filter (AAF) and smoothing filter (SMF). However,
there are upper limits on clock frequency. Although SCFs have been implemented with clock frequencies
greater than 1MHz, typical telecom filters (BW less than 10kHz) are clocked at or below 250kHz.
One factor which opposes higher clock frequencies is large capacitor ratios. Referring to the example in
section 3.0,
using 1MHz in place of 100kHz, C1 becomes 0.1885 pf. The ratio between C1 and C2 is now 53.05 where it
was 5.305. Large capacitor ratios consume more silicon area and are more sensitive to process and
temperature variations. Hence, the final sampling rate is a compromise between SCF implementation
complexity and SMF/AAF requirements.
SMFs and AAFs can be integrated, but they are subject to the same problems associated with the continuous
time RC integrator discussed in section 3.0 and are generally implemented externally. In some cases, where
input and output signals are band limited externally, additional circuitry for AAFs and SMFs is not required. A
block diagram of a typical SCF system, including AAF and SMF is shown in Figure 8.