Notes through are on page 8
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07/06/04
IRF8010PbF
SMPS MOSFET HEXFET® Power MOSFET
VDSS RDS(on) max ID
100V 15m80A
PD - 95505
TO-220AB
Applications
lHigh frequency DC-DC converters
lUPS and Motor Control
lLead-Free
Benefits
lLow Gate-to-Drain Charge to Reduce
Switching Losses
lFully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
lFully Characterized Avalanche Voltage
and Current
lTypical RDS(on) = 12m
Absolute Maximum Ratings
Parameter Units
ID @ TC = 25 °C Co ntin uous D rain Cur r e nt, VGS @ 1 0V
ID @ TC = 10 C Co ntin uous D rain Cur r e nt, VGS @ 1 0V A
IDM
Pulsed D rai n C urrent
c
PD @TC = 25°C Power Dissipation W
Linear Derati ng Fact or W/°C
VGS Gat e- to-Source Volt age V
dv/dt
P ea k Diod e R ec over y dv /dt
e
V/ns
TJ Operatin g Junction and
TSTG Sto rage Te m pe r at ur e Ra ng e °C
Soldering Temperature, for 10 seconds
Mou ntin g torque, 6-32 or M3 screw N•m (lbf•i n)
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.57
RθCS Ca s e- to-S i n k , Fl at, G reased Surface 0. 5 0 ––– ° C/ W
RθJA Junction-to-Ambient ––– 62
-55 to + 17 5
300 (1.6m m from case )
1.1(10)
Max.
80
h
57
320
260
1.8
± 20
16
IRF8010PbF
2www.irf.com
S
D
G
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
V
(BR)DSS D r ai n- to-Sou rce Breakdown V ol t a ge 100 ––– ––– V
V
(BR)DSS
/
J Breakdown Voltage Temp. Coefficient ––– 0.11 ––– V/°C
R
DS(on) Stat i c Dr ain-to-Sou rce On-R e sis tance –– 12 15
m
V
GS(th) Gate Threshold Voltage 2.0 –– 4.0 V
I
DSS Dr ai n- to-Sou rce Leaka ge Cu rr ent ––– ––– 20 µA
––– –– 250
I
GSS Gate-to-Sou rce For w ard Leakage ––– ––– 200 nA
Gate-to-Sour c e R ev ers e Leakage ––– ––– -20 0
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
gfs Forwa rd Transconductance 82 ––– ––– V
Q
gTotal Gat e Charge ––– 81 120
Q
gs Gate-to-Sour c e C ha r ge ––– 22 –– nC
Q
gd Gate-to- D rain ("M iller") Ch arge ––– 26 –––
t
d(on) Turn-On Delay Time ––– 15 –––
t
rRise Time ––– 13 0 –––
t
d(off) Turn-Of f Delay Tim e ––– 61 –– n s
t
fFall Time –– 120 ––
C
iss Input Capacitance ––– 3830 ––
C
oss Output Capacitance ––– 480 –––
C
rss Reve r s e Tr a ns fer C ap ac ita nc e ––– 59 –– pF
C
oss Output Capacitance ––– 3830 ––
C
oss Output Capacitance ––– 280 –––
C
oss
eff.
Ef f e cti v e O utpu t C ap aci tance ––– 530 –––
Avalanche Char acteristi cs
Parameter Units
E
AS
Si ngle Pulse A v ala nc h e E n er g y
dh
mJ
I
AR
Avalanche Current
c
A
E
AR
Repetitive Avalanch e Energy
c
mJ
Diode Charac teristics
Pa rame t e r Min. Typ . Max . Units
ISContinuous Source Current ––– ––– 80
(Body Diode) A
ISM Pulsed Source Current ––– ––– 320
(Body Diode)
ch
VSD Diode Fo rward Voltage –– ––– 1.3 V
trr Reverse Recovery Time ––– 99 150 ns
Qrr Reverse RecoveryCharge ––– 460 700 nC
ton Forward Turn-On Time Intrinsic turn-on time is neg ligible ( turn-on is dominated by L S+LD)
Typ.
–––
–––
–––
Conditions
VDS = 25V , I D = 45A
ID = 80A
VDS = 80V
Conditions
26
VGS = 10V
f
VGS = 0V
VDS = 25V
ƒ = 1. 0M H z
310
45
MOSFET symbol
showing the
integra l revers e
p-n junction diode.
TJ = 25°C, IS = 80A, VGS = 0V
f
TJ = 150°C, IF = 80A, VDD = 50V
di /dt = 10 0A s
f
Conditions
VGS = 0V, ID = 250µA
Refe rence to 2 5 °C, ID = 1mA
VGS = 10V, ID = 45A
f
VDS = VGS, ID = 250µ A
VDS = 100V, VGS = 0V
VDS = 100V, VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
Max.
VGS = 0 V, VDS = 1.0V, ƒ = 1.0MH
z
VGS = 0 V, VDS = 80V, ƒ = 1.0M H
z
VGS = 0V, VDS = 0V to 80V
e
VGS = 10V
f
VDD = 50V
ID = 80A
RG = 39
IRF8010PbF
www.irf.com 3
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
-60 -40 -20 020 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
T , Junction Temperature ( C)
R , Dra in-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
80A
0.1 110 100
VDS, Drai n-to-Source Vol t age (V)
0.1
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
4.0V
20µs PULSE WIDTH
Tj = 25°C
VGS
TOP 15V
12V
10V
6.0V
5.5V
5.0V
4.5V
BOTTOM 4.0V
0.1 110 100
VDS, Dr ain-to- Source Voltage (V )
1
10
100
1000
ID, Drain-to-Source Current (A)
4.0V
20µs PU LSE WIDTH
Tj = 175° C
VGS
TOP 15V
12V
10V
6.0V
5.5V
5.0V
4.5V
BOTTOM 4.0V
2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0
VGS, G ate-to- Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (Α)
TJ = 25°C
TJ = 175°C
VDS = 50V
20µs PU LSE WIDTH
IRF8010PbF
4www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0.1
1
10
100
1000
0.0 0.5 1.0 1.5 2.0
V ,Source-to-Drain Voltage (V)
I , R ev ers e D rain C urrent (A)
SD
SD
V = 0 V
GS
T = 175 C
J°
T = 25 C
J°
110 100
VDS, Dr ain-to- Source Voltage (V )
10
100
1000
10000
100000
C, Capacitance(pF)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
1 10 100 1000
VDS, Drain-to-Sour ce Voltage (V)
0.1
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175° C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
0 20406080100
QG Tot al Gate C harge (nC)
0
2
4
6
8
10
12
VGS, Gate-to-Source Voltage (V)
VDS= 80V
VDS= 50V
VDS= 20V
ID= 80A
IRF8010PbF
www.irf.com 5
Fig 10a. Switching Time Test Circuit
V
DS
9
0%
1
0%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25 50 75 100 125 150 175
0
20
40
60
80
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
LIMITED BY PACKAGE
IRF8010PbF
6www.irf.com
Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
D
S
I
D
I
G
3mA
V
GS
.3µF
50K
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
25 50 75 100 125 150 175
0
100
200
300
400
500
600
Starting Tj, Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
AS
°
ID
TOP
BOTTOM
18A
32A
45A
IRF8010PbF
www.irf.com 7
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
R
e-Applied
V
oltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFET® Power MOSFETs
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RG
VDD
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
*
IRF8010PbF
8www.irf.com
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.07/04
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 0.31mH, RG = 25,
IAS = 45A.
ISD 45A, di/dt 110A/µs, VDD V(BR)DSS,
TJ 175°C.
Notes:
Pulse width 300µs; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
TO-220 package is not recommended for Surface Mount Application.
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
- B -
1. 32 (.052)
1. 22 (.048)
3X 0.55 (. 022)
0.46 (. 018)
2.92 (. 115)
2.64 (. 104)
4.69 (.185)
4.20 (.165)
3X 0 .93 ( .037)
0 .69 ( .027)
4. 06 (.1 6 0)
3. 55 (.1 4 0)
1.15 (. 045)
MIN
6.47 (.255)
6.10 (.240)
3.78 (.149)
3.54 (.139)
- A -
10.54 (.415)
10.29 (.405)
2. 87 (. 11 3)
2. 62 (. 10 3)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
3X 1.40 (.055)
1.15 (.045)
2.54 (. 100)
2X
0 .36 (.0 14) M B A M
4
1 2 3
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLI NE TO-220AB.
2 CONTRO LLING DIMENSI ON : INCH 4 HEATSI NK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
HEXFET
1- GATE
2- DRAIN
3- SOURCE
4- DRAIN
LEAD ASSIGNMENTS
IGBTs, CoP A C
K
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
EXAMPLE:
I N THE ASSEMBLY LI NE "C"
THIS IS AN IRF1010
LOT C OD E 1789
ASSEMBLED ON WW 19, 1997 PART NUMBE
R
ASSEMBLY
LOT CODE
DATE CO DE
YEAR 7 = 1997
LINE C
WEEK 19
LOGO
RECTIFIER
INTERNATIONAL
Note: "P " in a ss e m bly lin e
pos ition ind icates "Lead-Free"
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/