1. Product profile
1.1 General description
NPN/NPN double low VCEsat Breakthrough In Small Signal (BISS) transistor in a medium
power Surface-Mounted Device (SMD) plastic package.
1.2 Features
nLow collector-emitter saturation voltage VCEsat
nHigh collector current capability IC and ICM
nHigh collector current gain (hFE) at high IC
nHigh efficiency due to less heat generation
nSmaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
nDual low power switches (e.g. motors, fans)
nAutomotive
1.4 Quick reference data
[1] Pulse test: tp300 µs; δ≤0.02.
PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
Rev. 01 — 3 April 2007 Product data sheet
Table 1. Product overview
Type number Package NPN/PNP
complement PNP/PNP
complement
Nexperia Name
PBSS4350SS SOT96-1 SO8 PBSS4350SPN PBSS5350SS
Table 2. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
VCEO collector-emitter voltage open base - - 50 V
ICcollector current - - 2.7 A
ICM peak collector current single pulse;
tp1ms --5 A
RCEsat collector-emitter
saturation resistance IC=2A;
IB= 200 mA [1] - 90 130 m
PBSS4350SS_1
Product data sheet Rev. 01 — 3 April 2007 2 of 14
Nexperia PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
2. Pinning information
3. Ordering information
4. Marking
5. Limiting values
Table 3. Pinning
Pin Description Simplified outline Symbol
1 emitter TR1
2 base TR1
3 emitter TR2
4 base TR2
5 collector TR2
6 collector TR2
7 collector TR1
8 collector TR1
4
5
1
8
006aaa966
8765
1234
TR1 TR2
Table 4. Ordering information
Type number Package
Name Description Version
PBSS4350SS SO8 plastic small outline package; 8 leads; body width
3.9 mm SOT96-1
Table 5. Marking codes
Type number Marking code
PBSS4350SS 4350SS
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per transistor
VCBO collector-base voltage open emitter - 50 V
VCEO collector-emitter voltage open base - 50 V
VEBO emitter-base voltage open collector - 5 V
ICcollector current - 2.7 A
ICM peak collector current single pulse;
tp1ms -5A
IBbase current - 0.5 A
Ptot total power dissipation Tamb 25 °C[1] - 0.55 W
[2] - 0.87 W
[3] - 1.43 W
© Nexperia B.V. 2017. All rights reserved
PBSS4350SS_1
Product data sheet Rev. 01 — 3 April 2007 3 of 14
Nexperia PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
Per device
Ptot total power dissipation Tamb 25 °C[1] - 0.75 W
[2] - 1.2 W
[3] -2W
Tjjunction temperature - 150 °C
Tamb ambient temperature 65 +150 °C
Tstg storage temperature 65 +150 °C
(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm2
(3) FR4 PCB, standard footprint
Fig 1. Per device: Power derating curves
Table 6. Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Tamb (°C)
75 17512525 7525
006aaa967
1.0
1.5
0.5
2.0
2.5
Ptot
(W)
0
(1)
(2)
(3)
© Nexperia B.V. 2017. All rights reserved
PBSS4350SS_1
Product data sheet Rev. 01 — 3 April 2007 4 of 14
Nexperia PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
6. Thermal characteristics
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
Table 7. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
Rth(j-a) thermal resistance from
junction to ambient in free air [1] - - 227 K/W
[2] - - 144 K/W
[3] --87K/W
Rth(j-sp) thermal resistance from
junction to solder point --40K/W
Per device
Rth(j-a) thermal resistance from
junction to ambient in free air [1] - - 167 K/W
[2] - - 104 K/W
[3] --63K/W
FR4 PCB, standard footprint
Fig 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aaa809
10
1
102
103
Zth(j-a)
(K/W)
101
10510102
104102
101tp (s)
103103
1
0.01
0
0.02
0.05
0.1
0.2
0.33
0.5
0.75
1.0
duty cycle =
© Nexperia B.V. 2017. All rights reserved
PBSS4350SS_1
Product data sheet Rev. 01 — 3 April 2007 5 of 14
Nexperia PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
FR4 PCB, mounting pad for collector 1 cm2
Fig 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
Ceramic PCB, Al2O3, standard footprint
Fig 4. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aaa810
10
1
102
103
Zth(j-a)
(K/W)
101
10510102
104102
101tp (s)
103103
1
duty cycle =
0.01
0
0.02
0.05
0.1
0.2
0.33
0.5
0.75
1.0
006aaa811
tp (s)
104102103
101103101
102
102
10
103
Zth(j-a)
(K/W)
1
0.02
0.05
0.1
0.2
0.33
0.5
0.75
1.0
0
0.01
duty cycle =
© Nexperia B.V. 2017. All rights reserved
PBSS4350SS_1
Product data sheet Rev. 01 — 3 April 2007 6 of 14
Nexperia PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
7. Characteristics
[1] Pulse test: tp300 µs; δ≤0.02.
Table 8. Characteristics
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
ICBO collector-basecut-off
current VCB =50V; I
E= 0 A - - 100 nA
VCB =50V; I
E=0A;
Tj= 150 °C--50µA
ICES collector-emitter
cut-off current VCE =50V; V
BE = 0 V - - 100 nA
IEBO emitter-base cut-off
current VEB =5V; I
C= 0 A - - 100 nA
hFE DC current gain VCE =2V; I
C= 100 mA 300 520 -
VCE =2V; I
C= 500 mA [1] 300 500 -
VCE =2V; I
C=1A [1] 300 470 -
VCE =2V; I
C=2A [1] 200 340 -
VCE =2V; I
C= 2.7 A [1] 120 180 -
VCEsat collector-emitter
saturation voltage [1]
IC= 0.5 A; IB= 50 mA - 50 80 mV
IC= 1 A; IB= 50 mA - 100 160 mV
IC= 2 A; IB= 100 mA - 190 280 mV
IC= 2 A; IB= 200 mA - 180 260 mV
IC= 2.7 A; IB= 270 mA - 240 340 mV
RCEsat collector-emitter
saturation resistance IC= 2 A; IB= 200 mA [1] - 90 130 m
VBEsat base-emitter
saturation voltage [1]
IC= 2 A; IB= 100 mA - 0.95 1.1 V
IC= 2.7 A; IB= 270 mA - 1.1 1.2 V
VBEon base-emitter turn-on
voltage VCE =2V; I
C=1A [1] - 0.8 1.2 V
tddelay time VCC =10V; I
C=2A;
IBon = 100 mA;
IBoff =100 mA
-8-ns
trrise time - 96 - ns
ton turn-on time - 104 - ns
tsstorage time - 355 - ns
tffall time - 165 - ns
toff turn-off time - 520 - ns
Cccollector capacitance VCB =10V; I
E=i
e=0A;
f=1MHz - 1825pF
© Nexperia B.V. 2017. All rights reserved
PBSS4350SS_1
Product data sheet Rev. 01 — 3 April 2007 7 of 14
Nexperia PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
VCE =2V
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =55 °C
Tamb =25°C
Fig 5. DC current gain as a function of collector
current; typical values Fig 6. Collector current as a function of
collector-emitter voltage; typical values
VCE =2V
(1) Tamb =55 °C
(2) Tamb =25°C
(3) Tamb = 100 °C
IC/IB=20
(1) Tamb =55 °C
(2) Tamb =25°C
(3) Tamb = 100 °C
Fig 7. Base-emitter voltage as a function of collector
current; typical values Fig 8. Base-emitter saturation voltage as a function of
collector current; typical values
006aaa968
400
600
200
800
1000
hFE
0
IC (mA)
101104
103
110
2
10
(1)
(2)
(3)
VCE (V)
0 2.01.60.8 1.20.4
006aaa969
2
3
1
4
5
IC
(A)
0
IB (mA) = 100 90
10
80 70
60 50
40
30
20
006aaa970
0.4
0.8
1.2
VBE
(V)
0
IC (mA)
101104
103
110
2
10
(1)
(2)
(3)
006aaa971
0.6
1.0
1.4
VBEsat
(V)
0.2
IC (mA)
101104
103
110
2
10
(1)
(2)
(3)
© Nexperia B.V. 2017. All rights reserved
PBSS4350SS_1
Product data sheet Rev. 01 — 3 April 2007 8 of 14
Nexperia PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =55 °C
Tamb =25°C
(1) IC/IB= 100
(2) IC/IB=50
(3) IC/IB=10
Fig 9. Collector-emitter saturation voltage as a
function of collector current; typical values Fig 10. Collector-emitter saturation voltage as a
function of collector current; typical values
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =55 °C
Tamb =25°C
(1) IC/IB= 100
(2) IC/IB=50
(3) IC/IB=10
Fig 11. Collector-emitter saturation resistance as a
function of collector current; typical values Fig 12. Collector-emitter saturation resistance as a
function of collector current; typical values
006aaa972
101
102
1
VCEsat
(V)
103
IC (mA)
101104
103
110
2
10
(1)
(2)
(3)
006aaa973
101
102
1
VCEsat
(V)
103
IC (mA)
101104
103
110
2
10
(1)
(2)
(3)
IC (mA)
101104
103
110
2
10
006aaa974
1
101
102
10
103
RCEsat
()
102
(1)
(2)
(3)
IC (mA)
101104
103
110
2
10
006aaa975
1
101
102
10
103
RCEsat
()
102
(1)
(2)
(3)
© Nexperia B.V. 2017. All rights reserved
PBSS4350SS_1
Product data sheet Rev. 01 — 3 April 2007 9 of 14
Nexperia PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
8. Test information
Fig 13. BISS transistor switching time definition
VCC =10V; I
C= 2 A; IBon = 100 mA; IBoff =100 mA
Fig 14. Test circuit for switching times
006aaa003
IBon (100 %)
IB
input pulse
(idealized waveform)
IBoff
90 %
10 %
IC (100 %)
IC
tdton
90 %
10 %
tr
output pulse
(idealized waveform)
tf
t
ts
toff
RC
R2
R1
DUT
mlb826
Vo
RB(probe)
450
(probe)
450
oscilloscope oscilloscope
VBB
VI
VCC
© Nexperia B.V. 2017. All rights reserved
PBSS4350SS_1
Product data sheet Rev. 01 — 3 April 2007 10 of 14
Nexperia PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
9. Package outline
10. Packing information
[1] For further information and the availability of packing methods, see Section 14.
Fig 15. Package outline SOT96-1 (SO8)
03-02-18Dimensions in mm
1.0
0.4
1.75
pin 1 index
0.49
0.36 0.25
0.19
5.0
4.8
4.0
3.8
6.2
5.8
1.27
Table 9. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number Package Description Packing quantity
1000 2500
PBSS4350SS SOT96-1 8 mm pitch, 12 mm tape and reel -115 -118
© Nexperia B.V. 2017. All rights reserved
PBSS4350SS_1
Product data sheet Rev. 01 — 3 April 2007 11 of 14
Nexperia PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
11. Soldering
Fig 16. Reflow soldering footprint SOT96-1 (SO8)
Fig 17. Wave soldering footprint SOT96-1 (SO8)
sot096-1_fr
occupied area
solder lands Dimensions in mm
placement accuracy ± 0.25
1.30
0.60 (8×)
1.27 (6×)
4.00 6.60
5.50
7.00
sot096-1_fw
solder resist
occupied area
solder lands Dimensions in mm
board direction
placement accurracy ± 0.25
4.00
5.50
1.30
0.3 (2×)
0.60 (6×)
1.20 (2×)
1.27 (6×)
7.00
6.60
enlarged solder land
© Nexperia B.V. 2017. All rights reserved
PBSS4350SS_1
Product data sheet Rev. 01 — 3 April 2007 12 of 14
Nexperia PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
12. Revision history
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PBSS4350SS_1 20070403 Product data sheet - -
© Nexperia B.V. 2017. All rights reserved
PBSS4350SS_1
Product data sheet Rev. 01 — 3 April 2007 13 of 14
Nexperia PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
13. Legal information
13.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
13.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable.However,Nexperiadoesnotgiveanyrepresentationsor
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — Nexperiareservestherighttomake
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — Nexperia products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunctionofaNexperiaproductcanreasonablybeexpectedto
result in personal injury, death or severe property or environmental damage.
Nexperia accepts no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — Nexperia products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nexperia.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by Nexperia. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
For additional information, please visit: http://www.nexperia.com
For sales office addresses, send an email to: salesaddresses@nexperia.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
© Nexperia B.V. 2017. All rights reserved
Nexperia PBSS4350SS
50 V, 2.7 A NPN/NPN low VCEsat (BISS) transistor
15. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 9
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
10 Packing information. . . . . . . . . . . . . . . . . . . . . 10
11 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
13.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
14 Contact information. . . . . . . . . . . . . . . . . . . . . 13
15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
03 April 2007