LM3405AXMY/NOPB - NATIONAL SEMICONDUCTOR

LM3405A

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EN/DIM

BOOST

GND

C3 L1

OFF C4

VOUT

D2D3

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

LM3405A

SNVS508D –OCTOBER 2007–REVISED SEPTEMBER 2016

LM3405A 1.6-MHz, 1-A Constant Current Buck LED Driver With Internal Compensation in

Tiny SOT and MSOP-PowerPAD™ Packages

1 Features

1• VIN Operating Range of 3 V to 22 V

• Drives up to 5 High-Brightness LEDs in Series at

1 A

• Thin SOT-6 and MSOP-PowerPAD™-8 Packages

• 1.6-MHz Switching Frequency

• EN/DIM Input for Enabling and PWM Dimming of

LEDs

• 300-mΩNMOS Switch

• 40-nA Shutdown Current at VIN =5V

• Internally Compensated Current-mode Control

• Cycle-by-Cycle Current Limit

• Input Voltage UVLO

• Overcurrent Protection

• Thermal Shutdown

2 Applications

• LED Drivers

• Constant Current Sources

• Industrial Lighting

• LED Flashlights

• LED Lightbulbs

3 Description

The LM3405A is a 1-A constant current buck LED

driver designed to provide a simple, high efficiency

solution for driving high power LEDs. With a 0.205-V

reference voltage feedback control to minimize power

dissipation, an external resistor sets the current as

needed for driving various types of LEDs. Switching

frequency is internally set to 1.6 MHz, allowing small

surface mount inductors and capacitors to be used.

The LM3405A uses current-mode control and internal

compensation offering ease of use and predictable,

high performance regulation over a wide range of

operating conditions. With a maximum input voltage

of 22 V, the device can drive up to 5 High-Brightness

LEDs in series at 1-A forward current, with the single

LED forward voltage of approximately 3.7 V.

Additional features include user accessible EN/DIM

pin for enabling and PWM dimming of LEDs, thermal

shutdown, cycle-by-cycle current limit and overcurrent

protection.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

LM3405A SOT (6) 2.90 mm × 1.60 mm

MSOP-PowerPAD (8) 3.00 mm × 3.00 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Typical Application Circuit Efficiency vs LED Current (VIN = 12 V)

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Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description............................................................. 1

4 Revision History..................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 4

6.1 Absolute Maximum Ratings ..................................... 4

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 5

6.5 Electrical Characteristics........................................... 5

6.6 Typical Characteristics.............................................. 6

7 Detailed Description.............................................. 8

7.1 Overview................................................................... 8

7.2 Functional Block Diagram......................................... 9

7.3 Feature Description................................................... 9

7.4 Device Functional Modes........................................ 14

8 Application and Implementation ........................ 15

8.1 Application Information............................................ 15

8.2 Typical Applications ................................................ 19

8.3 System Examples ................................................... 21

9 Power Supply Recommendations...................... 25

10 Layout................................................................... 25

10.1 Layout Guidelines ................................................. 25

10.2 Layout Example .................................................... 25

11 Device and Documentation Support................. 26

11.1 Documentation Support ........................................ 26

11.2 Receiving Notification of Documentation Updates 26

11.3 Community Resource............................................ 26

11.4 Trademarks........................................................... 26

11.5 Electrostatic Discharge Caution............................ 26

11.6 Glossary................................................................ 26

12 Mechanical, Packaging, and Orderable

Information........................................................... 26

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision C (May 2013) to Revision D Page

• Added ESD Ratings table, Feature Description section, Device Functional Modes,Application and Implementation

section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and

Mechanical, Packaging, and Orderable Information section ................................................................................................. 1

• Changed RθJA for SOT package from 118°C/W to 182.9°C/W............................................................................................... 5

• Changed RθJA for MSOP package from 73°C/W to 55.3°C/W................................................................................................ 5

Changes from Revision B (April 2013) to Revision C Page

• Changed layout of National Semiconductor Data Sheet to TI format .................................................................................. 23

GND

VIN

EN/DIM

BOOST

GND

BOOST

GND

VIN

EN/DIM

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5 Pin Configuration and Functions

DDC Package

6-Pin SOT

Top View DGN Package

8-Pin MSOP-PowerPAD™

Top View

Pin Functions

PIN I/O DESCRIPTION

NAME SOT MSOP-PowerPAD

BOOST 1 4 O Boost voltage that drives the NMOS output switch. A bootstrap capacitor is

connected between the BOOST and SW pins.

GND 2 2, 7 — Signal and power ground pin. Place the bottom resistor of the feedback network

as close as possible to this pin.

FB 3 1 I Feedback pin. Connect FB to the LED string cathode and an external resistor

to ground to set the LED current.

EN/DIM 4 8 I Enable control input. Logic high enables operation. Toggling this pin with a

periodic logic square wave of varying duty cycle at different frequencies

controls the brightness of LEDs. Do not allow this pin to float or be greater than

VIN + 0.3 V.

VIN 5 6 I Input supply voltage. Connect a bypass capacitor locally from this pin to GND.

SW 6 5 O Switch pin. Connect this pin to the inductor, catch diode, and bootstrap

capacitor.

NC — 3 — No connection.

DAP N/A — — Attach to power ground pin (GND).

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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

MIN MAX UNIT

VIN –0.5 24 V

SW voltage –0.5 24 V

Boost voltage –0.5 30 V

Boost to SW voltage –0.5 6 V

FB voltage –0.5 3 V

EN/DIM voltage –0.5 (VIN + 0.3) V

Junction temperature, TJ150 °C

Storage temperature, Tstg –65 150 °C

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings VALUE UNIT

LM3405A IN SOT PACKAGE

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V

Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000

LM3405A IN MSOP-PowerPAD PACKAGE

V(ESD) Electrostatic discharge Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±750 V

6.3 Recommended Operating Conditions MIN MAX UNIT

VIN 3 22 V

EN/DIM voltage 0 (VIN + 0.3) V

Boost to SW voltage 2.5 5.5 V

Junction temperature –40 125 °C

ILED SOT package 400 mA

MSOP-PowerPAD package 1 A

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(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6.4 Thermal Information

THERMAL METRIC(1)

LM3405A

UNIT

DDC

(SOT) DGN

(MSOP-PowerPAD)

6 PINS 8 PINS

RθJA Junction-to-ambient thermal resistance 182.9 55.3 °C/W

RθJC(top) Junction-to-case (top) thermal resistance 53.4 62.8 °C/W

RθJB Junction-to-board thermal resistance 28.1 38.9 °C/W

ψJT Junction-to-top characterization parameter 1.2 8.2 °C/W

ψJB Junction-to-board characterization parameter 27.7 38.6 °C/W

RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 8 °C/W

6.5 Electrical Characteristics

Unless otherwise specified, VIN = 12 V. TYP values are for TJ= 25°C only; MIN/MAX limits apply over the junction

temperature (TJ) range of –40°C to 125°C. Typical values represent the most likely parametric norm, and are provided for

reference purposes only.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

VFB Feedback voltage 0.188 0.205 0.22 V

ΔVFB/(ΔVINxVFB)Feedback voltage line

regulation VIN = 3 V to 22 V 0.01 %/V

IFB Feedback input bias

current Sink/source 10 250 nA

UVLO Undervoltage lockout VIN Rising 2.74 2.95 V

VIN Falling 1.9 2.3 V

UVLO Hysteresis 0.44 V

fSW Switching frequency 1.2 1.6 1.9 MHz

DMAX Maximum duty cycle VFB = 0 V 85% 94%

RDS(ON) Switch ON resistance SOT (VBOOST - VSW = 3 V) 300 600 mΩ

MSOP-PowerPAD (VBOOST - VSW = 3 V) 360 700

ICL Switch current limit VBOOST - VSW = 3 V, VIN = 3 V 1.2 2 2.8 A

Quiescent current Switching, VFB = 0.195 V 1.8 2.8 mA

Quiescent current

(shutdown) VEN/DIM = 0 V 0.3 µA

VEN/DIM_TH

Enable threshold voltage VEN/DIM Rising 1.8 V

Shutdown threshold

voltage VEN/DIM Falling 0.4 V

IEN/DIM EN/DIM pin current Sink/Source 0.01 µA

ISW Switch leakage VIN = 22 V 0.1 µA

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6.6 Typical Characteristics

Unless otherwise specified, VIN = 12 V, VBOOST – VSW = 5 V and TA= 25°C.

VIN = 5 V

Figure 1. Efficiency vs LED Current

IF= 1 A

Figure 2. Efficiency vs Input Voltage

IF= 0.7 A

Figure 3. Efficiency vs Input Voltage

IF= 0.35 A

Figure 4. Efficiency vs Input Voltage

Figure 5. VFB vs Temperature Figure 6. Oscillator Frequency vs Temperature

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Typical Characteristics (continued)

Unless otherwise specified, VIN = 12 V, VBOOST – VSW = 5 V and TA= 25°C.

Figure 7. Current Limit vs Temperature

VBOOST - VSW = 3 V

Figure 8. SOT RDS(ON) vs Temperature

Figure 9. Quiescent Current vs Temperature

VIN = 15 V IF= 0.2 A

Figure 10. Start-Up Response to EN/DIM Signal

VIN

-VD1

TON

Inductor

Current

D = TON/TSW

VSW

TOFF

TSW

Voltage

'iL

ILPK

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7 Detailed Description

7.1 Overview

The LM3405A is a PWM, current-mode controlled buck switching regulator designed to provide a simple, high

efficiency solution for driving LEDs with a preset switching frequency of 1.6MHz. This high frequency allows the

LM3405A to operate with small surface mount capacitors and inductors, resulting in LED drivers that need only a

minimum amount of board space. The LM3405A is internally compensated, simple to use, and requires few

external components.

The following description of operation of the LM3405A refers to the

Typical Application Circuit and to the waveforms in Figure 11. The LM3405A supplies a regulated output current

by switching the internal NMOS power switch at constant frequency and variable duty cycle. A switching cycle

begins at the falling edge of the reset pulse generated by the internal oscillator. When this pulse goes low, the

output control logic turns on the internal NMOS power switch. During this on-time, the SW pin voltage (VSW)

swings up to approximately VIN, and the inductor current (IL) increases with a linear slope. ILis measured by the

current sense amplifier, which generates an output proportional to the switch current. The sense signal is

summed with the regulator’s corrective ramp and compared to the error amplifier’s output, which is proportional

to the difference between the feedback voltage and VREF. When the PWM comparator output goes high, the

internal power switch turns off until the next switching cycle begins. During the switch off-time, inductor current

discharges through the catch diode D1, which forces the SW pin to swing below ground by the forward voltage

(VD1) of the catch diode. The regulator loop adjusts the duty cycle (D) to maintain a constant output current (IF)

through the LED, by forcing FB pin voltage to be equal to VREF (0.205 V).

Figure 11. SW Pin Voltage and Inductor Current Waveforms of LM3405A

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7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Boost Function

Capacitor C3 and diode D2 in the Functional Block Diagram are used to generate a voltage VBOOST. The voltage

across C3, VBOOST - VSW, is the gate drive voltage to the internal NMOS power switch. To properly drive the

internal NMOS switch during its on-time, VBOOST needs to be at least 2.5-V greater than VSW. A large value of

VBOOST - VSW is recommended to achieve better efficiency by minimizing both the internal switch ON resistance

(RDS(ON)), and the switch rise and fall times. However, VBOOST - VSW should not exceed the maximum operating

limit of 5.5 V.

When the LM3405A starts up, internal circuitry from VIN supplies a 20-mA current to the BOOST pin, flowing out

of the BOOST pin into C3. This current charges C3 to a voltage sufficient to turn the switch on. The BOOST pin

will continue to source current to C3 until the voltage at the feedback pin is greater than 123 mV.

There are various methods to derive VBOOST:

1. From the input voltage (VIN)

2. From the output voltage (VOUT)

3. From a shunt or series Zener diode

4. From an external distributed voltage rail (VEXT)

The first method is shown in the Functional Block Diagram. Capacitor C3 is charged via diode D2 by VIN. During

a normal switching cycle, when the internal NMOS power switch is off (TOFF) (see Figure 11), VBOOST equals VIN

minus the forward voltage of D2 (VD2), during which the current in the inductor (L1) forward biases the catch

diode D1 (VD1). Therefore the gate drive voltage stored across C3 is:

VBOOST - VSW = VIN - VD2 + VD1 (1)

When the NMOS switch turns on (TON), the switch pin rises to:

VSW = VIN – (RDS(ON) × IL) (2)

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Feature Description (continued)

Since the voltage across C3 remains unchanged, VBOOST is forced to rise thus reverse biasing D2. The voltage at

VBOOST is then:

VBOOST = 2VIN – (RDS(ON) × IL) – VD2 + VD1 (3)

Depending on the quality of the diodes D1 and D2, the gate drive voltage in this method can be slightly less or

larger than the input voltage VIN. For best performance, ensure that the variation of the input supply does not

cause the gate drive voltage to fall outside the recommended range:

2.5V < VIN - VD2 + VD1 < 5.5 V (4)

The second method for deriving the boost voltage is to connect D2 to the output as shown in Figure 12. The gate

drive voltage in this configuration is:

VBOOST - VSW = VOUT – VD2 + VD1 (5)

Since the gate drive voltage needs to be in the range of 2.5 V to 5.5 V, the output voltage VOUT should be limited

to a certain range. For the calculation of VOUT, see Output Voltage.

Figure 12. VBOOST Derived from VOUT

The third method can be used in the applications where both VIN and VOUT are greater than 5.5 V. In these

cases, C3 cannot be charged directly from these voltages; instead C3 can be charged from VIN or VOUT minus a

Zener voltage (VD3) by placing a Zener diode D3 in series with D2 as shown in Figure 13. When using a series

Zener diode from the input, the gate drive voltage is VIN - VD3 - VD2 + VD1.

Figure 13. VBOOST Derived from VIN Through a Series Zener

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Feature Description (continued)

An alternate method is to place the zener diode D3 in a shunt configuration as shown in Figure 14. A small 350

mW to 500 mW, 5.1-V Zener in a SOT or SOD package can be used for this purpose. A small ceramic capacitor

such as a 6.3 V, 0.1-µF capacitor (C5) should be placed in parallel with the Zener diode. When the internal

NMOS switch turns on, a pulse of current is drawn to charge the internal NMOS gate capacitance. The 0.1-µF

parallel shunt capacitor ensures that the VBOOST voltage is maintained during this time. Resistor R2 should be

chosen to provide enough RMS current to the zener diode and to the BOOST pin. A recommended choice for the

zener current (IZENER) is 1 mA. The current IBOOST into the BOOST pin supplies the gate current of the NMOS

power switch. It reaches a maximum of around 3.6 mA at the highest gate drive voltage of 5.5 V over the

LM3405A operating range.

For the worst case IBOOST, increase the current by 50%. In that case, the maximum boost current will be:

IBOOST-MAX = 1.5 × 3.6 mA = 5.4 mA (6)

R2 will then be given by:

R2 = (VIN - VZENER) / (IBOOST_MAX + IZENER) (7)

For example, let VIN = 12 V, VZENER = 5V, IZENER = 1 mA, then:

R2 = (12 V – 5 V) / (5.4 mA + 1 mA) = 1.09 kΩ(8)

Figure 14. VBOOST Derived from VIN Through a Shunt Zener

The fourth method can be used in an application which has an external low voltage rail, VEXT. C3 can be charged

through D2 from VEXT, independent of VIN and VOUT voltage levels. Again for best performance, ensure that the

gate drive voltage, VEXT - VD2 + VD1, falls in the range of 2.5 V to 5.5 V.

7.3.2 Setting the LED Current

LM3405A is a constant current buck regulator. The LEDs are connected between VOUT and the FB pin as shown

in the

Typical Application Circuit. The FB pin is at 0.205V in regulation and therefore the LED current IFis set by VFB

and resistor R1 from FB to ground by the following equation:

IF= VFB / R1 (9)

IFshould not exceed the 1-A current capability of LM3405A and therefore R1 minimum must be approximately

0.2 Ω. IFshould also be kept above 200 mA for stable operation, and therefore R1 maximum must be

approximately 1 Ω. If average LED currents less than 200 mA are desired, the EN/DIM pin can be used for PWM

dimming. See LED PWM Dimming.

7.3.3 Output Voltage

The output voltage is primarily determined by the number of LEDs (n) connected from VOUT to FB pin and

therefore VOUT can be written as:

VOUT = ((n × VF)+VFB)

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Feature Description (continued)

where

• VFis the forward voltage of one LED at the set LED current level (see LED manufacturer data sheet for

forward characteristics curve) (10)

7.3.4 Enable Mode / Shutdown Mode

The LM3405A has both enable and shutdown modes that are controlled by the EN/DIM pin. Connecting a

voltage source greater than 1.8 V to the EN/DIM pin enables the operation of LM3405A, while reducing this

voltage below 0.4 V places the part in a low quiescent current (0.3 µA typical) shutdown mode. There is no

internal pullup on EN/DIM pin, therefore an external signal is required to initiate switching. Do not allow this pin to

float or rise to 0.3 V above VIN. It should be noted that when the EN/DIM pin voltage rises above 1.8 V while the

input voltage is greater than UVLO, there is a finite delay before switching starts. During this delay the LM3405A

will go through a power on reset state after which the internal soft-start process commences. The soft-start

process limits the inrush current and brings up the LED current (IF) in a smooth and controlled fashion. The total

combined duration of the power on reset delay, soft-start delay and the delay to fully establish the LED current is

in the order of 100 µs (see Figure 19).

The simplest way to enable the operation of LM3405A is to connect the EN/DIM pin to VIN which allows self start-

up of LM3405A whenever the input voltage is applied. However, when an input voltage of slow rise time is used

to power the application and if both the input voltage and the output voltage are not fully established before the

soft-start time elapses, the control circuit will command maximum duty cycle operation of the internal power

switch to bring up the output voltage rapidly. When the feedback pin voltage exceeds 0.205 V, the duty cycle will

have to reduce from the maximum value accordingly, to maintain regulation. It takes a finite amount of time for

this reduction of duty cycle and this will result in a spike in LED current for a short duration as shown in

Figure 15. In applications where this LED current overshoot is undesirable, EN/DIM pin voltage can be

separately applied and delayed such that VIN is fully established before the EN/DIM pin voltage reaches the

enable threshold. The effect of delaying EN/DIM with respect to VIN on the LED current is shown in Figure 16.

For a fast rising input voltage (200 µs for example), there is no need to delay the EN/DIM signal since soft-start

can smoothly bring up the LED current as shown in Figure 17.

Figure 15. Start-Up Response to VIN With 5-ms Rise Time Figure 16. Start-Up Response to VIN With EN/DIM Delayed

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Feature Description (continued)

Figure 17. Start-Up Response to VIN With 200-µs Rise Time

7.3.5 LED PWM Dimming

The LED brightness can be controlled by applying a periodic pulse signal to the EN/DIM pin and varying its

frequency and/or duty cycle. This so-called PWM dimming method controls the average light output by pulsing

the LED current between the set value and zero. A logic high level at the EN/DIM pin turns on the LED current

whereas a logic low level turns off the LED current. Figure 18 shows a typical LED current waveform in PWM

dimming mode. As explained in the previous section, there is approximately a 100-µs delay from the EN/DIM

signal going high to fully establishing the LED current as shown in Figure 19. This 100-µs delay sets a maximum

frequency limit for the driving signal that can be applied to the EN/DIM pin for PWM dimming. Figure 20 shows

the average LED current versus duty cycle of PWM dimming signal for various frequencies. The applicable

frequency range to drive LM3405A for PWM dimming is from 100 Hz to 5 kHz. The dimming ratio reduces

drastically when the applied PWM dimming frequency is greater than 5 kHz.

Figure 18. PWM Dimming of LEDs

Using the EN/DIM Pin Figure 19. Start-Up Response to EN/DIM

With IF= 1 A

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Feature Description (continued)

Figure 20. Average LED Current vs

Duty Cycle of PWM Dimming Signal at EN/DIM Pin

7.3.6 Undervoltage Lockout

Undervoltage lockout (UVLO) prevents the LM3405A from operating until the input voltage exceeds 2.74 V

(typical). The UVLO threshold has approximately 440 mV of hysteresis, so the part will operate until VIN drops

below 2.3 V (typical). Hysteresis prevents the part from turning off during power up if VIN is non-monotonic.

7.3.7 Current Limit

The LM3405A uses cycle-by-cycle current limit to protect the internal power switch. During each switching cycle,

a current limit comparator detects if the power switch current exceeds 2 A (typical), and turns off the switch until

the next switching cycle begins.

7.3.8 Overcurrent Protection

The LM3405A has a built-in overcurrent comparator that compares the FB pin voltage to a threshold voltage that

is 60% higher than the internal reference VREF. Once the FB pin voltage exceeds this threshold level (typically

328 mV), the internal NMOS power switch is turned off, which allows the feedback voltage to decrease towards

regulation. This threshold provides an upper limit for the LED current. LED current overshoot is limited to 328

mV/R1 by this comparator during transients.

7.4 Device Functional Modes

7.4.1 Thermal Shutdown

Thermal shutdown limits total power dissipation by turning off the internal power switch when the IC junction

temperature exceeds 165°C. After thermal shutdown occurs, the power switch does not turn on until the junction

temperature drops below approximately 150°C.

L = VOUT + VD1

IF x r x fSW x (1-D)

r = 'iL

D = VOUT + VD1

VIN + VD1 - VSW

D = VOUT

VIN

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8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.1.1 Inductor (L1)

The Duty Cycle (D) can be approximated quickly using the ratio of output voltage (VOUT) to input voltage (VIN):

(11)

The catch diode (D1) forward voltage drop and the voltage drop across the internal NMOS must be included to

calculate a more accurate duty cycle. Calculate D by using Equation 12:

(12)

VSW can be approximated by Equation 13:

VSW = IF× RDS(ON) (13)

The diode forward drop (VD1) can range from 0.3 V to 0.7 V depending on the quality of the diode. The lower VD1

is, the higher the operating efficiency of the converter.

The inductor value determines the output ripple current (ΔiL, as defined in Figure 11). Lower inductor values

decrease the size of the inductor, but increases the output ripple current. An increase in the inductor value will

decrease the output ripple current. The ratio of ripple current to LED current is optimized when it is set between

0.3 and 0.4 at 1A LED current. This ratio r is defined as:

(14)

One must also ensure that the minimum current limit (1.2 A) is not exceeded, so the peak current in the inductor

must be calculated. The peak current (ILPK) in the inductor is calculated as:

ILPK = IF+ΔiL/2 (15)

When the designed maximum output current is reduced, the ratio r can be increased. At a current of 0.2 A, r can

be made as high as 0.7. The ripple ratio can be increased at lighter loads because the net ripple is actually quite

low, and if r remains constant the inductor value can be made quite large. An equation empirically developed for

the maximum ripple ratio at any current below 2 A is:

r = 0.387 × IOUT–0.3667 (16)

Note that this is just a guideline.

The LM3405A operates at a high frequency allowing the use of ceramic output capacitors without compromising

transient response. Ceramic capacitors allow higher inductor ripple without significantly increasing LED current

ripple. See the output capacitor and feed-forward capacitor sections for more details on LED current ripple.

Now that the ripple current or ripple ratio is determined, the inductance is calculated by Equation 17:

where

• fSW is the switching frequency

• IFis the LED current (17)

IRMS-IN = IF x D x r2

1 - D +

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Application Information (continued)

When selecting an inductor, make sure that it is capable of supporting the peak output current without saturating.

Inductor saturation will result in a sudden reduction in inductance and prevent the regulator from operating

correctly. Because of the operating frequency of the LM3405A, ferrite based inductors are preferred to minimize

core losses. This presents little restriction since the variety of ferrite based inductors is huge. Lastly, inductors

with lower series resistance (DCR) will provide better operating efficiency. For recommended inductor selection,

refer to Circuit Examples and Recommended Inductance Range in Table 1.

(1) Maximum over full range of VIN and VOUT.

Table 1. Recommended Inductance Range

IFINDUCTANCE RANGE AND INDUCTOR CURRENT RIPPLE

1 A

6.8 µH-15 µH

Inductance 6.8 µH 10 µH 15 µH

ΔiL/ IF(1) 51% 36% 24%

0.6 A

10 µH-22 µH

Inductance 10 µH 15 µH 22 µH

ΔiL/ IF(1) 58% 39% 26%

0.2 A

15 µH-27 µH

Inductance 15 µH 22 µH 27 µH

ΔiL/ IF(1) 116% 79% 65%

8.1.2 Input Capacitor (C1)

An input capacitor is necessary to ensure that VIN does not drop excessively during switching transients. The

primary specifications of the input capacitor are capacitance, voltage rating, RMS current rating, and ESL

(Equivalent Series Inductance). The input voltage rating is specifically stated by the capacitor manufacturer.

Make sure to check any recommended deratings and also verify if there is any significant change in capacitance

at the operating input voltage and the operating temperature. The input capacitor maximum RMS input current

rating (IRMS-IN) must be greater than:

(18)

It can be shown from the above equation that maximum RMS capacitor current occurs when D = 0.5. Always

calculate the RMS at the point where the duty cycle D, is closest to 0.5. The ESL of an input capacitor is usually

determined by the effective cross sectional area of the current path. A large leaded capacitor will have high ESL

and an 0805 ceramic chip capacitor will have very low ESL. At the operating frequency of the LM3405A, certain

capacitors may have an ESL so large that the resulting inductive impedance (2πfL) will be higher than that

required to provide stable operation. It is strongly recommended to use ceramic capacitors due to their low ESR

and low ESL. A 10µF multilayer ceramic capacitor (MLCC) is a good choice for most applications. In cases

where large capacitance is required, use surface mount capacitors such as Tantalum capacitors and place at

least a 1µF ceramic capacitor close to the VIN pin. For MLCCs it is recommended to use X7R or X5R dielectrics.

Consult capacitor manufacturer datasheet to see how rated capacitance varies over operating conditions.

8.1.3 Output Capacitor (C2)

The output capacitor is selected based upon the desired reduction in LED current ripple. A 1µF ceramic capacitor

results in very low LED current ripple for most applications. Due to the high switching frequency, the 1µF

capacitor alone (without feed-forward capacitor C4) can filter more than 90% of the inductor current ripple for

most applications where the sum of LED dynamic resistance and R1 is larger than 1Ω. Since the internal

compensation is tailored for small output capacitance with very low ESR, it is strongly recommended to use a

ceramic capacitor with capacitance less than 3.3µF.

IRMS-OUT = IF x r

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Given the availability and quality of MLCCs and the expected output voltage of designs using the LM3405A,

there is really no need to review other capacitor technologies. A benefit of ceramic capacitors is their ability to

bypass high frequency noise. A certain amount of switching edge noise will couple through the parasitic

capacitances in the inductor to the output. A ceramic capacitor will bypass this noise. In cases where large

capacitance is required, use Electrolytic or Tantalum capacitors with large ESR, and verify the loop performance

on the bench. Like the input capacitor, multilayer ceramic capacitors are recommended X7R or X5R. Again,

verify actual capacitance at the desired operating voltage and temperature.

Check the RMS current rating of the capacitor. The maximum RMS current rating of the capacitor is:

(19)

One may select a 1206 size ceramic capacitor for C2 since its current rating is typically higher than 1A, more

than enough for the requirement.

8.1.4 Feed-Forward Capacitor (C4)

The feed-forward capacitor (designated as C4) connected in parallel with the LED string is required to provide

multiple benefits to the LED driver design. It greatly improves the large signal transient response and suppresses

LED current overshoot that may otherwise occur during PWM dimming; it also helps to shape the rise and fall

times of the LED current pulse during PWM dimming thus reducing EMI emission; it reduces LED current ripple

by bypassing some of inductor ripple from flowing through the LED. For most applications, a 1-µF ceramic

capacitor is sufficient. In fact, the combination of a 1µF feed-forward ceramic capacitor and a 1µF output ceramic

capacitor leads to less than 1% current ripple flowing through the LED. Lower and higher C4 values can be used,

but bench validation is required to ensure the performance meets the application requirement.

Figure 21 shows a typical LED current waveform during PWM dimming without feed-forward capacitor. At the

beginning of each PWM cycle, overshoot can be seen in the LED current. Adding a 1µF feed-forward capacitor

can totally remove the overshoot as shown in Figure 22.

Figure 21. PWM Dimming Without Feed-Forward Capacitor Figure 22. PWM Dimming With a 1-µF Feed-Forward

Capacitor

8.1.5 Catch Diode (D1)

The catch diode (D1) conducts during the switch off-time. A Schottky diode is required for its fast switching time

and low forward voltage drop. The catch diode should be chosen such that its current rating is greater than:

ID1 = IF× (1-D) (20)

The reverse breakdown rating of the diode must be at least the maximum input voltage plus appropriate margin.

To improve efficiency, choose a Schottky diode with a low forward voltage drop.

 

COND F DS(ON)

P I D 1 R

3 I

§ ·

¨ ¸

u u  u u

¨ ¸

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8.1.6 Boost Diode (D2)

A standard diode such as the 1N4148 type is recommended. For VBOOST circuits derived from voltages less than

3.3V, a small-signal Schottky diode is recommended for better efficiency. A good choice is the BAT54 small

signal diode.

8.1.7 Boost Capacitor (C3)

A 0.01µF ceramic capacitor with a voltage rating of at least 6.3V is sufficient. The X7R and X5R MLCCs provide

the best performance.

8.1.8 Power Loss Estimation

The main power loss in LM3405A includes three basic types of loss in the internal power switch: conduction loss,

switching loss, and gate charge loss. In addition, there is loss associated with the power required for the internal

circuitry of IC.

The conduction loss is calculated as:

(21)

If the inductor ripple current is fairly small (for example, less than 40%) , the conduction loss can be simplified to:

PCOND = IF2x RDS(ON) x D (22)

The switching loss occurs during the switch on and off transition periods, where voltage and current overlap

resulting in power loss. The simplest means to determine this loss is to empirically measure the rise and fall

times (10% to 90%) of the voltage at the switch pin.

Switching power loss is calculated as follows:

PSW = 0.5 x VIN x IFx fSW x ( TRISE + TFALL ) (23)

The gate charge loss is associated with the gate charge QGrequired to drive the switch:

PG= fSW x VIN x QG(24)

The power loss required for operation of the internal circuitry:

PQ= IQx VIN (25)

IQis the quiescent operating current, and is typically around 1.8mA for the LM3405A.

The total power loss in the IC is:

PINTERNAL = PCOND + PSW + PG+ PQ(26)

An example of power losses for a typical application is shown in Table 2:

Table 2. Power Loss Tabulation

CONDITIONS POWER LOSS

VIN 12 V

VOUT 3.9 V

IOUT 1 A

VD1 0.45 V

RDS(ON) 300 mΩPCOND 108 mW

fSW 1.6 MHz

TRISE 18 ns PSW 288 mW

TFALL 12 ns

IQ1.8 mA PQ22 mW

QG1.4 nC PG27 mW

D is calculated to be 0.36

R1 = VFB

IF = 0.205V

1A = 0.205

D = VOUT

VIN = 3.6V

5V = 0.72

LM3405A

VIN VIN

EN/DIM

BOOST

GND

DC or

PWM

LED1

VOUT

LM3405A

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Σ( PCOND + PSW + PQ+ PG)=PINTERNAL (27)

PINTERNAL = 445mW (28)

8.2 Typical Applications

8.2.1 VBOOST Derived from VIN (VIN =5V,IF= 1 A)

Figure 23. VBOOST Derived from VIN

(VIN =5V,IF= 1 A) Diagram

8.2.1.1 Design Requirements

• Input Voltage: VIN = 5 V ± 10%

• LED Current: IF=1A

• LED Forward Voltage: VLED = 3.4 V

• Output Voltage: VOUT = 3.4 V + 0.2 V = 3.6 V

• Ripple Ratio: r < 0.6

• PWM Dimmable

8.2.1.2 Detailed Design Procedure

8.2.1.2.1 Calculate Duty Cycle (D)

Calculate the nominal duty cycle for calculations and ensure the maximum duty cycle will not be exceeded in the

application using Equation 29:

(29)

Using the same equation DMAX can be calculated for the minimum input voltage of 4.5 V. The duty cycle at 4.5 V

is 0.8 which is less than the minimum DMAX of 0.85 specified in Electrical Characteristics.

8.2.1.2.2 Choose Capacitor Values (C1, C2, C3, and C4)

Low input voltage applications and PWM dimming applications generally require more input capacitance so the

higher value of C1 = 10 µF is chosen for best performance. The other capacitor values chosen are the

recommended values of C2=C4=1µFand C3 = 0.01 µF. All capacitors chosen are X5R or X7R dielectric

ceramic capacitors of sufficient voltage rating.

8.2.1.2.3 Set the Nominal LED Current (R1)

The nominal LED current at 100% PWM dimming duty cycle is set by the resistor R1. R1 can be calculated using

Equation 30:

(30)

L = VOUT + VD1

IF × r × fSW = 3.6V + 0.37V

1A × 0.6 × 1.6MHz = 4.1H

ID1 = IF × :1 - D; = 1A × :1 - 0.72; = 0.28A

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Typical Applications (continued)

The standard value of R1 = 0.2Ωis chosen. R1 should have a power rating of at least 1/4 W.

8.2.1.2.4 Choose Diodes (D1 and D2)

For the boost diode, D2, choose a low current diode with a voltage rating greater than the input voltage to give

some margin. D2 should also be a schottky to minimize the forward voltage drop. For this example a schottky

diode of D2 = 100 mA, 30 V is chosen. The catch diode, D1, should be a schottky diode and should have a

voltage rating greater than the input voltage and a current rating greater than the average current. The average

current in D1 can be calculated with Equation 31:

(31)

For this example D1=1A,10Vis chosen.

8.2.1.2.5 Calculate the Inductor Value (L1)

The inductor value is chosen for a given ripple ratio (r). To calculate L1 the forward voltage of D1 is required. In

this case the chosen diode has a forward voltage drop of VF= 0.37 V. Given the desired ripple ratio L1 is

calculated as:

(32)

The next larger standard value of L1 = 4.7 µH is chosen. A ripple ratio of 0.6 translates to a ΔiLof 600 mA and a

peak inductor current of 1.3 A (IF+ΔiL/2). Choose an inductor with a saturation current rating of greater than

1.3 A.

Table 3. Bill of Materials for Figure 23

PART ID PART VALUE PART NUMBER MANUFACTURER

U1 1-A LED Driver LM3405A Texas Instruments

C1, Input Cap 10 µF, 6.3 V, X5R C3216X5R0J106M TDK

C2, Output Cap 1 µF, 10 V, X7R GRM319R71A105KC01D Murata

C3, Boost Cap 0.01 µF, 16 V, X7R 0805YC103KAT2A AVX

C4, Feedforward Cap 1 µF, 10 V, X7R GRM319R71A105KC01D Murata

D1, Catch Diode Schottky, 0.37 V at 1A, VR= 10 V MBRM110LT1G ON Semiconductor

D2, Boost Diode Schottky, 0.36 V at 15 mA CMDSH-3 Central Semiconductor

L1 4.7 µH, 1.6 A SLF6028T-4R7M1R6 TDK

R1 0.2 Ω, 0.5 W, 1% WSL2010R2000FEA Vishay

LED1 1.5 A, White LED LXK2-PW14 Lumileds

8.2.1.3 Application Curve

Figure 24. Efficiency vs Input Voltage

LM3405A

VIN VIN

EN/DIM

BOOST

GND

D2D3

DC or

PWM

LED1

VOUT

LM3405A

VIN

EN/DIM

BOOST

GND

VIN

DC or

PWM

LED1

VOUT

LM3405A

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8.3 System Examples

8.3.1 VBOOST Derived from VOUT (VIN = 12 V, IF= 1 A)

Figure 25. VBOOST Derived from VOUT

(VIN = 12 V, IF= 1 A) Diagram

Table 4. Bill of Materials for Figure 25

PART ID PART VALUE PART NUMBER MANUFACTURER

U1 1-A LED Driver LM3405A Texas Instruments

C1, Input Cap 10 µF, 25 V, X5R ECJ-3YB1E106K Panasonic

C2, Output Cap 1 µF, 10 V, X7R GRM319R71A105KC01D Murata

C3, Boost Cap 0.01 µF, 16 V, X7R 0805YC103KAT2A AVX

C4, Feedforward Cap 1 µF, 10 V, X7R GRM319R71A105KC01D Murata

D1, Catch Diode Schottky, 0.5 V at 1 A, VR= 30 V SS13 Vishay

D2, Boost Diode Schottky, 0.36 V at 15 mA CMDSH-3 Central Semiconductor

L1 4.7 µH, 1.6 A SLF6028T-4R7M1R6 TDK

R1 0.2 Ω, 0.5 W, 1% WSL2010R2000FEA Vishay

LED1 1.5 A, White LED LXK2-PW14 Lumileds

8.3.2 VBOOST Derived from VIN through a Series Zener Diode (D3) (VIN = 15 V, IF= 1 A)

Figure 26. VBOOST Derived from VIN through a Series Zener Diode (D3)

(VIN = 15 V, IF= 1 A) Diagram

LM3405A

VIN VIN

EN/DIM

BOOST

GND

DC or

PWM

LED1

VOUT

LM3405A

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Table 5. Bill of Materials for Figure 26

PART ID PART VALUE PART NUMBER MANUFACTURER

U1 1-A LED Driver LM3405A Texas Instruments

C1, Input Cap 10 µF, 25 V, X5R ECJ-3YB1E106K Panasonic

C2, Output Cap 1 µF, 10 V, X7R GRM319R71A105KC01D Murata

C3, Boost Cap 0.01 µF, 16 V, X7R 0805YC103KAT2A AVX

C4, Feedforward Cap 1 µF, 10 V, X7R GRM319R71A105KC01D Murata

D1, Catch Diode Schottky, 0.5 V at 1A, VR= 30 V SS13 Vishay

D2, Boost Diode Schottky, 0.36 V at 15 mA CMDSH-3 Central Semiconductor

D3, Zener Diode 11 V, 350 mW, SOT-23 BZX84C11 Fairchild

L1 6.8 µH, 1.5 A SLF6028T-6R8M1R5 TDK

R1 0.2 Ω, 0.5 W, 1% WSL2010R2000FEA Vishay

LED1 1.5 A, White LED LXK2-PW14 Lumileds

8.3.3 VBOOST Derived from VIN through a Shunt Zener Diode (D3) (VIN = 18 V, IF= 1 A)

Figure 27. VBOOST Derived From VIN Through a Shunt Zener Diode (D3)

(VIN = 18 V, IF= 1 A) Diagram

Table 6. Bill of Materials for Figure 27

PART ID PART VALUE PART NUMBER MANUFACTURER

U1 1-A LED Driver LM3405A Texas Instruments

C1, Input Cap 10 µF, 25 V, X5R ECJ-3YB1E106K Panasonic

C2, Output Cap 1 µF, 10 V, X7R GRM319R71A105KC01D Murata

C3, Boost Cap 0.01 µF, 16 V, X7R 0805YC103KAT2A AVX

C4, Feedforward Cap 1 µF, 10 V, X7R GRM319R71A105KC01D Murata

C5, Shunt Cap 0.1 µF, 16 V, X7R GRM219R71C104KA01D Murata

D1, Catch Diode Schottky, 0.5 V at 1 A, VR= 30 V SS13 Vishay

D2, Boost Diode Schottky, 0.36 V at 15 mA CMDSH-3 Central Semiconductor

D3, Zener Diode 4.7 V, 35 0mW, SOT-23 BZX84C4 V7 Fairchild

L1 6.8 µH, 1.5 A SLF6028T-6R8M1R5 TDK

R1 0.2 Ω, 0.5 W, 1% WSL2010R2000FEA Vishay

R2 1.91 kΩ, 1% CRCW08051K91FKEA Vishay

LED1 1.5 A, White LED LXK2-PW14 Lumileds

LM3405A

VIN VIN

EN/DIM

BOOST

GND

C3 L1

D2 D3

LED1

LED2

DC or

PWM

VOUT

LM3405A

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8.3.4 LED MR16 Lamp Application (VIN = 12-V AC, IF= 0.75 A)

Figure 28. LED MR16 Lamp Application

(VIN = 12-V AC, IF= 0.75 A) Diagram

Table 7. Bill of Materials for Figure 28

PART ID PART VALUE PART NUMBER MANUFACTURER

U1 1-A LED Driver LM3405A Texas Instruments

C1, Input Cap 10 µF, 25 V, X5R ECJ-3YB1E106K Panasonic

C2, Output Cap 1 µF, 10 V, X7R GRM319R71A105KC01D Murata

C3, Boost Cap 0.01 µF, 16 V, X7R 0805YC103KAT2A AVX

C5, Input Cap 220 µF, 25 V, electrolytic ECE-A1EN221U Panasonic

D1, Catch Diode Schottky, 0.5 V at 1 A, VR= 30 V SS13 Vishay

D2, Boost Diode Schottky, 0.36 V at 15 mA CMDSH-3 Central Semiconductor

D3, Rectifier Diode Schottky, 0.385 V at 500 mA CMHSH5-2L Central Semiconductor

D4, Rectifier Diode Schottky, 0.385 V at 500 mA CMHSH5-2L Central Semiconductor

D5, Rectifier Diode Schottky, 0.385 V at 500 mA CMHSH5-2L Central Semiconductor

D6, Rectifier Diode Schottky, 0.385 V at 500 mA CMHSH5-2L Central Semiconductor

L1 6.8 µH, 1.5 A SLF6028T-6R8M1R5 TDK

R1 0.27 Ω, 0.33 W, 1% ERJ8BQFR27 Panasonic

LED1 1 A, White LED LXHL-PW09 Lumileds

8.3.5 VBOOST Derived from VOUT through a Series Zener Diode (D3) ( VIN = 18 V, IF=1A)

Figure 29. VBOOST Derived from VOUT Through a Series Zener Diode (D3)

( VIN = 18 V, IF= 1 A) Diagram

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Table 8. Bill of Materials for Figure 29

PART ID PART VALUE PART NUMBER MANUFACTURER

U1 1-A LED Driver LM3405A Texas Instruments

C1, Input Cap 10 µF, 25 V, X5R ECJ-3YB1E106K Panasonic

C2, Output Cap 1 µF, 16 V, X7R GRM319R71A105KC01D Murata

C3, Boost Cap 0.01 µF, 16 V, X7R 0805YC103KAT2A AVX

C4, Feedforward Cap 1 µF, 16 V, X7R GRM319R71A105KC01D Murata

D1, Catch Diode Schottky, 0.5 V at 1 A, VR= 30 V SS13 Vishay

D2, Boost Diode Schottky, 0.36 V at 15 mA CMDSH-3 Central Semiconductor

D3, Zener Diode 3.6 V, 350 mW, SOT-23 BZX84C3V6 Fairchild

L1 6.8 µH, 1.5 A SLF6028T-6R8M1R5 TDK

R1 0.2 Ω, 0.5 W, 1% WSL2010R2000FEA Vishay

LED1 1.5 A, White LED LXK2-PW14 Lumileds

LED2 1.5 A, White LED LXK2-PW14 Lumileds

GND

BOOST

EN/DIM

GND

VIN

THERMAL/POWER VIA

GND

LED+

LED-

SIGNAL VIA

GND

VIN

LM3405A

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9 Power Supply Recommendations

Any DC output power supply may be used provided it has a high enough voltage and current rating required for

the particular application.

10 Layout

10.1 Layout Guidelines

When planning the layout there are a few things to consider when trying to achieve a clean, regulated output.

The most important consideration when completing the layout is the close coupling of the GND connections of

the input capacitor C1 and the catch diode D1. These ground ends should be close to one another and be

connected to the GND plane with at least two vias. Place these components as close to the IC as possible. The

next consideration is the location of the GND connection of the output capacitor C2, which should be near the

GND connections of C1 and D1.

There should be a continuous ground plane on the bottom layer of a two-layer board.

The FB pin is a high impedance node and care should be taken to make the FB trace short to avoid noise pickup

that causes inaccurate regulation. The LED current setting resistor R1 should be placed as close as possible to

the IC, with the GND of R1 placed as close as possible to the GND of the IC. The VOUT trace to LED anode

should be routed away from the inductor and any other traces that are switching.

High AC currents flow through the VIN, SW and VOUT traces, so they should be as short and wide as possible.

Radiated noise can be decreased by choosing a shielded inductor.

The remaining components should also be placed as close as possible to the IC. See AN-1229 SIMPLE

SWITCHER®PCB Layout Guidelines (SNVA054) for further considerations and the LM3405A demo board as an

example of a four-layer layout.

10.2 Layout Example

Figure 30. Layout Example (MSOP-PowerPAD Package, Schematic in Figure 23)

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11 Device and Documentation Support

11.1 Documentation Support

11.1.1 Related Documentation

For related documentation see the following:

•AN-1229 SIMPLE SWITCHER® PCB Layout Guidelines (SNVA054)

•AN-1644 Powering and Dimming High-Brightness LEDs with the LM3405 Constant-Current Buck Regulator

(SNVA247)

•AN-1656 Design Challenges of Switching LED Drivers (SNVA253)

•AN-1685 LM3405A Demo Board (SNVA271)

•AN-1899 LM3405A VSSOP Evaluation Board (SNVA370)

•AN-1982 Small, Wide Input Voltage Range LM2842 Keeps LEDs Cool (SNVA402)

•LM3405A Reference Design for MR16 LED Bulb, 600mA (SNVU101)

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper

right corner, click on Alert me to register and receive a weekly digest of any product information that has

changed. For change details, review the revision history included in any revised document.

11.3 Community Resource

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective

contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of

Use.

TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration

among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help

solve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and

contact information for technical support.

11.4 Trademarks

PowerPAD, E2E are trademarks of Texas Instruments.

SIMPLE SWITCHER is a registered trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

11.6 Glossary

SLYZ022 —TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead finish/

Ball material

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LM3405AXMK/NOPB ACTIVE SOT-23-THIN DDC 6 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 SSEB

LM3405AXMKE/NOPB ACTIVE SOT-23-THIN DDC 6 250 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 SSEB

LM3405AXMKX/NOPB ACTIVE SOT-23-THIN DDC 6 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 SSEB

LM3405AXMY/NOPB ACTIVE HVSSOP DGN 8 1000 RoHS & Green SN Level-1-260C-UNLIM SVSA

LM3405AXMYX/NOPB ACTIVE HVSSOP DGN 8 3500 RoHS & Green SN Level-1-260C-UNLIM SVSA

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 2

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TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LM3405AXMK/NOPB SOT-

23-THIN DDC 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM3405AXMKE/NOPB SOT-

23-THIN DDC 6 250 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM3405AXMKX/NOPB SOT-

23-THIN DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM3405AXMY/NOPB HVSSOP DGN 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM3405AXMYX/NOPB HVSSOP DGN 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 6-Sep-2019

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LM3405AXMK/NOPB SOT-23-THIN DDC 6 1000 210.0 185.0 35.0

LM3405AXMKE/NOPB SOT-23-THIN DDC 6 250 210.0 185.0 35.0

LM3405AXMKX/NOPB SOT-23-THIN DDC 6 3000 210.0 185.0 35.0

LM3405AXMY/NOPB HVSSOP DGN 8 1000 210.0 185.0 35.0

LM3405AXMYX/NOPB HVSSOP DGN 8 3500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 6-Sep-2019

Pack Materials-Page 2

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PACKAGE OUTLINE

0.20

0.12 TYP 0.25

3.05

2.55

4X 0.95

1.100

0.847

0.1

0.0 TYP

6X 0.5

0.3

0.6

0.3 TYP

1.9

0 -8 TYP

3.05

2.75

1.75

1.45

SOT - 1.1 max heightDDC0006A

SOT

4214841/B 11/2020

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Reference JEDEC MO-193.

0.2 C A B

INDEX AREA

PIN 1

GAGE PLANE

SEATING PLANE

0.1 C

SCALE 4.000

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EXAMPLE BOARD LAYOUT

0.07 MAX

ARROUND 0.07 MIN

ARROUND

6X (1.1)

6X (0.6)

(2.7)

4X (0.95)

(R0.05) TYP

4214841/B 11/2020

SOT - 1.1 max heightDDC0006A

SOT

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

SYMM

LAND PATTERN EXAMPLE

EXPLOSED METAL SHOWN

SCALE:15X

SYMM

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

DEFINED

EXPOSED METAL

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

SOLDERMASK DETAILS

EXPOSED METAL

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EXAMPLE STENCIL DESIGN

(2.7)

4X(0.95)

6X (1.1)

6X (0.6)

(R0.05) TYP

SOT - 1.1 max heightDDC0006A

SOT

4214841/B 11/2020

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

7. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

BASED ON 0.125 THICK STENCIL

SCALE:15X

SYMM

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PACKAGE OUTLINE

6X 0.65

1.95

8X 0.38

0.25

5.05

4.75 TYP

SEATING

PLANE

0.15

0.05

0.25

GAGE PLANE

0 -8

1.1 MAX

0.23

0.13

1.88

1.58

2.0

1.7

B3.1

2.9

NOTE 4

3.1

2.9

NOTE 3

0.7

0.4

PowerPAD VSSOP - 1.1 mm max heightDGN0008A

SMALL OUTLINE PACKAGE

4218836/A 11/2019

0.13 C A B

PIN 1 INDEX AREA

SEE DETAIL A

0.1 C

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed 0.15 mm per side.

4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.

5. Reference JEDEC registration MO-187.

PowerPAD is a trademark of Texas Instruments.

A 20

DETAIL A

TYPICAL

SCALE 4.000

EXPOSED THERMAL PAD

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EXAMPLE BOARD LAYOUT

0.05 MAX

ALL AROUND 0.05 MIN

ALL AROUND

8X (1.4)

8X (0.45)

6X (0.65)

(4.4)

(R0.05) TYP

(2)

NOTE 9

(3)

NOTE 9

(1.22)

(0.55)

( 0.2) TYP

VIA

(1.88)

(2)

PowerPAD VSSOP - 1.1 mm max heightDGN0008A

SMALL OUTLINE PACKAGE

4218836/A 11/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

9. Size of metal pad may vary due to creepage requirement.

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE: 15X

SYMM

SOLDER MASK

DEFINED PAD

METAL COVERED

BY SOLDER MASK

SEE DETAILS

15.000

METAL

SOLDER MASK

OPENING METAL UNDER

SOLDER MASK SOLDER MASK

OPENING

EXPOSED METAL

SOLDER MASK DETAILS

NON-SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK

DEFINED

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EXAMPLE STENCIL DESIGN

8X (1.4)

8X (0.45)

6X (0.65)

(4.4)

(R0.05) TYP

(1.88)

BASED ON

0.125 THICK

STENCIL

(2)

BASED ON

0.125 THICK

STENCIL

PowerPAD VSSOP - 1.1 mm max heightDGN0008A

SMALL OUTLINE PACKAGE

4218836/A 11/2019

1.59 X 1.690.175 1.72 X 1.830.15 1.88 X 2.00 (SHOWN)0.125 2.10 X 2.240.1

SOLDER STENCIL

OPENING

STENCIL

THICKNESS

NOTES: (continued)

10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

11. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

EXPOSED PAD 9:

100% PRINTED SOLDER COVERAGE BY AREA

SCALE: 15X

SYMM

METAL COVERED

BY SOLDER MASK SEE TABLE FOR

DIFFERENT OPENINGS

FOR OTHER STENCIL

THICKNESSES

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