CLY5
High Powe r G a As FET
Recomme nded O pe rati ng Conditions
CASE
Electrical specifications are measured
at specified test conditions.
Specifications are not guaranteed over all recommended
operating con dit ion s.
Storage Temperature (TSTG) −55 to 150°C
Drain-sourc e vo lta ge (V
DS
Drain-g ate vo lta ge (VDG)
GS
D
PULSE
Total power dissipation (P
TOT
(T
< 80 °C), T
: Temperature at soldering point
2 W
Operation of this device outside the parameter ranges
given above may cause permanent damage.
Electrical Specifications
Test conditions unless otherwise noted: TA=+25°C, Freq.=1.8 GHz
Drain-Source Saturation Current
VDS = +3 V, VGS = 0 V 600 800 1000 mA
Drain-Source Pinch-Off Current
DS
GS
Gate Pinch-Off Current
VDS = +3 V, VGS = −3.8 V - 5 20 µA
DS
D
Small Signal Gain (1) G VDS = +3 V, ID = 350 mA, PIN = 0 dBm 10.5 11.0 - dB
VDS = +5 V, ID = 350 mA, Pin = 0 dBm 11.5 12.0 - dB
(2)
DS
D
Output Power Po VDS = +3 V, ID = 350 mA, Pin = +19 dBm +26.5 +27 - dBm
DS
D
1dB-Compression Point P1dB VDS = +3 V, ID = 350 mA - +26.5 - dBm
VDS = +5 V, ID = 350 mA - +30 - dBm
DS
D
Noise figure NF VDS = +5 V, ID = 350 mA 1.72 dB
Channel-so lder ing poi nt
1. Matching conditions for maximum small signal gain (not identical with power matching conditions!)
2. Power matching conditions: f = 1.8 GHz, Source Match (Γms) Mag. 0.58; Ang. −143°; Load Match (Γml) Mag. 0.76; Ang. −116°
Datasheet: Rev G 08-29-14 - 2 of 9 - Disclaimer: Subject to change without notic e
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