©2001 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.1
Features
Internally trimmed offset voltage: 10mV
Low input bias current : 50pA
Wide gain bandw idth : 4MHz
High slew rate : 13V/µs
High inp ut impedance : 1012
Description
The LF351 is JFET input operational amplifier with an inter-
nally compensated input offset voltage. The JFET input
device provides wide bandwidth, low input bias currents and
offset currents.
8-DIP
8-SOP
1
1
Internal Block Diagram
LF351
Single Operational Amplifier (JFET)
LF351
2
Schematic Diagram
Absolute Maximum Ratings
Parameter Symbol Value Unit
Supply Voltage VCC ±18 V
Differential Input Voltage VI(DIFF) 30 V
Input Voltage Range VI±15 V
Output Short Circuit Duration - Continuous -
Power Dissipation PD500 mW
Operating Temperature TOPR 0 ~ +70 °C
Storage Temperature Range TSTG -65 ~ +150 °C
LF351
3
Electrical Characteristics
(VCC = +15V, VEE = - 15V, TA = 25 °C. unless otherwise specified)
Note :
1. Guaranteed by design.
Parameter Symbol Conditions Min. Typ. Max. Unit
Input Offset Voltage VIO RS = 10k-5.010mV
0 °CTA70 °C- - 13
Input Offset Voltage Drift (Note1) VIO/TR
S = 10k0 °CTA70 °C- 10 - µV/ °C
Input Offset Current IIO - 25 100 pA
0 °CTA70 °C--4nA
Input Bias Current IBAIS - 50 200 pA
0 °CTA70 °C--8nA
Input Resistance (Note1) RI--10
12 -
Large Signal Voltage Gain GVVO(P-P)= ±10V 25 100 - V/mV
RL=2k0 °CTA70 °C15 - -
Output Voltage Swing VO(P-P) RL = 10k Ω±12 ±13.5 - V
Input Voltage Range VI(R) -±11 +15
-12 -V
Common Mode Rejection Ratio CMRR RS10k70 100 - dB
Power Supply Rejection Ratio PSRR RS10k70 100 - dB
Power Supply Current ICC --2.33.4mA
Slew Rate (Note1) SRGV = 1 - 13 - V/µs
Gain-Bandwidth Product (Note1) GBW - - 4 - MHz
LF351
4
Mechanical Dimensions
Package Dimensions in millimeters
6.40
±0.20
3.30
±0.30
0.130
±0.012
3.40
±0.20
0.134
±0.008
#1
#4 #5
#8
0.252
±0.008
9.20
±0.20
0.79
2.54
0.100
0.031
()
0.46
±0.10
0.018
±0.004
0.060
±0.004
1.524
±0.10
0.362
±0.008
9.60
0.378 MAX
5.08
0.200
0.33
0.013
7.62
0~15°
0.300
MAX
MIN
0.25
+0.10
–0.05
0.010
+0.004
–0.002
8-DIP
LF351
5
Mechanical Dimensions (Continued)
Package Dimensions in millimeters
4.92
±0.20
0.194
±0.008
0.41
±0.10
0.016
±0.004
1.27
0.050
5.72
0.225
1.55
±0.20
0.061
±0.008
0.1~0.25
0.004~0.001
6.00
±0.30
0.236
±0.012
3.95
±0.20
0.156
±0.008
0.50
±0.20
0.020
±0.008
5.13
0.202 MAX
#1
#4 #5
0~8°
#8
0.56
0.022
()
1.80
0.071
MAX0.10
MAX0.004
MAX
MIN
+0.10
-0.05
0.15+0.004
-0.002
0.006
8-SOP
LF351
6
Ordering Information
Product Number Package Operating Temperature
LF351N 8-DIP 0 ~ + 70°C
LF351M 8-SOP
LF351
7
LF351
6/1/01 0.0m 001
Stock#DSxxxxxxxx
2001 Fairchild Semicond uctor Corporation
LIFE SU PP ORT POL ICY
FAIRCHILD’S PRODUCTS AR E NOT AUTHORIZED FOR USE AS C RITICAL COMPONENTS I N LIFE S UPPORT DEVICE S
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORA TION. As used he rein :
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or syst em who se failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effec tiv ene ss.
www.fairchildsemi.com
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRO DUCTS HEREIN TO IMPROVE RELIABILITY, FUN C TION OR DESIGN . FAIRCHILD DO ES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIG HTS, NOR THE RIGHTS OF OTHERS.