PowerLosses at 32 KHz Switching Time InductiveLoad at 32 KHz
(see figure 2)
In order to saturate the power switch and reduce
conduction losses, adequate direct base current
IB1 has to be provided for the lowest gain hFE at
100 oC (line scan phase). On the other hand,
negative base current IB2 must be provided to
turn off the power transistor (retrace phase).
Most of the dissipation, in the deflection
application, occurs at switch-off. Therefore it is
essential to determine the value of IB2 which
minimizes power losses, fall time tfand,
consequently,Tj. A new set of curves have been
defined to give total power losses, tsand tfas a
function of IB2 at both 16 KHz and 32 KHz
scanning frequencies for choosing the optimum
negative drive. The test circuit is illustrated in
figure 1.
Inductance L1serves to control the slope of the
negative base current IB2 to recombine the
excess carrier in the collector when base current
is still present, this would avoid any tailing
phenomenonin thecollector current.
The values of L and C are calculated from the
followingequations:
1
2
L
(
I
C
)2=1
2
C
(
V
CEfly
)2ω=2π
f
=1
√
L
C
Where IC= operating collector current, VCEfly=
flyback voltage, f= frequency of oscillation during
retrace.
BASE DRIVE INFORMATION
Reverse Biased SOA Switching Time Resistive Load
BUH515FP
4/7