IRF9530NPbF
HEXFET® Power MOSFET
PD - 94980
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220 contribute
to its wide acceptance throughout the industry.
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ -10V -14
ID @ TC = 100°C Continuous Drain Current, VGS @ -10V -10 A
IDM Pulsed Drain Current -56
PD @TC = 25°C Power Dissipation 79 W
Linear Derating Factor 0.53 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy250 mJ
IAR Avalanche Current-8.4 A
EAR Repetitive Avalanche Energy7.9 mJ
dv/dt Peak Diode Recovery dv/dt -5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
Mounting torque, 6-32 or M3 screw 10 lbfin (1.1Nm)
Absolute Maximum Ratings
Parameter Typ. Max. Units
RθJC Junction-to-Case  1.9
RθCS Case-to-Sink, Flat, Greased Surface 0.50  °C/W
RθJA Junction-to-Ambient  62
Thermal Resistance
VDSS = -100V
RDS(on) = 0.20Ω
ID = -14A
T
O
-22
0
AB
lAdvanced Process Technology
lDynamic dv/dt Rating
l175°C Operating Temperature
lFast Switching
lP-Channel
lFully Avalanche Rated
Description
02/04/04
S
D
G
lLead-Free
IRF9530NPbF
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode)   showing the
ISM Pulsed Source Current integral reverse
(Body Diode)   p-n junction diode.
VSD Diode Forward Voltage   -1.6 V TJ = 25°C, IS = -8.4A, VGS = 0V
trr Reverse Recovery Time  130 190 ns TJ = 25°C, IF = -8.4A
Qrr Reverse RecoveryCharge  650 970 nC di/dt = -100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage -100   V VGS = 0V, ID = -250µA
∆V(BR)DSS/∆T
JBreakdown Voltage Temp. Coefficient  -0.11  V/°C Reference to 25°C, ID = -1mA
RDS(on) Static Drain-to-Source On-Resistance   0.20 ΩVGS = -10V, ID = -8.4A
VGS(th) Gate Threshold Voltage -2.0  -4.0 V VDS = VGS, ID = -250µA
gfs Forward Transconductance 3.2   S VDS = -50V, ID = -8.4A
  -25 µA VDS = -100V, VGS = 0V
  -250 VDS = -80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage   100 VGS = 20V
Gate-to-Source Reverse Leakage   -100 nA VGS = -20V
QgTotal Gate Charge   58 ID = -8.4A
Qgs Gate-to-Source Charge   8.3 nC VDS = -80V
Qgd Gate-to-Drain ("Miller") Charge   32 VGS = -10V, See Fig. 6 and 13
td(on) Turn-On Delay Time  15  VDD = -50V
trRise Time  58  ID = -8.4A
td(off) Turn-Off Delay Time  45  RG = 9.1Ω
tfFall Time  46  RD = 6.2Ω, See Fig. 10
Between lead,
  6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance  760  VGS = 0V
Coss Output Capacitance  260  pF VDS = -25V
Crss Reverse Transfer Capacitance  170   = 1.0MHz, See Fig. 5
nH
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
LDInternal Drain Inductance
LSInternal Source Inductance  
IGSS
ns
4.5
7.5
IDSS Drain-to-Source Leakage Current
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ -8.4A, di/dt ≤ -490A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Notes:
Starting TJ = 25°C, L = 7.0mH
RG = 25Ω, IAS = -8.4A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
-14
-56
A
S
D
G
S
D
G
IRF9530NPbF
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1
1
10
100
0.1 1 10 100
D
DS
20µs PULSE WIDTH
T = 25°C
c
A
-I , Drain-to-Source Current (A)
-V , Drain-to-Source Voltage (V)
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOT TOM - 4. 5V
-4.5V
0.1
1
10
100
0.1 1 10 100
D
DS
A
-I , Drain-to-Source Current (A)
-V , Drain-to-Source Voltage (V)
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
-4.5V
20µs PULSE WIDTH
T = 175°C
C
0.1
1
10
100
45678910
T = 25°C
J
GS
D
A
-I , Drain-to-Source Current (A)
-V , Gate-to-Source Voltage (V)
V = -50V
20µs PULSE WIDTH
T = 175°C
DS
J
-60 -40 -20 020 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
-10V
-14A
IRF9530NPbF
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0
400
800
1200
1600
2000
1 10 100
C, Capacitance (pF)
A
DS
-V , Drain-to-Source Voltage (V)
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0.1
1
10
100
0.4 0.6 0.8 1.0 1.2 1.4 1.6
T = 25°C
T = 150°C
J
J
V = 0V
GS
SD
SD
A
-I , Reverse Drain Current (A)
-V , Source-to-Drain Voltage (V)
1
10
100
1000
1 10 100 1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Single Pulse
T
T
= 175 C
= 25 C
°
°
J
C
-V , Drain-to-Source Voltage (V)
-I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
010 20 30 40 50 60
0
5
10
15
20
Q , Total Gate Charge (nC)
-V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
-8.4A
V =-20V
DS
V =-50V
DS
V =-80V
DS
IRF9530NPbF
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
VDS
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
VDD
RG
D.U.T.
+
-
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
25 50 75 100 125 150 175
0
2
4
6
8
10
12
14
T , Case Temperature ( C)
-I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRF9530NPbF
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Q
G
Q
GS
Q
GD
V
G
Charge
-10V
D.U.T. VDS
ID
IG
-3mA
VGS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(
BR
)
DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
V
DS
V
DD
DRIVER
A
15V
-20V
25 50 75 100 125 150 175
0
100
200
300
400
500
600
700
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
-3.4A
-5.9A
-8.4A
IRF9530NPbF
Peak Diode Recovery dv/dt Test Circuit
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
+
-
+
+
+
-
-
-
RG
VDD
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T*Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
* Reverse Polarity of D.U.T for P-Channel
VGS
[ ]
[ ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
[ ] ***
Fig 14. For P-Channel HEXFETS
IRF9530NPbF
LEAD ASSIGNMENTS
1 - GATE
2 - DRA IN
3 - SOURCE
4 - DRA IN
- B -
1.32 (.052)
1.22 (.048)
3X 0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
4.69 (.185)
4.20 (.165)
3X 0.93 (.037)
0.69 (.027)
4.06 (.160)
3.55 (.140)
1.15 (.045)
MIN
6.47 (.255)
6.10 (.240)
3.78 (.149)
3.54 (.139)
- A -
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
3X 1.40 (.055)
1.15 (.045)
2.54 (.100)
2X
0.36 (.014) M B A M
4
1 2 3
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDE C OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREME NTS DO NOT INCLUDE BURRS.
HEXFET
1- GATE
2- DRAIN
3- SOURCE
4- DRAIN
LEAD ASSIGNMENTS
IGBTs, CoPACK
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
EXAMPLE:
IN THE ASSEMBLY LINE "C"
T HIS IS AN IRF 1010
LOT CODE 1789
AS S E MBLE D ON WW 19, 1997 PART NUMBER
AS S E MB L Y
LOT CODE
DAT E CODE
YEAR 7 = 1997
LINE C
WEEK 19
LOGO
R E CT IF IE R
INT E RNAT IONAL
Note: "P" in assembly line
position indicates "Lead-Free"
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.02/04
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/