©2001 Fairch ild Semicond uctor C orpo ration HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Rev. B
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to
gate insu lation dama ge by the electro static discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge
built in the handler ’s body capacitance is not disc ha rged
through the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production b y nume rous equipment m anuf acturers in
military, indus tria l and consumer appli cations, with virtually
no damage problem s due to electrostatic discharge. IGBTs
can be handled safely if the follo wing basic precautions are
taken:
1. Prior to assem b ly int o a circui t, all l eads s hould be k ept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD™ LD26” or equivalent.
2. When de vice s are remov ed by hand from thei r carriers,
the hand being u sed shoul d be grou nded b y any suitab le
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. De vices sho uld n e v er b e ins erted into or remo v e d from
circuits with power on.
5. Gate V oltage Rating - Nev er e xce ed the gate-v olta ge
rat ing of VGEM. Exceeding the rated VGE can result in
permanent damage to the oxide la yer in the gate regio n.
6. Gate Terminatio n - The gates of these de vi ces are
essentially capacitors. Circuits that leave the gate open-
circuit ed or fl oating shoul d be a v oide d. Thes e condi tions
can resu lt in turn-on of the device d ue to voltage buildup
on the input capacitor due to leakage currents or pickup.
7. Gate Protection - The se de vices do no t hav e an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an external Zener is recommended.
Operating Frequency Information
Op erating frequen cy in formation f or a typ ic al device
(Figure 3) is presen ted as a guide for estimati ng device
performance for a specific application. Other typical
frequency vs collector current (ICE) plots are po ssib le using
the inf o rmation s hown f o r a typical un it in Figure s 5, 6, 7, 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows fMAX1 or fMAX2; whichever is smaller at each
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
fMAX1 is defin ed by fMAX1 = 0.05/(td(OFF)I+ td(ON)I).
Deadti me (the de nominato r) has bee n arbit rarily held to 10%
of the on -sta te tim e for a 50% duty factor. Other definition s
are possible. td(OFF)I and td(ON)I are defined in Figure 20.
Device turn-off delay can establish a n addit io nal freque n cy
limitin g con diti on for an applic at ion other than TJM. td(OFF)I
is important when controlling output ripple under a lightly
loaded condition.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The
allowab le dissipation (PD) is defined by PD=(T
JM -T
C)/RθJC.
The sum o f de vice s witc hing and c onduction losses m ust not
excee d PD. A 50% duty factor was used (Figure 3) and the
conduction l osses (PC) are approximated by
PC=(V
CE xI
CE)/2.
EON and EOFF are defined in the switching waveforms
shown in Figure 20. EON is the integral of the instantaneous
power loss (ICE x VCE) during turn-on and EOFF is the
integral of the instantaneous power loss (ICE xV
CE) during
turn-off. All tail losses are included in the calculation for
EOFF; i.e., the collector current equals zero (ICE = 0).
Test Circuit and Wa vef o rm
FIGURE 19. INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 20. SWITCHING TEST WAVEFORM
RG = 25Ω
L = 1mH
VDD = 480V
+
-
HGTP12N60B3D
tfI
td(OFF)I trI
td(ON)I
10%
90%
10%
90%
VCE
ICE
VGE
EOFF
EON
HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS