LF353
LF353 Wide Bandwidth Dual JFET Input Operational Amplifier
Literature Number: SNOSBH3D
LF353
Wide Bandwidth Dual JFET Input Operational Amplifier
General Description
These devices are low cost, high speed, dual JFET input
operational amplifiers with an internally trimmed input offset
voltage (BI-FET II™technology). They require low supply
current yet maintain a large gain bandwidth product and fast
slew rate. In addition, well matched high voltage JFET input
devices provide very low input bias and offset currents. The
LF353 is pin compatible with the standard LM1558 allowing
designers to immediately upgrade the overall performance of
existing LM1558 and LM358 designs.
These amplifiers may be used in applications such as high
speed integrators, fast D/A converters, sample and hold
circuits and many other circuits requiring low input offset
voltage, low input bias current, high input impedance, high
slew rate and wide bandwidth. The devices also exhibit low
noise and offset voltage drift.
Features
nInternally trimmed offset voltage: 10 mV
nLow input bias current: 50pA
nLow input noise voltage: 25 nV/√Hz
nLow input noise current: 0.01 pA/√Hz
nWide gain bandwidth: 4 MHz
nHigh slew rate: 13 V/µs
nLow supply current: 3.6 mA
nHigh input impedance: 10
12
Ω
nLow total harmonic distortion : ≤0.02%
nLow 1/f noise corner: 50 Hz
nFast settling time to 0.01%: 2 µs
Typical Connection
00564914
Simplified Schematic
1/2 Dual
00564916
Connection Diagram
Dual-In-Line Package
00564917
Top View
Order Number LF353M, LF353MX or LF353N
See NS Package Number M08A or N08E
BI-FET II™is a trademark of National Semiconductor Corporation.
December 2003
LF353 Wide Bandwidth Dual JFET Input Operational Amplifier
© 2003 National Semiconductor Corporation DS005649 www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage ±18V
Power Dissipation (Note 2)
Operating Temperature Range 0˚C to +70˚C
T
j
(MAX) 150˚C
Differential Input Voltage ±30V
Input Voltage Range (Note 3) ±15V
Output Short Circuit Duration Continuous
Storage Temperature Range −65˚C to +150˚C
Lead Temp. (Soldering, 10 sec.) 260˚C
Soldering Information
Dual-In-Line Package
Soldering (10 sec.) 260˚C
Small Outline Package
Vapor Phase (60 sec.) 215˚C
Infrared (15 sec.) 220˚C
See AN-450 “Surface Mounting Methods and Their Effect
on Product Reliability” for other methods of soldering
surface mount devices.
ESD Tolerance (Note 8) 1000V
θ
JA
M Package TBD
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to
the device may occur. Operating ratings indicate conditions for which the
device is functional, but do not guarantee specific performance limits. Elec-
trical Characteristics state DC and AC electrical specifications under particu-
lar test conditions which guarantee specific performance limits. This assumes
that the device is within the Operating Ratings. Specifications are not guar-
anteed for parameters where no limit is given, however, the typical value is a
good indication of device performance.
DC Electrical Characteristics
(Note 5)
Symbol Parameter Conditions LF353 Units
MIn Typ Max
V
OS
Input Offset Voltage R
S
=10kΩ,T
A
=25˚C 5 10 mV
Over Temperature 13 mV
∆V
OS
/∆T Average TC of Input Offset Voltage R
S
=10 kΩ10 µV/˚C
I
OS
Input Offset Current T
j
=25˚C, (Notes 5, 6) 25 100 pA
T
j
≤70˚C 4 nA
I
B
Input Bias Current T
j
=25˚C, (Notes 5, 6) 50 200 pA
T
j
≤70˚C 8 nA
R
IN
Input Resistance T
j
=25˚C 10
12
Ω
A
VOL
Large Signal Voltage Gain V
S
=±15V, T
A
=25˚C 25 100 V/mV
V
O
=±10V, R
L
=2 kΩ
Over Temperature 15 V/mV
V
O
Output Voltage Swing V
S
=±15V, R
L
=10kΩ±12 ±13.5 V
V
CM
Input Common-Mode Voltage V
S
=±15V ±11 +15 V
Range −12 V
CMRR Common-Mode Rejection Ratio R
S
≤10kΩ70 100 dB
PSRR Supply Voltage Rejection Ratio (Note 7) 70 100 dB
I
S
Supply Current 3.6 6.5 mA
AC Electrical Characteristics
(Note 5)
Symbol Parameter Conditions LF353 Units
Min Typ Max
Amplifier to Amplifier Coupling T
A
=25˚C, f=1 Hz−20 kHz −120 dB
(Input Referred)
SR Slew Rate V
S
=±15V, T
A
=25˚C 8.0 13 V/µs
GBW Gain Bandwidth Product V
S
=±15V, T
A
=25˚C 2.7 4 MHz
e
n
Equivalent Input Noise Voltage T
A
=25˚C, R
S
=100Ω,16
f=1000 Hz
i
n
Equivalent Input Noise Current T
j
=25˚C, f=1000 Hz 0.01
LF353
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AC Electrical Characteristics (Continued)
(Note 5)
Symbol Parameter Conditions LF353 Units
Min Typ Max
THD Total Harmonic Distortion A
V
=+10, RL=10k,
V
O
=20Vp−p,
BW=20 Hz-20 kHz
<0.02 %
Note 2: For operating at elevated temperatures, the device must be derated based on a thermal resistance of 115˚C/W typ junction to ambient for the N package,
and 158˚C/W typ junction to ambient for the H package.
Note 3: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Note 4: The power dissipation limit, however, cannot be exceeded.
Note 5: These specifications apply for VS=±15V and 0˚C≤TA≤+70˚C. VOS,I
Band IOS are measured at VCM=0.
Note 6: The input bias currents are junction leakage currents which approximately double for every 10˚C increase in the junction temperature, Tj. Due to the limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, PD.T
j=TA+θjA PDwhere θjA is the thermal resistance from junction to ambient. Use of a heat sink is
recommended if input bias current is to be kept to a minimum.
Note 7: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice. VS
=±6V to ±15V.
Note 8: Human body model, 1.5 kΩin series with 100 pF.
Typical Performance Characteristics
Input Bias Current Input Bias Current
00564918 00564919
Supply Current Positive Common-Mode Input Voltage Limit
00564920
00564921
LF353
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Typical Performance Characteristics (Continued)
Negative Common-Mode Input Voltage Limit Positive Current Limit
00564922 00564923
Negative Current Limit Voltage Swing
00564924 00564925
Output Voltage Swing Gain Bandwidth
00564926 00564927
LF353
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Typical Performance Characteristics (Continued)
Bode Plot Slew Rate
00564928 00564929
Distortion vs. Frequency Undistorted Output Voltage Swing
00564930 00564931
Open Loop Frequency Response Common-Mode Rejection Ratio
00564932 00564933
LF353
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Typical Performance Characteristics (Continued)
Power Supply Rejection Ratio Equivalent Input Noise Voltage
00564934 00564935
Open Loop Voltage Gain (V/V) Output Impedance
00564936 00564937
Inverter Settling Time
00564938
LF353
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Pulse Response
Small Signaling Inverting
00564904
Large Signal Inverting
00564906
Small Signal Non-Inverting
00564905
Large Signal Non-Inverting
00564907
Current Limit (R
L
= 100Ω)
00564908
Application Hints
These devices are op amps with an internally trimmed input
offset voltage and JFET input devices (BI-FET II). These
JFETs have large reverse breakdown voltages from gate to
source and drain eliminating the need for clamps across the
inputs. Therefore, large differential input voltages can easily
be accommodated without a large increase in input current.
The maximum differential input voltage is independent of the
supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this will
cause large currents to flow which can result in a destroyed
unit.
Exceeding the negative common-mode limit on either input
will force the output to a high state, potentially causing a
reversal of phase to the output. Exceeding the negative
common-mode limit on both inputs will force the amplifier
output to a high state. In neither case does a latch occur
LF353
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Application Hints (Continued)
since raising the input back within the common-mode range
again puts the input stage and thus the amplifier in a normal
operating mode.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
The amplifiers will operate with a common-mode input volt-
age equal to the positive supply; however, the gain band-
width and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
Each amplifier is individually biased by a zener reference
which allows normal circuit operation on ±6V power sup-
plies. Supply voltages less than these may result in lower
gain bandwidth and slew rate.
The amplifiers will drivea2kΩload resistance to ±10V over
the full temperature range of 0˚C to +70˚C. If the amplifier is
forced to drive heavier load currents, however, an increase
in input offset voltage may occur on the negative voltage
swing and finally reach an active current limit on both posi-
tive and negative swings.
Precautions should be taken to ensure that the power supply
for the integrated circuit never becomes reversed in polarity
or that the unit is not inadvertently installed backwards in a
socket as an unlimited current surge through the resulting
forward diode within the IC could cause fusing of the internal
conductors and result in a destroyed unit.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order
to ensure stability. For example, resistors from the output to
an input should be placed with the body close to the input to
minimize “pick-up” and maximize the frequency of the feed-
back pole by minimizing the capacitance from the input to
ground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance
from the input of the device (usually the inverting input) to AC
ground set the frequency of the pole. In many instances the
frequency of this pole is much greater than the expected 3
dB frequency of the closed loop gain and consequently there
is negligible effect on stability margin. However, if the feed-
back pole is less than approximately 6 times the expected 3
dB frequency a lead capacitor should be placed from the
output to the input of the op amp. The value of the added
capacitor should be such that the RC time constant of this
capacitor and the resistance it parallels is greater than or
equal to the original feedback pole time constant.
Detailed Schematic
00564909
LF353
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Typical Applications
Three-Band Active Tone Control
00564939
00564940
Note 1: All controls flat.
Note 2: Bass and treble boost, mid flat.
Note 3: Bass and treble cut, mid flat.
Note 4: Mid boost, bass and treble flat.
Note 5: Mid cut, bass and treble flat.
•All potentiometers are linear taper
•Use the LF347 Quad for stereo applications
LF353
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Typical Applications (Continued)
Improved CMRR Instrumentation Amplifier
00564941
Fourth Order Low Pass Butterworth Filter
00564942
LF353
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Typical Applications (Continued)
Fourth Order High Pass Butterworth Filter
00564943
LF353
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Typical Applications (Continued)
Ohms to Volts Converter
00564944
LF353
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Physical Dimensions inches (millimeters) unless otherwise noted
Order Number LF353M or LF353MX
NS Package Number M08A
Molded Dual-In-Line Package
Order Number LF353N
NS Package N08E
LF353
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Notes
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
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accordance with instructions for use provided in the
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can be reasonably expected to cause the failure of
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www.national.com
LF353 Wide Bandwidth Dual JFET Input Operational Amplifier
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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